Altium-Celestial-library/footprints/Leaded - SOT-23
2022-08-14 16:11:19 +01:00
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PCB - LEADED - SOT-23 - ANALOG SOT-23-5 RJ-5.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - ANALOG TSOT-23-5 UJ-5.PCBLIB Create PCB - LEADED - SOT-23 - ANALOG TSOT-23-5 UJ-5.PCBLIB 2019-12-04 15:23:58 +00:00
PCB - LEADED - SOT-23 - ATMEL SOT-23-6 6ST1.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - DIODES SOT-23-3 N.PCBLIB Create PCB - LEADED - SOT-23 - DIODES SOT-23-3 N.PCBLIB 2022-03-05 21:14:47 +00:00
PCB - LEADED - SOT-23 - DIODES SOT-23-3.PCBLIB Update PCB - LEADED - SOT-23 - DIODES SOT-23-3.PCBLIB 2020-03-30 15:35:22 +01:00
PCB - LEADED - SOT-23 - DIODES SOT-23-5 K.PCBLIB Rename footprint file 2022-03-05 21:14:09 +00:00
PCB - LEADED - SOT-23 - DIODES SOT-23-5 W5.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - DIODES SOT-23-6 W6.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - FAIRCHILD SOT-23-6 SUPERSOT-6.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - FAIRCHILD SSOT-23-3.PCBLIB Updating pin outs to standardise footprint/symbols 2019-12-14 19:13:03 +00:00
PCB - LEADED - SOT-23 - INFINEON SOT-23-3.PCBLIB Updating pin outs to standardise footprint/symbols 2019-12-14 19:13:03 +00:00
PCB - LEADED - SOT-23 - LT TSOT-23-6 S6.PCBLIB Fixed 3d model being too high 2019-12-06 13:00:20 +00:00
PCB - LEADED - SOT-23 - MAXIM SOT-23-6.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - MCCSEMI SOT-23-3.PCBLIB Create PCB - LEADED - SOT-23 - MCCSEMI SOT-23-3.PCBLIB 2020-03-30 15:39:02 +01:00
PCB - LEADED - SOT-23 - MICREL SOT-23-5 DB5.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - MICROCHIP SOT-23-3 NB.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - MICROCHIP SOT-23-5 OT.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - MICROCHIP SOT-23-6 M6.PCBLIB Create PCB - LEADED - SOT-23 - MICROCHIP SOT-23-6 M6.PCBLIB 2020-01-29 23:43:21 +00:00
PCB - LEADED - SOT-23 - NEXPERIA SOT-23-3.PCBLIB Create PCB - LEADED - SOT-23 - NEXPERIA SOT-23-3.PCBLIB 2020-03-30 15:35:29 +01:00
PCB - LEADED - SOT-23 - NXP SOT-23-3 TO-236AB.PCBLIB Updating pin outs 2019-12-14 22:09:38 +00:00
PCB - LEADED - SOT-23 - ON SEMI SOT-23-3.PCBLIB Update PCB - LEADED - SOT-23 - ON SEMI SOT-23-3.PCBLIB 2020-03-30 15:35:31 +01:00
PCB - LEADED - SOT-23 - ON SEMI SOT-23-5 NTR.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - ON SEMI TSOT-23-5 419AE.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - ROHM RUC002N05.PCBLIB Create PCB - LEADED - SOT-23 - ROHM RUC002N05.PCBLIB 2022-08-14 16:11:19 +01:00
PCB - LEADED - SOT-23 - ROHM SOT-23-3 SST3.PCBLIB Create PCB - LEADED - SOT-23 - ROHM SOT-23-3 SST3.PCBLIB 2022-08-14 16:11:16 +01:00
PCB - LEADED - SOT-23 - TI SOT-23-3 DBZ.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - TI SOT-23-5 DBV.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - TI SOT-23-6 DBV.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - TI SOT-23-6 DDC.PCBLIB Renamed all files to present better in project 2019-05-19 01:11:41 +01:00
PCB - LEADED - SOT-23 - TI SOT-23-8 DDF.PcbLib Fixed name of PCB - LEADED - SOT-23 - TI SOT-23-8 DDF.PcbLib 2021-10-28 04:13:27 +01:00
PCB - LEADED - SOT-23 - TI TSOT-23-6.PCBLIB Create footprints/Leaded - SOT-23/PCB - LEADED - SOT-23 - TI TSOT-23-6.PCBLIB 2022-01-02 16:26:58 +00:00