124 lines
4.9 KiB
CSS
124 lines
4.9 KiB
CSS
P "CDS_LMAN_SYM_OUTLINE" "-800,1300,800,-1400" 0 0 0.00 0.00 22 0 0 0 0 0 0 0 0
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L 801 1300 -800 1300 -1 0
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L -800 1300 -800 -1400 -1 0
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L -800 -1400 801 -1400 -1 0
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L 801 -1400 801 1300 -1 0
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T -750 1150 0 0 47 0 0 0 0 6 0
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IO8_A2
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T -750 -150 0 0 47 0 0 0 0 7 0
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IO8_B11
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T 0 1225 0 0 74 0 0 1 0 7 0
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10M50DA
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T 0 -1350 0 0 93 0 0 1 0 3 0
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5/6
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P "PART_NUMBER" "?" -800 -1450 0 0 47 0 0 0 0 0 1 0 0
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P "PATH" "?" 0 1350 0 0 47 0 0 0 0 0 0 0 0
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P "MATERIAL" "?" -800 1350 0 0 47 0 0 0 0 0 1 0 0
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P "$LOCATION" "?" -800 1400 0 0 47 0 0 0 0 0 1 0 0
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P "PACK_TYPE" "?" -800 1450 0 0 47 0 0 0 0 0 0 0 0
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L 850 800 800 800 -1 0
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C 850 800 "ADC_VREF" 875 800 0 1 47 0 L
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X "PIN_TEXT" "ANAIN1" 750 700 0 0 47 0 0 2 0 0 1 0 0
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L 850 700 800 700 -1 0
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C 850 700 "ANAIN1" 875 700 0 1 47 0 L
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X "PIN_TEXT" "ANAIN2" 751 650 0 0 47 0 0 2 0 0 1 0 0
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L 850 650 800 650 -1 0
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C 850 650 "ANAIN2" 875 650 0 1 47 0 L
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X "PIN_TEXT" "ADC_VREF" 749 800 0 0 47 0 0 2 0 0 1 0 0
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L -850 650 -800 650 -1 0
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C -850 650 "IO8_A10" -875 650 0 1 47 0 R
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X "PIN_TEXT" "IO8_A11" -750 600 0 0 47 0 0 0 0 0 1 0 0
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L -850 600 -800 600 -1 0
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C -850 600 "IO8_A11" -875 600 0 1 47 0 R
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X "PIN_TEXT" "IO8_A12" -750 550 0 0 47 0 0 0 0 0 1 0 0
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L -850 550 -800 550 -1 0
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C -850 550 "IO8_A12" -875 550 0 1 47 0 R
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X "PIN_TEXT" "IO8_B3_PLL_T_CLKOUTp" -750 450 0 0 47 0 0 0 0 0 1 0 0
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L -850 1150 -800 1150 -1 0
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C -850 1150 "IO8_A2" -875 1150 0 1 47 0 R
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X "PIN_TEXT" "IO8_A3" -750 1100 0 0 47 0 0 0 0 0 1 0 0
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L -850 1100 -800 1100 -1 0
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C -850 1100 "IO8_A3" -875 1100 0 1 47 0 R
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X "PIN_TEXT" "IO8_A4_PLL_T_CLKOUTn" -750 1050 0 0 47 0 0 0 0 0 1 0 0
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L -850 1050 -800 1050 -1 0
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C -850 1050 "IO8_A4_PLL_T_CLKOUTN" -875 1050 0 1 47 0 R
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X "PIN_TEXT" "IO8_A5" -750 1000 0 0 47 0 0 0 0 0 1 0 0
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L -850 1000 -800 1000 -1 0
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C -850 1000 "IO8_A5" -875 1000 0 1 47 0 R
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X "PIN_TEXT" "IO8_A6" -750 950 0 0 47 0 0 0 0 0 1 0 0
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L -850 950 -800 950 -1 0
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C -850 950 "IO8_A6" -875 950 0 1 47 0 R
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X "PIN_TEXT" "IO8_A7" -750 900 0 0 47 0 0 0 0 0 1 0 0
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L -850 900 -800 900 -1 0
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C -850 900 "IO8_A7" -875 900 0 1 47 0 R
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X "PIN_TEXT" "IO8_A8" -750 850 0 0 47 0 0 0 0 0 1 0 0
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L -850 850 -800 850 -1 0
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C -850 850 "IO8_A8" -875 850 0 1 47 0 R
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X "PIN_TEXT" "IO8_A9_VREFB8N0" -750 750 0 0 47 0 0 0 0 0 1 0 0
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L -850 750 -800 750 -1 0
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C -850 750 "IO8_A9_VREFB8N0" -875 750 0 1 47 0 R
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X "PIN_TEXT" "IO8_A10" -750 650 0 0 47 0 0 0 0 0 1 0 0
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L -850 -50 -800 -50 -1 0
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C -850 -50 "IO8_B10_DEV_CLRN" -875 -50 0 1 47 0 R
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X "PIN_TEXT" "IO8_B10_DEV_CLRn" -750 -50 0 0 47 0 0 0 0 0 1 0 0
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L -850 -150 -800 -150 -1 0
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C -850 -150 "IO8_B11" -875 -150 0 1 47 0 R
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X "PIN_TEXT" "IO8_B12" -750 -200 0 0 47 0 0 0 0 0 1 0 0
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L -850 -200 -800 -200 -1 0
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C -850 -200 "IO8_B12" -875 -200 0 1 47 0 R
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X "PIN_TEXT" "IO8_C5_CRC_ERROR" -750 -300 0 0 47 0 0 0 0 0 1 0 0
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L -850 450 -800 450 -1 0
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C -850 450 "IO8_B3_PLL_T_CLKOUTP" -875 450 0 1 47 0 R
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X "PIN_TEXT" "IO8_B4" -750 400 0 0 47 0 0 0 0 0 1 0 0
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L -850 400 -800 400 -1 0
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C -850 400 "IO8_B4" -875 400 0 1 47 0 R
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X "PIN_TEXT" "IO8_B5" -750 350 0 0 47 0 0 0 0 0 1 0 0
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L -850 350 -800 350 -1 0
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C -850 350 "IO8_B5" -875 350 0 1 47 0 R
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X "PIN_TEXT" "IO8_B6" -750 300 0 0 47 0 0 0 0 0 1 0 0
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L -850 300 -800 300 -1 0
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C -850 300 "IO8_B6" -875 300 0 1 47 0 R
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X "PIN_TEXT" "IO8_B7" -750 250 0 0 47 0 0 0 0 0 1 0 0
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L -850 250 -800 250 -1 0
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C -850 250 "IO8_B7" -875 250 0 1 47 0 R
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X "PIN_TEXT" "IO8_B8_DEV_OE" -750 150 0 0 47 0 0 0 0 0 1 0 0
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L -850 150 -800 150 -1 0
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C -850 150 "IO8_B8_DEV_OE" -875 150 0 1 47 0 R
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X "PIN_TEXT" "IO8_B9" -750 50 0 0 47 0 0 0 0 0 1 0 0
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L -850 50 -800 50 -1 0
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C -850 50 "IO8_B9" -875 50 0 1 47 0 R
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L -850 -550 -800 -550 -1 0
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C -850 -550 "IO8_C10" -875 -550 0 1 47 0 R
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X "PIN_TEXT" "IO8_C10" -750 -550 0 0 47 0 0 0 0 0 1 0 0
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L -850 -300 -800 -300 -1 0
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C -850 -300 "IO8_C5_CRC_ERROR" -875 -300 0 1 47 0 R
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X "PIN_TEXT" "IO8_C6" -750 -400 0 0 47 0 0 0 0 0 1 0 0
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L -850 -400 -800 -400 -1 0
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C -850 -400 "IO8_C6" -875 -400 0 1 47 0 R
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X "PIN_TEXT" "IO8_C9_CLK4n" -750 -450 0 0 47 0 0 0 0 0 1 0 0
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L -850 -450 -800 -450 -1 0
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C -850 -450 "IO8_C9_CLK4N" -875 -450 0 1 47 0 R
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L -850 -650 -800 -650 -1 0
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C -850 -650 "IO8_D9_CLK4P" -875 -650 0 1 47 0 R
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X "PIN_TEXT" "IO8_D9_CLK4p" -750 -650 0 0 47 0 0 0 0 0 1 0 0
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L -850 -750 -800 -750 -1 0
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C -850 -750 "IO8_E7_CONF_DONE" -875 -750 0 1 47 0 R
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X "PIN_TEXT" "IO8_E7_CONF_DONE" -750 -750 0 0 47 0 0 0 0 0 1 0 0
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L -850 -850 -800 -850 -1 0
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C -850 -850 "IO8_E8_NCONFIG" -875 -850 0 1 47 0 R
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X "PIN_TEXT" "IO8_E8_nCONFIG" -750 -850 0 0 47 0 0 0 0 0 1 0 0
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L -850 -950 -800 -950 -1 0
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C -850 -950 "IO8_E9_CLK5N" -875 -950 0 1 47 0 R
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X "PIN_TEXT" "IO8_E9_CLK5n" -750 -950 0 0 47 0 0 0 0 0 1 0 0
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L -850 -1050 -800 -1050 -1 0
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C -850 -1050 "IO8_F7_NSTATUS" -875 -1050 0 1 47 0 R
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X "PIN_TEXT" "IO8_F7_nSTATUS" -750 -1050 0 0 47 0 0 0 0 0 1 0 0
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L -850 -1150 -800 -1150 -1 0
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C -850 -1150 "IO8_F8_CONFIG_SEL" -875 -1150 0 1 47 0 R
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X "PIN_TEXT" "IO8_F8_CONFIG_SEL" -750 -1150 0 0 47 0 0 0 0 0 1 0 0
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L -850 -1250 -800 -1250 -1 0
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C -850 -1250 "IO8_F9_CLK5P" -875 -1250 0 1 47 0 R
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X "PIN_TEXT" "IO8_F9_CLK5p" -750 -1250 0 0 47 0 0 0 0 0 1 0 0
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