32 lines
543 B
Verilog
32 lines
543 B
Verilog
// generated by newgenasym Wed Sep 11 13:56:46 2019
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module sconn20_k70426001 (io1, io10, io11, io12, io13, io14, io15, io16, io17, io18,
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io19, io2, io20, io3, io4, io5, io6, io8, io9);
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inout io1;
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inout io10;
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inout io11;
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inout io12;
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inout io13;
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inout io14;
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inout io15;
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inout io16;
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inout io17;
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inout io18;
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inout io19;
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inout io2;
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inout io20;
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inout io3;
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inout io4;
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inout io5;
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inout io6;
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inout io8;
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inout io9;
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initial
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begin
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end
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endmodule
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