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@ -26,7 +26,7 @@ about: "Optional description" |
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- [ ] Power |
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- [ ] Sufficient power supplied from upstream source |
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- [ ] Supply rated for necessary country specifications |
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- [ ] Estimate total worst-case power supply draw |
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- [ ] Estimated total worst-case power supply draw |
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- [ ] Connectors |
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- [ ] I/Os are specified |
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- [ ] Sufficient Current and Voltage rating |
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@ -40,7 +40,7 @@ about: "Optional description" |
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- [ ] Specified min/max humidity |
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- [ ] ROHS compliance requirement review |
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### Components |
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- [ ] Uneccessary components are denoted DNI |
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- [ ] Unpopulated components are denoted DNI |
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- [ ] Components meet environmental specifications |
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- [ ] All components have quantity, reference designator and description |
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- [ ] Suggested and alternate manufacturers listed |
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@ -54,7 +54,6 @@ about: "Optional description" |
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- [ ] Document |
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- [ ] Dot on each connection |
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- [ ] No four-point connections |
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- [ ] Consistent character size for readability |
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- [ ] Title block completed for each sheet |
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- [ ] All components have reference designators and values |
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- [ ] Multi-part components don't have unplaced symbols |
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@ -88,15 +87,15 @@ about: "Optional description" |
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- [ ] General |
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- [ ] Sufficient bulk capacitance calculated |
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- [ ] Polarized components checked |
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- [ ] Electrolytic and tantalum capacitors checked for no reverse voltage |
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- [ ] Debug resources added by design (leds, serial ports, etc.) even if unpopulated by default |
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- [ ] Electrolytic/tantalum capacitors checked for no reverse voltage |
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- [ ] Electrolytic/tantalum capacitors temperature/voltage derating sufficient for MTBF |
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- [ ] Sufficient capacitance on low dropout voltage regulators |
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- [ ] Sufficient time delays and slew rates for comparators |
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- [ ] Sufficient common mode input voltage rating on opamps |
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- [ ] Check pin numbers of all custom-generated parts |
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- [ ] Electrolytic/tantalum capacitor temperature/voltage derating sufficient for MTBF |
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- [ ] Check reverse base-emitter current/voltage on bipolar transistors |
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- [ ] Power nets use preferred and consistent naming (ex. no `3.3V` vs `+3.3V`) |
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- [ ] Debug resources added by design (leds, serial ports, etc.) even if unpopulated by default |
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### PCB |
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- [ ] Manufacturing |
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- [ ] PCB manufacturing requirements noted on `fab` layer |
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@ -173,6 +172,7 @@ about: "Optional description" |
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- [ ] Via fencing of sensitive RF transission lines done with the proper via spacing (< 1/20 lambda) |
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- [ ] Option for a shielding can over sensitive circuitry e.g. RF? |
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- [ ] Copper pour |
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- [ ] All planes have been poured |
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- [ ] Planes and pours checked for high-impedance paths |
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- [ ] No pour between adjacent pins on ICs |
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- [ ] Traces |
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