Hardware/The Next Generation/FPGA_Module_Rev2/FPGA_Module.PrjPcb

@@ -33,7 +33,7 @@ FSMCodingStyle=eFMSDropDownList_OneProcess
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 VaultGUID=b03a642c-f334-40b3-b929-2941954f9f28
@@ -280,121 +280,101 @@ DocumentPath=Project Outputs for FPGA_Module\BOM\Bill of Materials-FPGA_Module.x
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@@ -466,7 +446,7 @@ SCH_HasExpandLogicalToPhysicalSheets=-1
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Hardware/The Next Generation/FPGA_Module_Rev2/Project Outputs for FPGA_Module/Design Rule Check - FPGA_Module.drc

@@ -1,15 +1,15 @@
 Protel Design System Design Rule Check
 PCB File : C:\Users\Aleksa\Documents\Altium\FPGA_Module\FPGA_Module.PcbDoc
-Date     : 2022-10-23
+Date     : 2022-10-25
-Time     : 9:52:01 PM
+Time     : 8:15:06 PM
-
-Processing Rule : Clearance Constraint (Gap=0.127mm) (InNet('PG_1V0')),(All)
-Rule Violations :0
 
 Processing Rule : Clearance Constraint (Gap=0.1mm) (HasFootprint('GEN_C_0201') or HasFootprint('GEN_R_0201')),(All)
 Rule Violations :0
 
-Processing Rule : Clearance Constraint (Gap=0.127mm) (All),(All)
+Processing Rule : Clearance Constraint (Gap=0.1mm) (isVia),(isPad and (HasFootprint('GEN_C_0201') or HasFootprint('GEN_R_0201')or HasFootprint('GEN_R_0402')or HasFootprint('GEN_C_0402')or HasFootprint('MX_WSON8')))
+Rule Violations :0
+
+Processing Rule : Clearance Constraint (Gap=0.127mm) (InNet('PG_1V0')),(All)
 Rule Violations :0
 
 Processing Rule : Clearance Constraint (Gap=0.127mm) (InComponent('U7')),(InComponent('U7'))
@@ -21,7 +21,7 @@ Rule Violations :0
 Processing Rule : Clearance Constraint (Gap=0.1mm) (InNetClass('DDR3 ADDR') or InNetClass('DQ0') or InNetClass('DQ1')  or InNetClass('DQ2') or InNetClass('DQ3')),(All)
 Rule Violations :0
 
-Processing Rule : Clearance Constraint (Gap=0.1mm) (isVia),(isPad and (HasFootprint('GEN_C_0201') or HasFootprint('GEN_R_0201')or HasFootprint('GEN_R_0402')or HasFootprint('GEN_C_0402')or HasFootprint('MX_WSON8')))
+Processing Rule : Clearance Constraint (Gap=0.127mm) (All),(All)
 Rule Violations :0
 
 Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
@@ -36,10 +36,10 @@ Rule Violations :0
 Processing Rule : Width Constraint (Min=0.127mm) (Max=1mm) (Preferred=0.254mm) (All)
 Rule Violations :0
 
-Processing Rule : Width Constraint (Min=0.127mm) (Max=0.213mm) (Preferred=0.127mm) ((InNetClass('DDR3 ADDR')) OR (InNetClass('DQ0')) OR (InNetClass('DQ1')) OR (InNetClass('DQ2')) OR (InNetClass('DQ3')))
+Processing Rule : Width Constraint (Min=0.1mm) (Max=0.254mm) (Preferred=0.127mm) (InNet('PG_1V0'))
 Rule Violations :0
 
-Processing Rule : Width Constraint (Min=0.1mm) (Max=0.254mm) (Preferred=0.127mm) (InNet('PG_1V0'))
+Processing Rule : Width Constraint (Min=0.127mm) (Max=0.213mm) (Preferred=0.127mm) ((InNetClass('DDR3 ADDR')) OR (InNetClass('DQ0')) OR (InNetClass('DQ1')) OR (InNetClass('DQ2')) OR (InNetClass('DQ3')))
 Rule Violations :0
 
 Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
@@ -54,25 +54,28 @@ Rule Violations :0
 Processing Rule : Minimum Solder Mask Sliver (Gap=0.098mm) (All),(All)
 Rule Violations :0
 
-Processing Rule : Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS1') or InNetClass('DQ1'))
+Processing Rule : Board Clearance Constraint (Gap=0mm) (All)
-Rule Violations :0
-
-Processing Rule : Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS0') or InNetClass('DQ0'))
-Rule Violations :0
-
-Processing Rule : Matched Lengths(Delay Tolerance=2ps) (InDifferentialPairClass('DDR3_CLK') or InDifferentialPairClass('DQS0') or InDifferentialPairClass('DQS1') or InDifferentialPairClass('DQS2') or InDifferentialPairClass('DQS3'))
 Rule Violations :0
 
 Processing Rule : Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS2') or InNetClass('DQ2'))
 Rule Violations :0
 
+Processing Rule : Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS0') or InNetClass('DQ0'))
+Rule Violations :0
+
+Processing Rule : Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS1') or InNetClass('DQ1'))
+Rule Violations :0
+
 Processing Rule : Matched Lengths(Delay Tolerance=5ps Target=DDR3_CLK_P_PP1) (InxSignalClass('xSignals_U1_U4,U5'))
 Rule Violations :0
 
+Processing Rule : Matched Lengths(Delay Tolerance=1ps) (InDifferentialPairClass('PCIe'))
+Rule Violations :0
+
 Processing Rule : Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS3') or InNetClass('DQ3'))
 Rule Violations :0
 
-Processing Rule : Matched Lengths(Delay Tolerance=1ps) (InDifferentialPairClass('PCIe'))
+Processing Rule : Matched Lengths(Delay Tolerance=2ps) (InDifferentialPairClass('DDR3_CLK') or InDifferentialPairClass('DQS0') or InDifferentialPairClass('DQS1') or InDifferentialPairClass('DQS2') or InDifferentialPairClass('DQS3'))
 Rule Violations :0
 
 Processing Rule : Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('ADC LVDS'))
@@ -96,4 +99,4 @@ Rule Violations :0
 
 Violations Detected : 0
 Waived Violations : 0
-Time Elapsed        : 00:00:02
+Time Elapsed        : 00:00:03

Hardware/The Next Generation/FPGA_Module_Rev2/Project Outputs for FPGA_Module/Design Rule Check - FPGA_Module.html

@@ -219,17 +219,17 @@
 <tr class="front_matter">
 <td class="front_matter_column1">Date:</td>
 <td class="front_matter_column2"></td>
-<td class="front_matter_column3">2022-10-23</td>
+<td class="front_matter_column3">2022-10-25</td>
 </tr>
 <tr class="front_matter">
 <td class="front_matter_column1">Time:</td>
 <td class="front_matter_column2"></td>
-<td class="front_matter_column3">9:52:01 PM</td>
+<td class="front_matter_column3">8:15:06 PM</td>
 </tr>
 <tr class="front_matter">
 <td class="front_matter_column1">Elapsed Time:</td>
 <td class="front_matter_column2"></td>
-<td class="front_matter_column3">00:00:02</td>
+<td class="front_matter_column3">00:00:03</td>
 </tr>
 <tr class="front_matter">
 <td class="front_matter_column1">Filename:</td>
@@ -250,7 +250,7 @@
 <td class="DRC_summary_header_col3">0</td></tr>
 </table>
 </td>
-</table><a name="IDOX2JXHXMVCHGIV2ABXBN5DDILJ4AILYXUI2NHCEQ30N42GOM0HRI"><h2>Summary</h2></a><table>
+</table><a name="IDOA3XNZBWJSETMSD5QIBCJM4XHKSRCQEQGEQYT5JR10MCJKTNJMMM"><h2>Summary</h2></a><table>
 <tr>
 <th class="column1">Warnings</th>
 <th class="column2">Count</th>
@@ -265,123 +265,127 @@
 <th class="column2">Count</th>
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-<td class="column1"><a href="#ID04Q3XOHHUKUFDRP3CZPEABQRSLN3UWSPU0TVAPEPTWA0WBYZIQHG">Clearance Constraint (Gap=0.127mm) (InNet('PG_1V0')),(All)</a></td>
+<td class="column1"><a href="#ID31WZ2KNX03Q0CJOJHYGYGURPWEV3IXGJFDIRP2PW5JZNH0YPXWMG">Clearance Constraint (Gap=0.1mm) (HasFootprint('GEN_C_0201') or HasFootprint('GEN_R_0201')),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDAJDV2DV0U34VJ1P0VIBI0BQ5JKH2HI4WLL3HEMBMW1VZL3IZD4MO">Clearance Constraint (Gap=0.1mm) (HasFootprint('GEN_C_0201') or HasFootprint('GEN_R_0201')),(All)</a></td>
+<td class="column1"><a href="#IDYEWL2F5XYFRQGHRYXVMNWIB4QELA3T5CI4X1MSIUL4C41TLVWNK">Clearance Constraint (Gap=0.1mm) (isVia),(isPad and (HasFootprint('GEN_C_0201') or HasFootprint('GEN_R_0201')or HasFootprint('GEN_R_0402')or HasFootprint('GEN_C_0402')or HasFootprint('MX_WSON8')))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#ID0L3RF4T2EJXPC3BJPQVQIXJ5NH0ZNF2VRMF4CPE3HKD4EFPW1G0K">Clearance Constraint (Gap=0.127mm) (All),(All)</a></td>
+<td class="column1"><a href="#IDFX2MRHYANOWACTJBIPLZAUHEGI4BIVHRHSYUSFBYCA5LXF2IOXGN">Clearance Constraint (Gap=0.127mm) (InNet('PG_1V0')),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDELOGURWARZ02LHCHWTEPFQOIHHPO3VZHNZTVWGHLNJNXMGCKEMHD">Clearance Constraint (Gap=0.127mm) (InComponent('U7')),(InComponent('U7'))</a></td>
+<td class="column1"><a href="#IDJXXZZKN0H14XHGZJQVAJB1RPIKK0AHBIE4NWVWJFUX5OENAHNAIH">Clearance Constraint (Gap=0.127mm) (InComponent('U7')),(InComponent('U7'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDRTNS2ZU4JCNQHU1MAPCB00WBSF2OJU5QNJPQMWHNZGPXDWZQWQYH">Clearance Constraint (Gap=0.127mm) (isVia),(IsPad or IsVia)</a></td>
+<td class="column1"><a href="#ID15G05Y1SIY04L42LCPLDYUWKKCCV0DLWVXNBCACRD1MMNA0TIIBO">Clearance Constraint (Gap=0.127mm) (isVia),(IsPad or IsVia)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#ID3XZ0INEIAHLSJIO5GAMJZOHFOBHV55VCQEUDZNHYNTE0QBCFUVPN">Clearance Constraint (Gap=0.1mm) (InNetClass('DDR3 ADDR') or InNetClass('DQ0') or InNetClass('DQ1')  or InNetClass('DQ2') or InNetClass('DQ3')),(All)</a></td>
+<td class="column1"><a href="#IDBOK0IZVZW1V3ML2HORY41HHOPMJCHBDDNBVU25GTIC1EWBQO1PV">Clearance Constraint (Gap=0.1mm) (InNetClass('DDR3 ADDR') or InNetClass('DQ0') or InNetClass('DQ1')  or InNetClass('DQ2') or InNetClass('DQ3')),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDMOD1STYOPPBTFXGSTMODK2HRFGWN0JS250AH22I2Q1BAR5ETGV3L">Clearance Constraint (Gap=0.1mm) (isVia),(isPad and (HasFootprint('GEN_C_0201') or HasFootprint('GEN_R_0201')or HasFootprint('GEN_R_0402')or HasFootprint('GEN_C_0402')or HasFootprint('MX_WSON8')))</a></td>
+<td class="column1"><a href="#ID0HB0HAERPXHRETCWZJHYOI5SBJ0V130V4QMFNWJ4DOLAORQXYGRI">Clearance Constraint (Gap=0.127mm) (All),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDPHOBJY12XZKKFRY5P0NUYBAFIFWFUHQHXDTAQ4PHDP5RUZEEKT1">Short-Circuit Constraint (Allowed=No) (All),(All)</a></td>
+<td class="column1"><a href="#IDATOG0YQZEL4TFU3E1YMOJ5RRXPOS2F2V4M4HKGK2Q4ATN1HSHLPN">Short-Circuit Constraint (Allowed=No) (All),(All)</a></td>
 <td class="column2">0</td>
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 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDIXJXWZANLA53H1GRE1AW2VKUNBLWIF53ELZQSUHHIG33FJFJIQIM">Un-Routed Net Constraint ( (All) )</a></td>
+<td class="column1"><a href="#IDM5IWZH2XIGPCKQIK5S2KAMWABJSUJCHNXEGRTWMRRHOWOPRK05TO">Un-Routed Net Constraint ( (All) )</a></td>
 <td class="column2">0</td>
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+<td class="column1"><a href="#IDDWBTJNSSPI1PLUC0BSQQXVA4XBY3O543QBSVLMFP2P4IN0CVRY1I">Modified Polygon (Allow modified: No), (Allow shelved: No)</a></td>
 <td class="column2">0</td>
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-<td class="column1"><a href="#IDGE0LLLDPN5ZTMFKTFY4NB4SLUF4ZQ3TCKBCZMLOWNJVDUNI4ENG">Width Constraint (Min=0.127mm) (Max=1mm) (Preferred=0.254mm) (All)</a></td>
+<td class="column1"><a href="#IDSN2FDSXI1XQSI0OER1LNKYQ1HFYDG3LBVSTMIVFGRILOVXLKMZDO">Width Constraint (Min=0.127mm) (Max=1mm) (Preferred=0.254mm) (All)</a></td>
 <td class="column2">0</td>
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-<td class="column1"><a href="#IDXTPC0D1JSIPXCKAOG3IZ542SAFELZNMD3Z3JYDKUR31QNDXEGTFN">Width Constraint (Min=0.127mm) (Max=0.213mm) (Preferred=0.127mm) ((InNetClass('DDR3 ADDR')) OR (InNetClass('DQ0')) OR (InNetClass('DQ1')) OR (InNetClass('DQ2')) OR (InNetClass('DQ3')))</a></td>
+<td class="column1"><a href="#IDDQJFA0EFAM5GMBJ44AJTVRQYLP5M0CMKQSCQLQLFTWTUMM3M3O4G">Width Constraint (Min=0.1mm) (Max=0.254mm) (Preferred=0.127mm) (InNet('PG_1V0'))</a></td>
 <td class="column2">0</td>
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-<td class="column1"><a href="#IDJN3BHLPKCCUGHHL30VBD1WNAFFIRRNCFASRO5HJ4ZZWLXEPVCM1K">Width Constraint (Min=0.1mm) (Max=0.254mm) (Preferred=0.127mm) (InNet('PG_1V0'))</a></td>
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 <td class="column2">0</td>
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-<td class="column1"><a href="#ID5CJTEN13WT1BH1QK3SYWNIY24EGOIDWOERE0GCKAPUQSNE20J3XO">Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)</a></td>
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 <td class="column2">0</td>
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 <td class="column2">0</td>
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-<td class="column1"><a href="#IDRNMBNWJA4MUBK4GAVPISXFVHNCYJXVPB01KA44DDKVGNSIA3ZNAI">Hole To Hole Clearance (Gap=0.254mm) (All),(All)</a></td>
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 <td class="column2">0</td>
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+<td class="column1"><a href="#IDCP42CTEZHLR2J3LUQYUK5RAEHJOAHJCT2BXRKROMZNN2YYUQWFI">Minimum Solder Mask Sliver (Gap=0.098mm) (All),(All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDQDQJ1MFODH1JIAHMIEJXDGH54LFDZDJ2IZYCV1FSPY4GN2WDROSO">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS1') or InNetClass('DQ1'))</a></td>
+<td class="column1"><a href="#IDAIG3VZL0GKJSDWYIVWJ0AGZRSCLU3AWBZO55NVH0BVVTDO2EP4WI">Board Clearance Constraint (Gap=0mm) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDQERMAAEMEVWWPDSIR3UY0KIVYCG3LO2AV2SGLPJRMJK5O3IGE4X">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS0') or InNetClass('DQ0'))</a></td>
+<td class="column1"><a href="#IDESBICYBF4114HGCUNGO2F1X0QFO5QIGPO3QN1WGCSIXD0LZPPQYC">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS2') or InNetClass('DQ2'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDLQJKLXHMCBLABUHMTSBKF0TRLGFRGMPD5CBCBQJPWEIBXB2HFQNI">Matched Lengths(Delay Tolerance=2ps) (InDifferentialPairClass('DDR3_CLK') or InDifferentialPairClass('DQS0') or InDifferentialPairClass('DQS1') or InDifferentialPairClass('DQS2') or InDifferentialPairClass('DQS3'))</a></td>
+<td class="column1"><a href="#IDFZM1OZTECV34KMLEDSHCDCR3AFPSVR44CDA2UCH5UQVN44TX4BCN">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS0') or InNetClass('DQ0'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#ID0ITJGCCBL00VJOEIWDG0F45P2IAAVAAGOZYE1SDVIOI2G1MKQQKP">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS2') or InNetClass('DQ2'))</a></td>
+<td class="column1"><a href="#IDEFVAROP4JYY1GJIDKO5PO1LEVXDLRSLX31QVXNXCLATJB3VY3YE">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS1') or InNetClass('DQ1'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDM0P4X0ZPALDICWPNFHYGC5X2DLFRBCTSSTF41RPKU4QRRSDG4QPK">Matched Lengths(Delay Tolerance=5ps Target=DDR3_CLK_P_PP1) (InxSignalClass('xSignals_U1_U4,U5'))</a></td>
+<td class="column1"><a href="#ID0G5S5TJQX54ZCVIMFY3PPN3K3JY53QDZ1LAJNOE2FIXRFAC2FGQK">Matched Lengths(Delay Tolerance=5ps Target=DDR3_CLK_P_PP1) (InxSignalClass('xSignals_U1_U4,U5'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDJGR5V0AIQSASPCFSD0VZ5OGIKOLY4NOAJ1EWZ3DXWLDKMXP5QOCM">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS3') or InNetClass('DQ3'))</a></td>
+<td class="column1"><a href="#ID345EI3WWL3ZSO4OPFPHWAD4J1HUTRGD3Y4WQCUK2QO2RTUBWR5QF">Matched Lengths(Delay Tolerance=1ps) (InDifferentialPairClass('PCIe'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDMOX2BTR4VR3MIV5AIP3BU3LALG5WF1BCPFXE5RKRZZ3YH4XW5BPN">Matched Lengths(Delay Tolerance=1ps) (InDifferentialPairClass('PCIe'))</a></td>
+<td class="column1"><a href="#IDVMLLNKEV4L0LMQLZOAOA5VS5RMOHS04I130DKLO3ZRUKN1ZRFLHG">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('DQS3') or InNetClass('DQ3'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDWWPHNRPD4W3FCZYZY41VDS3RVDKFSBOKET1PQMETYXG5LHBC4PRB">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('ADC LVDS'))</a></td>
+<td class="column1"><a href="#IDBPE4OLYLDDWYO3RDGJNPG4JV4IFJL0RH14HJRVB2ZEV22GTMOOOK">Matched Lengths(Delay Tolerance=2ps) (InDifferentialPairClass('DDR3_CLK') or InDifferentialPairClass('DQS0') or InDifferentialPairClass('DQS1') or InDifferentialPairClass('DQS2') or InDifferentialPairClass('DQS3'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#ID22LNWT4ROXNVPWRUHI5BWYVNIDZWBWIJT3KQYFK0G1DVTK5NO42J">Matched Lengths(Delay Tolerance=2ps) (InDifferentialPairClass('ADC LVDS'))</a></td>
+<td class="column1"><a href="#IDDX2U1NRYITNZBNI4QCFGL0PUSJ3XBQCOTOBKYUHE21RR3ESLSDWI">Matched Lengths(Delay Tolerance=5ps) (InDifferentialPairClass('ADC LVDS'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDN55V0FWJTX3LBE3CNTRV3DBYXGS0DTHIYJCSIPKJWLXAPJ1P3H3B">Matched Lengths(Delay Tolerance=5ps) (Disabled)(InNetClass('DDR3 ADDR'))</a></td>
+<td class="column1"><a href="#IDGHCUJFH14DUJHARJFK3YEMCLDCHXENMPVKA3BLIZWGQZTC2N3DWP">Matched Lengths(Delay Tolerance=2ps) (InDifferentialPairClass('ADC LVDS'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#ID1DHYC5EDLOZEIORPGLM1FMJL0PTVX4KL5Z0RQSDC4XIYTOACFMJB">Vias Under SMD Constraint (Allowed=Not Allowed) ((HasFootprint('GEN_C_0201') OR HasFootprint('GEN_R_0201') OR HasFootprint('GEN_C_0402') OR HasFootprint('GEN_R_0402')))</a></td>
+<td class="column1"><a href="#IDMG4QEPINWALEES3WAAVLUV4Q1IO11W5GCQKG5LHQOAN0UROO4JUJ">Matched Lengths(Delay Tolerance=5ps) (Disabled)(InNetClass('DDR3 ADDR'))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
-<td class="column1"><a href="#IDE51WKMH5W2EXJPBSTNOZXRG1UI3OS2X0QUO5RXPKNHGJFWG20B0">Component Clearance Constraint ( Horizontal Gap = 0.127mm, Vertical Gap = 0.254mm ) (All),(All) </a></td>
+<td class="column1"><a href="#IDMQJKPCRTBW35CNOTVDBAG2WCIDZ0IZBEC230VMHCGNGXXAMSW1TI">Vias Under SMD Constraint (Allowed=Not Allowed) ((HasFootprint('GEN_C_0201') OR HasFootprint('GEN_R_0201') OR HasFootprint('GEN_C_0402') OR HasFootprint('GEN_R_0402')))</a></td>
 <td class="column2">0</td>
 </tr>
 <tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
-<td class="column1"><a href="#IDARIDIBDDH010BCMOGGXBGBFJPLZ4EMB1DFDFQHL0WGU3QKZ12JTO">Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)</a></td>
+<td class="column1"><a href="#IDXWF1P1EMPBW1K20KRCHQFJKPMHIJ2NQHIBPM0ZFUHNDITJJDDPZB">Component Clearance Constraint ( Horizontal Gap = 0.127mm, Vertical Gap = 0.254mm ) (All),(All) </a></td>
+<td class="column2">0</td>
+</tr>
+<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
+<td class="column1"><a href="#ID0SES05K5CQXZ2QMYAU0IYCK3FNSOWDGW5WKITDZ5PETHCLKU1EL">Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)</a></td>
 <td class="column2">0</td>
 </tr>
 <tr>