diff --git a/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0.xml b/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0.xml index 4974642..357e542 100644 --- a/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0.xml +++ b/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/bd/design_1/ip/design_1_mig_7series_0_0/design_1_mig_7series_0_0.xml @@ -23004,7 +23004,7 @@ GENtimestamp - Tue Mar 07 02:50:09 UTC 2023 + Sun May 07 20:53:22 UTC 2023 outputProductCRC diff --git a/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/imports/hdl/dso_top.v b/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/imports/hdl/dso_top.v index b412d0c..237bf4f 100644 --- a/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/imports/hdl/dso_top.v +++ b/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.srcs/sources_1/imports/hdl/dso_top.v @@ -79,6 +79,7 @@ module dso_top reg[63:0] adc_data; wire serdes_ready; + assign term = gpio_io_o_0[15:12]; assign atten = gpio_io_o_0[19:16]; assign dc_cpl = gpio_io_o_0[23:20]; diff --git a/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.xpr b/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.xpr index 3bc051b..df63926 100644 --- a/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.xpr +++ b/Firmware/dso_top_TE0712_Rev3_Baseboard/TE0712_Rev3_Baseboard.xpr @@ -73,8 +73,11 @@ - - + + + + + @@ -82,33 +85,30 @@ - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + diff --git a/Firmware/dso_top_TE0712_Rev3_Baseboard/dso_top_TE0712_Rev3_Baseboard.bin b/Firmware/dso_top_TE0712_Rev3_Baseboard/dso_top_TE0712_Rev3_Baseboard.bin index 8011309..add6621 100644 Binary files a/Firmware/dso_top_TE0712_Rev3_Baseboard/dso_top_TE0712_Rev3_Baseboard.bin and b/Firmware/dso_top_TE0712_Rev3_Baseboard/dso_top_TE0712_Rev3_Baseboard.bin differ diff --git a/Software/TS.NET/source/TS.NET/Hardware/HardwareDefinitions.cs b/Software/TS.NET/source/TS.NET/Hardware/HardwareDefinitions.cs index f29fe88..6b1e842 100644 --- a/Software/TS.NET/source/TS.NET/Hardware/HardwareDefinitions.cs +++ b/Software/TS.NET/source/TS.NET/Hardware/HardwareDefinitions.cs @@ -38,7 +38,6 @@ internal enum AdcRegister : byte THUNDERSCOPEHW_ADC_REG_GAIN_CFG = 0x33, THUNDERSCOPEHW_ADC_REG_INSEL12 = 0x3A, THUNDERSCOPEHW_ADC_REG_INSEL34 = 0x3B, - THUNDERSCOPEHW_ADC_REG_FS_CNTRL = 0x55, - THUNDERSCOPEHW_ADC_REG_RES_SEL = 0x53, - THUNDERSCOPEHW_ADC_REG_LVDS_CNTRL = 0x42 + THUNDERSCOPEHW_ADC_REG_LVDS_CNTRL = 0x53, + THUNDERSCOPEHW_ADC_REG_FS_CNTRL = 0x55 } diff --git a/Software/TS.NET/source/TS.NET/Hardware/Thunderscope.cs b/Software/TS.NET/source/TS.NET/Hardware/Thunderscope.cs index 8918fdb..5f26dab 100644 --- a/Software/TS.NET/source/TS.NET/Hardware/Thunderscope.cs +++ b/Software/TS.NET/source/TS.NET/Hardware/Thunderscope.cs @@ -121,13 +121,6 @@ namespace TS.NET private void Initialise() { Write32(BarRegister.DATAMOVER_REG_OUT, 0); - - //Comment out below for Rev.1 - hardwareState.PllEnabled = true; //RSTn high --> PLL active - ConfigureDatamover(hardwareState); - Thread.Sleep(1); - //Comment out above for Rev.1 - hardwareState.BoardEnabled = true; ConfigureDatamover(hardwareState); ConfigurePLL(); @@ -215,11 +208,6 @@ namespace TS.NET } Write32(BarRegister.DATAMOVER_REG_OUT, datamoverRegister); } - - /* - ------------------------------------------------------------------ - UNCOMMENT THIS FOR REV 1 BASEBOARD - ------------------------------------------------------------------ private void ConfigurePLL() { @@ -256,68 +244,6 @@ namespace TS.NET fifo[3] = value; WriteFifo(fifo); } - */ - - /* - ------------------------------------------------------------------ - COMMENT BELOW OUT FOR REV 1 BASEBOARD - ------------------------------------------------------------------ - */ - - private void ConfigurePLL() - { - //Strobe RST line on power on - Thread.Sleep(1); - hardwareState.PllEnabled = false; //RSTn low --> PLL reset - ConfigureDatamover(hardwareState); - Thread.Sleep(1); - hardwareState.PllEnabled = true; //RSTn high --> PLL active - ConfigureDatamover(hardwareState); - Thread.Sleep(1); - - // These were provided by the chip configuration tool. - uint[] config_clk_gen = { - 0X000902, 0X062108, 0X063140, 0X010006, - 0X010120, 0X010202, 0X010380, 0X010A20, - 0X010B03, 0X01140D, 0X012006, 0X0125C0, - 0X012660, 0X01277F, 0X012904, 0X012AB3, - 0X012BC0, 0X012C80, 0X001C10, 0X001D80, - 0X034003, 0X020141, 0X022135, 0X022240, - 0X000C02, 0X000B01}; - - // write to the clock generator - for (int i = 0; i < config_clk_gen.Length; i++) - { - SetPllRegister((byte)(config_clk_gen[i] >> 16),(byte)(config_clk_gen[i] >> 8), (byte)(config_clk_gen[i] & 0xff)); - } - - Thread.Sleep(10); - - SetPllRegister((byte)(0x00),(byte)(0x0D), (byte)(0x05)); - - Thread.Sleep(10); - } - - const byte I2C_BYTE_PLL = 0xFF; - const byte CLOCK_GEN_I2C_ADDRESS_WRITE = 0b11011000; - const byte CLOCK_GEN_WRITE_COMMAND = 0x02; - private void SetPllRegister(byte reg_high, byte reg_low, byte value) - { - Span fifo = new byte[6]; - fifo[0] = I2C_BYTE_PLL; - fifo[1] = CLOCK_GEN_I2C_ADDRESS_WRITE; - fifo[2] = CLOCK_GEN_WRITE_COMMAND; - fifo[3] = reg_high; - fifo[4] = reg_low; - fifo[5] = value; - WriteFifo(fifo); - } - - /* - ------------------------------------------------------------------ - COMMENT ABOVE OUT FOR REV 1 BASEBOARD - ------------------------------------------------------------------ - */ private void ConfigureADC() { @@ -325,7 +251,7 @@ namespace TS.NET SetAdcRegister(AdcRegister.THUNDERSCOPEHW_ADC_REG_RESET, 0x0001); // Power Down ADC AdcPower(false); - // LVDS Phase to 0deg to work with edge aligned receiver + // Set 8-bit mode (for HMCAD1520, won't do anything for HMCAD1511) SetAdcRegister(AdcRegister.THUNDERSCOPEHW_ADC_REG_LVDS_CNTRL, 0x0000); // Invert channels SetAdcRegister(AdcRegister.THUNDERSCOPEHW_ADC_REG_INVERT, 0x007F); @@ -342,9 +268,6 @@ namespace TS.NET //currentBoardState.ch_is_on[0] = true; //_FIFO_WRITE(user_handle,currentBoardState.adc_chnum_clkdiv,sizeof(currentBoardState.adc_chnum_clkdiv)); - // Set 8-bit mode (for HMCAD1520, won't do anything for HMCAD1511) - SetAdcRegister(AdcRegister.THUNDERSCOPEHW_ADC_REG_RES_SEL, 0x0000); - AdcPower(true); //_FIFO_WRITE(user_handle,currentBoardState.adc_in_sel_12,sizeof(currentBoardState.adc_in_sel_12)); //_FIFO_WRITE(user_handle,currentBoardState.adc_in_sel_34,sizeof(currentBoardState.adc_in_sel_34));