119 lines
3.2 KiB
C
119 lines
3.2 KiB
C
/*
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* This file is part of the Xilinx DMA IP Core driver for Linux
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*
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* Copyright (c) 2016-present, Xilinx, Inc.
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* All rights reserved.
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*
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* This source code is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in
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* the file called "COPYING".
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*/
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#ifndef __XDMA_MODULE_H__
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#define __XDMA_MODULE_H__
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/cdev.h>
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#include <linux/dma-mapping.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/jiffies.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/mm_types.h>
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#include <linux/poll.h>
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#include <linux/pci.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/workqueue.h>
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#include <linux/aio.h>
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#include <linux/splice.h>
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#include <linux/version.h>
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#include <linux/uio.h>
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#include <linux/spinlock_types.h>
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#include "libxdma.h"
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#include "xdma_thread.h"
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#define MAGIC_ENGINE 0xEEEEEEEEUL
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#define MAGIC_DEVICE 0xDDDDDDDDUL
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#define MAGIC_CHAR 0xCCCCCCCCUL
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#define MAGIC_BITSTREAM 0xBBBBBBBBUL
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extern unsigned int desc_blen_max;
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extern unsigned int h2c_timeout;
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extern unsigned int c2h_timeout;
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struct xdma_cdev {
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unsigned long magic; /* structure ID for sanity checks */
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struct xdma_pci_dev *xpdev;
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struct xdma_dev *xdev;
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dev_t cdevno; /* character device major:minor */
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struct cdev cdev; /* character device embedded struct */
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int bar; /* PCIe BAR for HW access, if needed */
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unsigned long base; /* bar access offset */
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struct xdma_engine *engine; /* engine instance, if needed */
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struct xdma_user_irq *user_irq; /* IRQ value, if needed */
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struct device *sys_device; /* sysfs device */
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spinlock_t lock;
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};
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/* XDMA PCIe device specific book-keeping */
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struct xdma_pci_dev {
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unsigned long magic; /* structure ID for sanity checks */
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struct pci_dev *pdev; /* pci device struct from probe() */
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struct xdma_dev *xdev;
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int major; /* major number */
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int instance; /* instance number */
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int user_max;
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int c2h_channel_max;
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int h2c_channel_max;
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unsigned int flags;
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/* character device structures */
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struct xdma_cdev ctrl_cdev;
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struct xdma_cdev sgdma_c2h_cdev[XDMA_CHANNEL_NUM_MAX];
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struct xdma_cdev sgdma_h2c_cdev[XDMA_CHANNEL_NUM_MAX];
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struct xdma_cdev events_cdev[16];
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struct xdma_cdev user_cdev;
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struct xdma_cdev bypass_c2h_cdev[XDMA_CHANNEL_NUM_MAX];
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struct xdma_cdev bypass_h2c_cdev[XDMA_CHANNEL_NUM_MAX];
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struct xdma_cdev bypass_cdev_base;
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struct xdma_cdev xvc_cdev;
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void *data;
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};
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struct cdev_async_io {
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struct kiocb *iocb;
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struct xdma_io_cb *cb;
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bool write;
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bool cancel;
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int cmpl_cnt;
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int req_cnt;
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spinlock_t lock;
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struct work_struct wrk_itm;
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struct cdev_async_io *next;
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ssize_t res;
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ssize_t res2;
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int err_cnt;
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};
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#endif /* ifndef __XDMA_MODULE_H__ */
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