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https://github.com/Indemsys/Frequency_Inverter.git
synced 2026-05-07 13:51:27 +00:00
320 lines
22 KiB
C
320 lines
22 KiB
C
#include "app_types.h"
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#include <MK60F15.h>
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typedef struct
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{
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GPIO_MemMapPtr gpio;
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PORT_MemMapPtr port;
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unsigned char pin_num;
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unsigned char irqc; // Interrupt Configuration
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// 0000 Interrupt/DMA Request disabled.
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// 0001 DMA Request on rising edge.
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// 0010 DMA Request on falling edge.
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// 0011 DMA Request on either edge.
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// 0100 Reserved.
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// 1000 Interrupt when logic zero.
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// 1001 Interrupt on rising edge.
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// 1010 Interrupt on falling edge.
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// 1011 Interrupt on either edge.
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// 1100 Interrupt when logic one.
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unsigned char lock; // if 1 Pin Control Register bits [15:0] are locked and cannot be updated until the next System Reset.
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unsigned char mux; // Pin Mux Control
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// 000 Pin Disabled (Analog).
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// 001 Alternative 1 (GPIO).
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// 010 Alternative 2 (chip specific).
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// 011 Alternative 3 (chip specific).
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// 100 Alternative 4 (chip specific).
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// 101 Alternative 5 (chip specific).
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// 110 Alternative 6 (chip specific).
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// 111 Alternative 7 (chip specific / JTAG / NMI).
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unsigned char DSE; // 0 Low drive strength is configured on the corresponding pin, if pin is configured as a digital output.
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// 1 High drive strength is configured on the corresponding pin, if pin is configured as a digital output.
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unsigned char SRE; // 0 Fast slew rate is configured on the corresponding pin, if pin is configured as a digital output.
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// 1 Slow slew rate is configured on the corresponding pin, if pin is configured as a digital output.
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unsigned char ODE; // 0 Open Drain output is disabled on the corresponding pin.
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// 1 Open Drain output is enabled on the corresponding pin, provided pin is configured as a digital output.
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unsigned char PFE; // 0 Passive Input Filter is disabled on the corresponding pin.
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// 1 Passive Input Filter is enabled on the corresponding pin.
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unsigned char PUPD; // 00 Internal pull-up or pull-down resistor is not enabled on the corresponding pin.
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// 10 Internal pull-down resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable Register bit is set.
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// 11 Internal pull-up resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable Register bit is set.
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unsigned char dir; // 0 Pin is configured as general purpose input, if configured for the GPIO function
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// 1 Pin is configured for general purpose output, if configured for the GPIO function
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unsigned char init; // Init state
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} T_IO_pins_configuration;
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#define ANAL 0
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#define GPIO 1
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#define ALT2 2
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#define ALT3 3
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#define ALT4 4
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#define ALT5 5
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#define ALT6 6
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#define ALT7 7
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#define DSE_LO 0
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#define DSE_HI 1
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#define OD_DIS 0
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#define OD__EN 1
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#define PFE_DIS 0
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#define PFE__EN 1
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#define FAST_SLEW 0
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#define SLOW_SLEW 1
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#define PUPD_DIS 0
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#define PULL__DN 2
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#define PULL__UP 3
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#define GP_INP 0
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#define GP_OUT 1
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const T_IO_pins_configuration gen_pins_conf[] =
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{
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// gpio port num irqc lock mux DSE SRE ODE PFE PUPD dir init
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 0, 0, 1, ALT7, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // JTAG_TCLK
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 1, 0, 1, ALT7, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // JTAG_TDI
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 2, 0, 1, ALT7, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // JTAG_TDO
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 3, 0, 1, ALT7, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // JTAG_TMS
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 4, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 5, 0, 1, ALT7, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // JTAG_TRST
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 6, 0, 1, ALT5, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // CLKOUT - тестовый выход
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// { PTA_BASE_PTR, PORTA_BASE_PTR, 6, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_OUT, 1 }, // CLKOUT - тестовый выход
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 7, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 8, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ZCROSS
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 9, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 10, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // ENC1, вход энкодера
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 11, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // ENC2, вход энкодера
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 12, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // PWM_OE, вход наблюдателя за блокировкой PWM
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 13, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_OUT, 1 }, // PWM_EN, выход разрешения PWM (1-запрещает, 0-разрешает)
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 14, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // OUT2
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 15, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // OUT3
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 16, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // OUT1
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 17, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PUPD_DIS, GP_INP, 0 }, // IN1
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// Нельзя трогать выводы осциллятора иначе чип перестает работать с JTAG программироваться из IAR
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// { PTA_BASE_PTR, PORTA_BASE_PTR, 18, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // EXTAL
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// { PTA_BASE_PTR, PORTA_BASE_PTR, 19, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // XTAL
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 24, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD__EN, PFE_DIS, PULL__UP, GP_OUT, 0 }, // LED1. Включается от лог.0
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 25, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD__EN, PFE_DIS, PULL__UP, GP_OUT, 1 }, // LED2. Включается от лог.0
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 26, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD__EN, PFE_DIS, PULL__UP, GP_OUT, 1 }, // LED3. Включается от лог.0
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 27, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 28, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTA_BASE_PTR, PORTA_BASE_PTR, 29, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // V_U. Измерение напряжение на выходе M1
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 0, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 1, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 2, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // V_W. Измерение напряжение на выходе M3
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 3, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // VFO. Оповещение от драйвера FSBB30CH60CT
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 4, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 5, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 6, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // V_V. Измерение напряжение на выходе M2
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 7, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 8, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 9, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 10, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // TOS1. Оповещение от измерителя температуры IGBT модуля
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 11, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 16, 0, 0, ALT3, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // UART_RX
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 17, 0, 0, ALT3, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // UART_TX
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 18, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // CAN_TX
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 19, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // CAN_RX
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 20, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SPI2_CS. SPI Flash
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 21, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SPI2_CLK. SPI Flash
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 22, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SPI2_SOUT. SPI Flash
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{ PTB_BASE_PTR, PORTB_BASE_PTR, 23, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SPI2_SIN. SPI Flash
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 0, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // SPI_RES. Сброс SPI Flash
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 1, 0, 0, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__DN, GP_INP, 0 }, // T0C0. PWM канал 0
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 2, 0, 0, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__DN, GP_INP, 0 }, // T0C1. PWM канал 1
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 3, 0, 0, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__DN, GP_INP, 0 }, // T0C2. PWM канал 2
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 4, 0, 0, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__DN, GP_INP, 0 }, // T0C3. PWM канал 3
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 5, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 6, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 7, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 8, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 9, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 10, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 11, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 12, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // CAN_SENS
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 13, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // NTC_BYPASS
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 14, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 1 }, // USBCTRL
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 15, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 16, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // DIP SW 1
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 17, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // DIP SW 2
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 18, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // DIP SW 3
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{ PTC_BASE_PTR, PORTC_BASE_PTR, 19, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // DIP SW 4
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 0, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // ---
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 1, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // ---
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 2, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 3, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // ---
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 4, 0, 0, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__DN, GP_INP, 0 }, // T0C4. PWM канал 4
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 5, 0, 0, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__DN, GP_INP, 0 }, // T0C5. PWM канал 5
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 6, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // BR_ON
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 7, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 8, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE__EN, PULL__UP, GP_INP, 0 }, // SCL
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 9, 0, 0, ALT2, DSE_HI, FAST_SLEW, OD_DIS, PFE__EN, PULL__UP, GP_INP, 0 }, // SDA
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 10, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 11, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // DSPL_RST
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 12, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // DSPL_SCL
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 13, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // DSPL_SI
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 14, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // DSPL_RS
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{ PTD_BASE_PTR, PORTD_BASE_PTR, 15, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // DSPL_SCB
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 0, 0, 1, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SD_D1
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 1, 0, 1, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SD_D0
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 2, 0, 1, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SD_CLK
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 3, 0, 1, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SD_CMD
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 4, 0, 1, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SD_D3
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 5, 0, 1, ALT4, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // SD_D2
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 6, 0, 0, ALT6, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // BUZZ
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 7, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_OUT, 0 }, // COOLER_ON
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 8, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // I_U
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 9, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 10, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
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{ PTE_BASE_PTR, PORTE_BASE_PTR, 11, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
|
||
{ PTE_BASE_PTR, PORTE_BASE_PTR, 12, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
|
||
|
||
{ PTE_BASE_PTR, PORTE_BASE_PTR, 24, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // V_BUS
|
||
{ PTE_BASE_PTR, PORTE_BASE_PTR, 25, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, //
|
||
{ PTE_BASE_PTR, PORTE_BASE_PTR, 26, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // 5V_MEAS
|
||
{ PTE_BASE_PTR, PORTE_BASE_PTR, 27, 0, 0, GPIO, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // ---
|
||
{ PTE_BASE_PTR, PORTE_BASE_PTR, 28, 0, 0, ANAL, DSE_HI, FAST_SLEW, OD_DIS, PFE_DIS, PULL__UP, GP_INP, 0 }, // 15V_MEAS
|
||
|
||
};
|
||
|
||
|
||
/*------------------------------------------------------------------------------
|
||
|
||
------------------------------------------------------------------------------*/
|
||
static void Config_pin(const T_IO_pins_configuration pinc)
|
||
{
|
||
pinc.port->PCR[pinc.pin_num] = LSHIFT(pinc.irqc, 16) |
|
||
LSHIFT(pinc.lock, 15) |
|
||
LSHIFT(pinc.mux, 8) |
|
||
LSHIFT(pinc.DSE, 6) |
|
||
LSHIFT(pinc.ODE, 5) |
|
||
LSHIFT(pinc.PFE, 4) |
|
||
LSHIFT(pinc.SRE, 2) |
|
||
LSHIFT(pinc.PUPD, 0);
|
||
|
||
if ( pinc.init == 0 ) pinc.gpio->PCOR = LSHIFT(1, pinc.pin_num);
|
||
else pinc.gpio->PSOR = LSHIFT(1, pinc.pin_num);
|
||
pinc.gpio->PDDR = (pinc.gpio->PDDR & ~LSHIFT(1, pinc.pin_num)) | LSHIFT(pinc.dir, pinc.pin_num);
|
||
}
|
||
|
||
|
||
/*------------------------------------------------------------------------------
|
||
|
||
------------------------------------------------------------------------------*/
|
||
int Init_pins(void)
|
||
{
|
||
int i;
|
||
|
||
// Включаем тактирование на всех портах
|
||
SIM_SCGC5 |= SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK | SIM_SCGC5_PORTF_MASK;
|
||
|
||
for (i = 0; i < (sizeof(gen_pins_conf) / sizeof(gen_pins_conf[0])); i++)
|
||
{
|
||
Config_pin(gen_pins_conf[i]);
|
||
}
|
||
|
||
// Конфигурируем цифровой фильтр для I2C
|
||
// Без фильтра происходит зависание контроллера I2C в схеме инвертора версии 2
|
||
PORTD_DFWR = 0x1F;
|
||
PORTD_DFER = BIT(8) + BIT(9);
|
||
return 0;
|
||
}
|
||
|
||
|
||
/*-------------------------------------------------------------------------------------------------------------
|
||
Установка состояния светодиодов
|
||
led_num - номер светодиода (1...3)
|
||
state - состояние ( 1 - включен, 0 - выключен)
|
||
-------------------------------------------------------------------------------------------------------------*/
|
||
void Led_control(int led_num, int state)
|
||
{
|
||
switch (led_num)
|
||
{
|
||
case 1:
|
||
if ( (state & BIT(0)) != 0 ) PTA_BASE_PTR->PCOR = LSHIFT(1, 24);
|
||
else PTA_BASE_PTR->PSOR = LSHIFT(1, 24);
|
||
break;
|
||
case 2:
|
||
if ( (state & BIT(0)) != 0 ) PTA_BASE_PTR->PCOR = LSHIFT(1, 25);
|
||
else PTA_BASE_PTR->PSOR = LSHIFT(1, 25);
|
||
break;
|
||
case 3:
|
||
if ( (state & BIT(0)) != 0 ) PTA_BASE_PTR->PCOR = LSHIFT(1, 26);
|
||
else PTA_BASE_PTR->PSOR = LSHIFT(1, 26);
|
||
break;
|
||
}
|
||
}
|
||
|
||
/*-------------------------------------------------------------------------------------------------------------
|
||
|
||
-------------------------------------------------------------------------------------------------------------*/
|
||
int Led_state(int led_num)
|
||
{
|
||
switch (led_num)
|
||
{
|
||
case 1:
|
||
return (PTA_BASE_PTR->PDOR>>24)&1;
|
||
break;
|
||
case 2:
|
||
return (PTA_BASE_PTR->PDOR>>25)&1;
|
||
break;
|
||
case 3:
|
||
return (PTA_BASE_PTR->PDOR>>26)&1;
|
||
break;
|
||
}
|
||
return 0;
|
||
}
|
||
/*-------------------------------------------------------------------------------------------------------------
|
||
Active LOW Reset Signal
|
||
-------------------------------------------------------------------------------------------------------------*/
|
||
void LCD_RST(int state)
|
||
{
|
||
if ( state == 0 ) PTD_BASE_PTR->PCOR = LSHIFT(1, 11);
|
||
else PTD_BASE_PTR->PSOR = LSHIFT(1, 11);
|
||
}
|
||
|
||
/*-------------------------------------------------------------------------------------------------------------
|
||
Serial clock
|
||
-------------------------------------------------------------------------------------------------------------*/
|
||
void LCD_SCL(int state)
|
||
{
|
||
if ( state == 0 ) PTD_BASE_PTR->PCOR = LSHIFT(1, 12);
|
||
else PTD_BASE_PTR->PSOR = LSHIFT(1, 12);
|
||
}
|
||
/*-------------------------------------------------------------------------------------------------------------
|
||
Input data
|
||
-------------------------------------------------------------------------------------------------------------*/
|
||
void LCD_SI(int state)
|
||
{
|
||
if ( state == 0 ) PTD_BASE_PTR->PCOR = LSHIFT(1, 13);
|
||
else PTD_BASE_PTR->PSOR = LSHIFT(1, 13);
|
||
}
|
||
/*-------------------------------------------------------------------------------------------------------------
|
||
Register Select Signal. RS=0: instruction; RS=1: data
|
||
-------------------------------------------------------------------------------------------------------------*/
|
||
void LCD_RS(int state)
|
||
{
|
||
if ( state == 0 ) PTD_BASE_PTR->PCOR = LSHIFT(1, 14);
|
||
else PTD_BASE_PTR->PSOR = LSHIFT(1, 14);
|
||
}
|
||
/*-------------------------------------------------------------------------------------------------------------
|
||
Active LOW Chip Select signal
|
||
-------------------------------------------------------------------------------------------------------------*/
|
||
void LCD_SCB(int state)
|
||
{
|
||
if ( state == 0 ) PTD_BASE_PTR->PCOR = LSHIFT(1, 15);
|
||
else PTD_BASE_PTR->PSOR = LSHIFT(1, 15);
|
||
}
|
||
|