Kasli/FPGA.Harness
2025-09-15 09:33:37 +02:00

5 lines
263 B
Plaintext
Executable File

CDR_PLL_CTRL=CLK_SEL,Helper_DCXO_OE,Helper_DCXO_SCL,Helper_DCXO_SDA,Main_DCXO_OE,Main_DCXO_SCL,Main_DCXO_SDA
EEM_PWR_MGMT=P3V3_EN,P12V0_EN,P3V3_FLT_N,P12V0_FLT_N
ExtensionConnector=LVDS_P[7..0],LVDS_N[7..0]
HW_REV=HW_REV0,HW_REV1,HW_REV2,HW_REV3,ASSY_Variant