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17 lines
433 B
VHDL
17 lines
433 B
VHDL
-- generated by newgenasym Fri Jul 16 10:21:26 2021
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity at24c02 is
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port (
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A0: INOUT STD_LOGIC;
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A1: INOUT STD_LOGIC;
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A2: INOUT STD_LOGIC;
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GND: INOUT STD_LOGIC;
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SCL: INOUT STD_LOGIC;
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SDA: INOUT STD_LOGIC;
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VCC: INOUT STD_LOGIC;
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WP: INOUT STD_LOGIC);
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end at24c02;
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