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12 lines
259 B
VHDL
12 lines
259 B
VHDL
-- generated by newgenasym Wed Jul 14 16:07:14 2021
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity l7805 is
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port (
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\1/input\: INOUT STD_LOGIC;
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\2/gnd\: INOUT STD_LOGIC;
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\3/ouput\: INOUT STD_LOGIC);
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end l7805;
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