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11 lines
229 B
VHDL
11 lines
229 B
VHDL
-- generated by newgenasym Thu Jul 15 13:15:42 2021
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library ieee;
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use ieee.std_logic_1164.all;
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use work.all;
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entity socket2 is
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port (
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GND: INOUT STD_LOGIC;
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\v+\: INOUT STD_LOGIC);
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end socket2;
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