7
mirror of https://github.com/issus/altium-library.git synced 2025-04-02 03:36:35 +00:00

Create symbols/MCU - STM32/SCH - MCU - STM32 - ST MICROELECTRONICS STM32F412R(E-G)YXP WLCSP64.SchLib

This commit is contained in:
Mark 2023-05-08 05:15:41 +01:00
parent 87df9c1e3b
commit 9e7eecbf0f

View File

Name
Comment
Description
Thumbnail
ST MICROELECTRONICS STM32F412R(E-G)YXP WLCSP64
*
VDD A1 VDD A8 VDD H1 VDD H7 VDDA F7 VBAT B7 NRST D7 PA0/ADC1_IN0/SYS_WKUP1/TIM2_CH1/TIM2_ETR/TIM5_CH1/TIM8_ETR/USART2_CTS E6 PA1/ADC1_IN1/I2S4_SD/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\3\/SPI4_MOSI/TIM2_CH2/TIM5_CH2/USART2_RTS G7 PA2/ADC1_IN2/FSMC_D4/FSMC_DA4/I2S_CKIN/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX H8 PA3/ADC1_IN3/FSMC_D5/FSMC_DA5/I2S2_MCK/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX F6 PA4/ADC1_IN4/DFSDM1_DATIN1/FSMC_D6/FSMC_DA6/I2S1_WS/I2S3_WS/S\P\I\1\_\N\S\S\/S\P\I\3\_\N\S\S\/USART2_CK G6 PA5/ADC1_IN5/DFSDM1_CKIN1/FSMC_D7/FSMC_DA7/I2S1_CK/SPI1_SCK/TIM2_CH1/TIM2_ETR/TIM8_CH1N F5 PA6/ADC1_IN6/I2S2_MCK/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\0\/SDIO_CMD/SPI1_MISO/TIM13_CH1/T\I\M\1\_\B\K\I\N\/TIM3_CH1/T\I\M\8\_\B\K\I\N\ H6 PA7/ADC1_IN7/I2S1_SD/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\1\/SPI1_MOSI/TIM14_CH1/TIM1_CH1N/TIM3_CH2/TIM8_CH1N E5 PA8/I2C3_SCL/RCC_MCO_1/SDIO_D1/TIM1_CH1/USART1_CK/USB_OTG_FS_SOF E3 PA9/I2C3_SMBA/SDIO_D2/TIM1_CH2/USART1_TX/USB_OTG_FS_VBUS D1 PA10/I2S5_SD/SPI5_MOSI/TIM1_CH3/USART1_RX/USB_OTG_FS_ID D2 PA11/ADC1_EXTI11/CAN1_RX/SPI4_MISO/TIM1_CH4/USART1_CTS/USART6_TX/USB_OTG_FS_DM D3 PA12/CAN1_TX/SPI5_MISO/TIM1_ETR/USART1_RTS/USART6_RX/USB_OTG_FS_DP C1 PA13/SYS_JTMS-SWDIO C2 PA14/SYS_JTCK-SWCLK B2 PA15/ADC1_EXTI15/I2S1_WS/I2S3_WS/S\P\I\1\_\N\S\S\/S\P\I\3\_\N\S\S\/SYS_JTDI/TIM2_CH1/TIM2_ETR/USART1_TX A2 VSS A7 VSS B1 VSS H2 VSSA G8 VCAP_1 H3 BOOT0 D4 PDR_ON C6 VDD A1 VDD A8 VDD H1 VDD H7 VDDA F7 VBAT B7 NRST D7 PA0/ADC1_IN0/SYS_WKUP1/TIM2_CH1/TIM2_ETR/TIM5_CH1/TIM8_ETR/USART2_CTS E6 PA1/ADC1_IN1/I2S4_SD/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\3\/SPI4_MOSI/TIM2_CH2/TIM5_CH2/USART2_RTS G7 PA2/ADC1_IN2/FSMC_D4/FSMC_DA4/I2S_CKIN/TIM2_CH3/TIM5_CH3/TIM9_CH1/USART2_TX H8 PA3/ADC1_IN3/FSMC_D5/FSMC_DA5/I2S2_MCK/TIM2_CH4/TIM5_CH4/TIM9_CH2/USART2_RX F6 PA4/ADC1_IN4/DFSDM1_DATIN1/FSMC_D6/FSMC_DA6/I2S1_WS/I2S3_WS/S\P\I\1\_\N\S\S\/S\P\I\3\_\N\S\S\/USART2_CK G6 PA5/ADC1_IN5/DFSDM1_CKIN1/FSMC_D7/FSMC_DA7/I2S1_CK/SPI1_SCK/TIM2_CH1/TIM2_ETR/TIM8_CH1N F5 PA6/ADC1_IN6/I2S2_MCK/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\0\/SDIO_CMD/SPI1_MISO/TIM13_CH1/T\I\M\1\_\B\K\I\N\/TIM3_CH1/T\I\M\8\_\B\K\I\N\ H6 PA7/ADC1_IN7/I2S1_SD/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\1\/SPI1_MOSI/TIM14_CH1/TIM1_CH1N/TIM3_CH2/TIM8_CH1N E5 PA8/I2C3_SCL/RCC_MCO_1/SDIO_D1/TIM1_CH1/USART1_CK/USB_OTG_FS_SOF E3 PA9/I2C3_SMBA/SDIO_D2/TIM1_CH2/USART1_TX/USB_OTG_FS_VBUS D1 PA10/I2S5_SD/SPI5_MOSI/TIM1_CH3/USART1_RX/USB_OTG_FS_ID D2 PA11/ADC1_EXTI11/CAN1_RX/SPI4_MISO/TIM1_CH4/USART1_CTS/USART6_TX/USB_OTG_FS_DM D3 PA12/CAN1_TX/SPI5_MISO/TIM1_ETR/USART1_RTS/USART6_RX/USB_OTG_FS_DP C1 PA13/SYS_JTMS-SWDIO C2 PA14/SYS_JTCK-SWCLK B2 PA15/ADC1_EXTI15/I2S1_WS/I2S3_WS/S\P\I\1\_\N\S\S\/S\P\I\3\_\N\S\S\/SYS_JTDI/TIM2_CH1/TIM2_ETR/USART1_TX A2 VSS A7 VSS B1 VSS H2 VSSA G8 VCAP_1 H3 BOOT0 D4 PDR_ON C6
PB0/ADC1_IN8/I2S5_CK/SPI5_SCK/TIM1_CH2N/TIM3_CH3/TIM8_CH2N H5 PB1/ADC1_IN9/DFSDM1_DATIN0/I2S5_WS/QUADSPI_CLK/S\P\I\5\_\N\S\S\/TIM1_CH3N/TIM3_CH4/TIM8_CH3N F4 PB2/DFSDM1_CKIN0/QUADSPI_CLK G4 PB3/FMPI2C1_SDA/I2C2_SDA/I2S1_CK/I2S3_CK/SPI1_SCK/SPI3_SCK/SYS_JTDO-SWO/TIM2_CH2/USART1_RX A5 PB4/I2C3_SDA/I2S3_ext_SD/SDIO_D0/SPI1_MISO/SPI3_MISO/SYS_JTRST/TIM3_CH1 B4 PB5/CAN2_RX/I2C1_SMBA/I2S1_SD/I2S3_SD/SDIO_D3/SPI1_MOSI/SPI3_MOSI/TIM3_CH2 C4 PB6/CAN2_TX/I2C1_SCL/Q\U\A\D\S\P\I\_\B\K\1\_\N\C\S\/SDIO_D0/TIM4_CH1/USART1_TX B5 PB7/F\S\M\C\_\N\L\/I2C1_SDA/TIM4_CH2/USART1_RX A6 PB8/CAN1_RX/I2C1_SCL/I2C3_SDA/I2S5_SD/SDIO_D4/SPI5_MOSI/TIM10_CH1/TIM4_CH3 C5 PB9/CAN1_TX/I2C1_SDA/I2C2_SDA/I2S2_WS/SDIO_D5/S\P\I\2\_\N\S\S\/TIM11_CH1/TIM4_CH4 B6 PB10/FMPI2C1_SCL/I2C2_SCL/I2S2_CK/I2S3_MCK/SDIO_D7/SPI2_SCK/TIM2_CH3/USART3_TX H4 PB12/CAN2/DFSDM1/I2C2/I2S2/I2S3/I2S4/SPI2/SPI3/SPI4/TIM1/USART3 G3 PB13/CAN2_TX/DFSDM1_CKIN1/FMPI2C1_SMBA/I2S2_CK/I2S4_CK/SPI2_SCK/SPI4_SCK/TIM1_CH1N/USART3_CTS G2 PB14/DFSDM1/FMPI2C1/FSMC/I2S2/SDIO/SPI2/TIM12/TIM1/TIM8/USART3 G1 PB15/ADC1/DFSDM1/FMPI2C1/I2S2/RTC/SDIO/SPI2/TIM12/TIM1/TIM8 F2 PB0/ADC1_IN8/I2S5_CK/SPI5_SCK/TIM1_CH2N/TIM3_CH3/TIM8_CH2N H5 PB1/ADC1_IN9/DFSDM1_DATIN0/I2S5_WS/QUADSPI_CLK/S\P\I\5\_\N\S\S\/TIM1_CH3N/TIM3_CH4/TIM8_CH3N F4 PB2/DFSDM1_CKIN0/QUADSPI_CLK G4 PB3/FMPI2C1_SDA/I2C2_SDA/I2S1_CK/I2S3_CK/SPI1_SCK/SPI3_SCK/SYS_JTDO-SWO/TIM2_CH2/USART1_RX A5 PB4/I2C3_SDA/I2S3_ext_SD/SDIO_D0/SPI1_MISO/SPI3_MISO/SYS_JTRST/TIM3_CH1 B4 PB5/CAN2_RX/I2C1_SMBA/I2S1_SD/I2S3_SD/SDIO_D3/SPI1_MOSI/SPI3_MOSI/TIM3_CH2 C4 PB6/CAN2_TX/I2C1_SCL/Q\U\A\D\S\P\I\_\B\K\1\_\N\C\S\/SDIO_D0/TIM4_CH1/USART1_TX B5 PB7/F\S\M\C\_\N\L\/I2C1_SDA/TIM4_CH2/USART1_RX A6 PB8/CAN1_RX/I2C1_SCL/I2C3_SDA/I2S5_SD/SDIO_D4/SPI5_MOSI/TIM10_CH1/TIM4_CH3 C5 PB9/CAN1_TX/I2C1_SDA/I2C2_SDA/I2S2_WS/SDIO_D5/S\P\I\2\_\N\S\S\/TIM11_CH1/TIM4_CH4 B6 PB10/FMPI2C1_SCL/I2C2_SCL/I2S2_CK/I2S3_MCK/SDIO_D7/SPI2_SCK/TIM2_CH3/USART3_TX H4 PB12/CAN2/DFSDM1/I2C2/I2S2/I2S3/I2S4/SPI2/SPI3/SPI4/TIM1/USART3 G3 PB13/CAN2_TX/DFSDM1_CKIN1/FMPI2C1_SMBA/I2S2_CK/I2S4_CK/SPI2_SCK/SPI4_SCK/TIM1_CH1N/USART3_CTS G2 PB14/DFSDM1/FMPI2C1/FSMC/I2S2/SDIO/SPI2/TIM12/TIM1/TIM8/USART3 G1 PB15/ADC1/DFSDM1/FMPI2C1/I2S2/RTC/SDIO/SPI2/TIM12/TIM1/TIM8 F2
PC0/ADC1_IN10/SYS_WKUP2 D5 PC1/ADC1_IN11/SYS_WKUP3 F8 PC2/ADC1_IN12/DFSDM1_CKOUT/F\S\M\C\_\N\W\E\/I2S2_ext_SD/SPI2_MISO E7 PC3/ADC1_IN13/FSMC_A0/I2S2_SD/SPI2_MOSI D6 PC4/ADC1_IN14/F\S\M\C\_\N\E\4\/I2S1_MCK/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\2\ E4 PC5/ADC1_IN15/FMPI2C1_SMBA/F\S\M\C\_\N\O\E\/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\3\/USART3_RX G5 PC6/DFSDM1_CKIN3/FMPI2C1_SCL/FSMC_D1/FSMC_DA1/I2S2_MCK/SDIO_D6/TIM3_CH1/TIM8_CH1/USART6_TX F1 PC7/DFSDM1_DATIN3/FMPI2C1_SDA/I2S2_CK/I2S3_MCK/SDIO_D7/SPI2_SCK/TIM3_CH2/TIM8_CH2/USART6_RX E1 PC8/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\2\/SDIO_D0/TIM3_CH3/TIM8_CH3/USART6_CK F3 PC9/I2C3_SDA/I2S_CKIN/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\0\/RCC_MCO_2/SDIO_D1/TIM3_CH4/TIM8_CH4 E2 PC10/I2S3_CK/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\1\/SDIO_D2/SPI3_SCK/USART3_TX C3 PC11/ADC1_EXTI11/FSMC_D2/FSMC_DA2/I2S3_ext_SD/Q\U\A\D\S\P\I\_\B\K\2\_\N\C\S\/SDIO_D3/SPI3_MISO/USART3_RX B3 PC12/FSMC_D3/FSMC_DA3/I2S3_SD/SDIO_CK/SPI3_MOSI/USART3_CK A3 PC13/RTC_AF1 B8 PC14-OSC32_IN/RCC_OSC32_IN C8 PC15-OSC32_OUT/ADC1_EXTI15/RCC_OSC32_OUT C7 PD2/F\S\M\C\_\N\W\E\/SDIO_CMD/TIM3_ETR A4 PH0 - OSC_IN/RCC_OSC_IN D8 PH1 - OSC_OUT/RCC_OSC_OUT E8 PC0/ADC1_IN10/SYS_WKUP2 D5 PC1/ADC1_IN11/SYS_WKUP3 F8 PC2/ADC1_IN12/DFSDM1_CKOUT/F\S\M\C\_\N\W\E\/I2S2_ext_SD/SPI2_MISO E7 PC3/ADC1_IN13/FSMC_A0/I2S2_SD/SPI2_MOSI D6 PC4/ADC1_IN14/F\S\M\C\_\N\E\4\/I2S1_MCK/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\2\ E4 PC5/ADC1_IN15/FMPI2C1_SMBA/F\S\M\C\_\N\O\E\/Q\U\A\D\S\P\I\_\B\K\2\_\I\O\3\/USART3_RX G5 PC6/DFSDM1_CKIN3/FMPI2C1_SCL/FSMC_D1/FSMC_DA1/I2S2_MCK/SDIO_D6/TIM3_CH1/TIM8_CH1/USART6_TX F1 PC7/DFSDM1_DATIN3/FMPI2C1_SDA/I2S2_CK/I2S3_MCK/SDIO_D7/SPI2_SCK/TIM3_CH2/TIM8_CH2/USART6_RX E1 PC8/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\2\/SDIO_D0/TIM3_CH3/TIM8_CH3/USART6_CK F3 PC9/I2C3_SDA/I2S_CKIN/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\0\/RCC_MCO_2/SDIO_D1/TIM3_CH4/TIM8_CH4 E2 PC10/I2S3_CK/Q\U\A\D\S\P\I\_\B\K\1\_\I\O\1\/SDIO_D2/SPI3_SCK/USART3_TX C3 PC11/ADC1_EXTI11/FSMC_D2/FSMC_DA2/I2S3_ext_SD/Q\U\A\D\S\P\I\_\B\K\2\_\N\C\S\/SDIO_D3/SPI3_MISO/USART3_RX B3 PC12/FSMC_D3/FSMC_DA3/I2S3_SD/SDIO_CK/SPI3_MOSI/USART3_CK A3 PC13/RTC_AF1 B8 PC14-OSC32_IN/RCC_OSC32_IN C8 PC15-OSC32_OUT/ADC1_EXTI15/RCC_OSC32_OUT C7 PD2/F\S\M\C\_\N\W\E\/SDIO_CMD/TIM3_ETR A4 PH0 - OSC_IN/RCC_OSC_IN D8 PH1 - OSC_OUT/RCC_OSC_OUT E8
ST MICROELECTRONICS STM32F412R(E-G)YXP WLCSP64
Part ID
ST MICROELECTRONICS STM32F412R(E-G)YXP WLCSP64
Comment
*
Attributes
Designator
IC?
Comment
*