mirror of
https://openbeagle.org/beagleboard/beaglebone-ai-64
synced 2025-04-03 07:07:07 +00:00
Add 0.0.3 SRM
This commit is contained in:
Jason Kridner
parent
10b5ba35ed
commit
7440473917
LICENSEREADME.md
doc/SRM
BeagleBone_AI-64_System_Reference_Manual.adocasciidoctor.cssbibliography.adocchapter-01.adocchapter-02.adocchapter-03.adocchapter-04.adocchapter-05.adocchapter-06.adocchapter-07.adocchapter-08.adocchapter-09.adocchapter-10.adocchapter-11.adoccolophon.adocdedication.adocglossary.adoc
images
45-back-heatsink.png45-back.png45-front.pngDesktop-Configuration.pngLED-Pattern.pngPower-LED.pngUSB-Connection.pngUSB-Tethering.pngback-heatsink.pngback.pngby-sa.png
index.adocpreface.adocch03
BBAI-64-to-monitor-cable.pngXFCE-Desktop.pngbarrel-jack.jpgbarrel-jack.pngbbai64-in-box.jpgdesktop-configuration.jpgdisplay-adaptors.jpgdisplay-adaptors.pngethernet-cable.jpgethernet-cable.pngled-pattern.jpgleds.jpgminiDP-connector.jpgminiDP-connector.pngmonitor-cable.jpgmouse-keyboard.jpgmouse-keyboard.pngports.jpgpower-led.jpgusb-a-connection.jpgusb-c-connection.jpgusb-tethering.jpgxfce-desktop.jpg
ch04
ch05
ch06
ch08
berg-stip-insertion.jpgcan-cape.jpgcape-dimension.jpgcape-placement.jpgeeprom-write-protect.pngeeprom.pngexpansion-connector.jpgproto.jpgsingle-expansion-connector.jpgstealing-expansion-connector.jpg
ch09
ch10
45-back-heatsink.jpg45-back.jpg45-front-hires.jpg45-front.jpgback-heatsink.jpgback.jpgfeature.jpgfront.jpg
feature.pngfront.png
400
LICENSE
Normal file
400
LICENSE
Normal file
@ -0,0 +1,400 @@
|
||||
CC-BY-4.0
|
||||
|
||||
Copyright (c) 2021-2022 BeagleBoard.org Foundation
|
||||
Copyright (c) 2021-2022 Seeed Technology Co., Ltd
|
||||
|
||||
Attribution 4.0 International
|
||||
|
||||
=======================================================================
|
||||
|
||||
Creative Commons Corporation ("Creative Commons") is not a law firm and
|
||||
does not provide legal services or legal advice. Distribution of
|
||||
Creative Commons public licenses does not create a lawyer-client or
|
||||
other relationship. Creative Commons makes its licenses and related
|
||||
information available on an "as-is" basis. Creative Commons gives no
|
||||
warranties regarding its licenses, any material licensed under their
|
||||
terms and conditions, or any related information. Creative Commons
|
||||
disclaims all liability for damages resulting from their use to the
|
||||
fullest extent possible.
|
||||
|
||||
Using Creative Commons Public Licenses
|
||||
|
||||
Creative Commons public licenses provide a standard set of terms and
|
||||
conditions that creators and other rights holders may use to share
|
||||
original works of authorship and other material subject to copyright
|
||||
and certain other rights specified in the public license below. The
|
||||
following considerations are for informational purposes only, are not
|
||||
exhaustive, and do not form part of our licenses.
|
||||
|
||||
Considerations for licensors: Our public licenses are
|
||||
intended for use by those authorized to give the public
|
||||
permission to use material in ways otherwise restricted by
|
||||
copyright and certain other rights. Our licenses are
|
||||
irrevocable. Licensors should read and understand the terms
|
||||
and conditions of the license they choose before applying it.
|
||||
Licensors should also secure all rights necessary before
|
||||
applying our licenses so that the public can reuse the
|
||||
material as expected. Licensors should clearly mark any
|
||||
material not subject to the license. This includes other CC-
|
||||
licensed material, or material used under an exception or
|
||||
limitation to copyright. More considerations for licensors:
|
||||
wiki.creativecommons.org/Considerations_for_licensors
|
||||
|
||||
Considerations for the public: By using one of our public
|
||||
licenses, a licensor grants the public permission to use the
|
||||
licensed material under specified terms and conditions. If
|
||||
the licensor's permission is not necessary for any reason--for
|
||||
example, because of any applicable exception or limitation to
|
||||
copyright--then that use is not regulated by the license. Our
|
||||
licenses grant only permissions under copyright and certain
|
||||
other rights that a licensor has authority to grant. Use of
|
||||
the licensed material may still be restricted for other
|
||||
reasons, including because others have copyright or other
|
||||
rights in the material. A licensor may make special requests,
|
||||
such as asking that all changes be marked or described.
|
||||
Although not required by our licenses, you are encouraged to
|
||||
respect those requests where reasonable. More_considerations
|
||||
for the public:
|
||||
wiki.creativecommons.org/Considerations_for_licensees
|
||||
|
||||
=======================================================================
|
||||
|
||||
Creative Commons Attribution 4.0 International Public License
|
||||
|
||||
By exercising the Licensed Rights (defined below), You accept and agree
|
||||
to be bound by the terms and conditions of this Creative Commons
|
||||
Attribution 4.0 International Public License ("Public License"). To the
|
||||
extent this Public License may be interpreted as a contract, You are
|
||||
granted the Licensed Rights in consideration of Your acceptance of
|
||||
these terms and conditions, and the Licensor grants You such rights in
|
||||
consideration of benefits the Licensor receives from making the
|
||||
Licensed Material available under these terms and conditions.
|
||||
|
||||
|
||||
Section 1 -- Definitions.
|
||||
|
||||
a. Adapted Material means material subject to Copyright and Similar
|
||||
Rights that is derived from or based upon the Licensed Material
|
||||
and in which the Licensed Material is translated, altered,
|
||||
arranged, transformed, or otherwise modified in a manner requiring
|
||||
permission under the Copyright and Similar Rights held by the
|
||||
Licensor. For purposes of this Public License, where the Licensed
|
||||
Material is a musical work, performance, or sound recording,
|
||||
Adapted Material is always produced where the Licensed Material is
|
||||
synched in timed relation with a moving image.
|
||||
|
||||
b. Adapter's License means the license You apply to Your Copyright
|
||||
and Similar Rights in Your contributions to Adapted Material in
|
||||
accordance with the terms and conditions of this Public License.
|
||||
|
||||
c. Copyright and Similar Rights means copyright and/or similar rights
|
||||
closely related to copyright including, without limitation,
|
||||
performance, broadcast, sound recording, and Sui Generis Database
|
||||
Rights, without regard to how the rights are labeled or
|
||||
categorized. For purposes of this Public License, the rights
|
||||
specified in Section 2(b)(1)-(2) are not Copyright and Similar
|
||||
Rights.
|
||||
|
||||
d. Effective Technological Measures means those measures that, in the
|
||||
absence of proper authority, may not be circumvented under laws
|
||||
fulfilling obligations under Article 11 of the WIPO Copyright
|
||||
Treaty adopted on December 20, 1996, and/or similar international
|
||||
agreements.
|
||||
|
||||
e. Exceptions and Limitations means fair use, fair dealing, and/or
|
||||
any other exception or limitation to Copyright and Similar Rights
|
||||
that applies to Your use of the Licensed Material.
|
||||
|
||||
f. Licensed Material means the artistic or literary work, database,
|
||||
or other material to which the Licensor applied this Public
|
||||
License.
|
||||
|
||||
g. Licensed Rights means the rights granted to You subject to the
|
||||
terms and conditions of this Public License, which are limited to
|
||||
all Copyright and Similar Rights that apply to Your use of the
|
||||
Licensed Material and that the Licensor has authority to license.
|
||||
|
||||
h. Licensor means the individual(s) or entity(ies) granting rights
|
||||
under this Public License.
|
||||
|
||||
i. Share means to provide material to the public by any means or
|
||||
process that requires permission under the Licensed Rights, such
|
||||
as reproduction, public display, public performance, distribution,
|
||||
dissemination, communication, or importation, and to make material
|
||||
available to the public including in ways that members of the
|
||||
public may access the material from a place and at a time
|
||||
individually chosen by them.
|
||||
|
||||
j. Sui Generis Database Rights means rights other than copyright
|
||||
resulting from Directive 96/9/EC of the European Parliament and of
|
||||
the Council of 11 March 1996 on the legal protection of databases,
|
||||
as amended and/or succeeded, as well as other essentially
|
||||
equivalent rights anywhere in the world.
|
||||
|
||||
k. You means the individual or entity exercising the Licensed Rights
|
||||
under this Public License. Your has a corresponding meaning.
|
||||
|
||||
|
||||
Section 2 -- Scope.
|
||||
|
||||
a. License grant.
|
||||
|
||||
1. Subject to the terms and conditions of this Public License,
|
||||
the Licensor hereby grants You a worldwide, royalty-free,
|
||||
non-sublicensable, non-exclusive, irrevocable license to
|
||||
exercise the Licensed Rights in the Licensed Material to:
|
||||
|
||||
a. reproduce and Share the Licensed Material, in whole or
|
||||
in part; and
|
||||
|
||||
b. produce, reproduce, and Share Adapted Material.
|
||||
|
||||
2. Exceptions and Limitations. For the avoidance of doubt, where
|
||||
Exceptions and Limitations apply to Your use, this Public
|
||||
License does not apply, and You do not need to comply with
|
||||
its terms and conditions.
|
||||
|
||||
3. Term. The term of this Public License is specified in Section
|
||||
6(a).
|
||||
|
||||
4. Media and formats; technical modifications allowed. The
|
||||
Licensor authorizes You to exercise the Licensed Rights in
|
||||
all media and formats whether now known or hereafter created,
|
||||
and to make technical modifications necessary to do so. The
|
||||
Licensor waives and/or agrees not to assert any right or
|
||||
authority to forbid You from making technical modifications
|
||||
necessary to exercise the Licensed Rights, including
|
||||
technical modifications necessary to circumvent Effective
|
||||
Technological Measures. For purposes of this Public License,
|
||||
simply making modifications authorized by this Section 2(a)
|
||||
(4) never produces Adapted Material.
|
||||
|
||||
5. Downstream recipients.
|
||||
|
||||
a. Offer from the Licensor -- Licensed Material. Every
|
||||
recipient of the Licensed Material automatically
|
||||
receives an offer from the Licensor to exercise the
|
||||
Licensed Rights under the terms and conditions of this
|
||||
Public License.
|
||||
|
||||
b. No downstream restrictions. You may not offer or impose
|
||||
any additional or different terms or conditions on, or
|
||||
apply any Effective Technological Measures to, the
|
||||
Licensed Material if doing so restricts exercise of the
|
||||
Licensed Rights by any recipient of the Licensed
|
||||
Material.
|
||||
|
||||
6. No endorsement. Nothing in this Public License constitutes or
|
||||
may be construed as permission to assert or imply that You
|
||||
are, or that Your use of the Licensed Material is, connected
|
||||
with, or sponsored, endorsed, or granted official status by,
|
||||
the Licensor or others designated to receive attribution as
|
||||
provided in Section 3(a)(1)(A)(i).
|
||||
|
||||
b. Other rights.
|
||||
|
||||
1. Moral rights, such as the right of integrity, are not
|
||||
licensed under this Public License, nor are publicity,
|
||||
privacy, and/or other similar personality rights; however, to
|
||||
the extent possible, the Licensor waives and/or agrees not to
|
||||
assert any such rights held by the Licensor to the limited
|
||||
extent necessary to allow You to exercise the Licensed
|
||||
Rights, but not otherwise.
|
||||
|
||||
2. Patent and trademark rights are not licensed under this
|
||||
Public License.
|
||||
|
||||
3. To the extent possible, the Licensor waives any right to
|
||||
collect royalties from You for the exercise of the Licensed
|
||||
Rights, whether directly or through a collecting society
|
||||
under any voluntary or waivable statutory or compulsory
|
||||
licensing scheme. In all other cases the Licensor expressly
|
||||
reserves any right to collect such royalties.
|
||||
|
||||
|
||||
Section 3 -- License Conditions.
|
||||
|
||||
Your exercise of the Licensed Rights is expressly made subject to the
|
||||
following conditions.
|
||||
|
||||
a. Attribution.
|
||||
|
||||
1. If You Share the Licensed Material (including in modified
|
||||
form), You must:
|
||||
|
||||
a. retain the following if it is supplied by the Licensor
|
||||
with the Licensed Material:
|
||||
|
||||
i. identification of the creator(s) of the Licensed
|
||||
Material and any others designated to receive
|
||||
attribution, in any reasonable manner requested by
|
||||
the Licensor (including by pseudonym if
|
||||
designated);
|
||||
|
||||
ii. a copyright notice;
|
||||
|
||||
iii. a notice that refers to this Public License;
|
||||
|
||||
iv. a notice that refers to the disclaimer of
|
||||
warranties;
|
||||
|
||||
v. a URI or hyperlink to the Licensed Material to the
|
||||
extent reasonably practicable;
|
||||
|
||||
b. indicate if You modified the Licensed Material and
|
||||
retain an indication of any previous modifications; and
|
||||
|
||||
c. indicate the Licensed Material is licensed under this
|
||||
Public License, and include the text of, or the URI or
|
||||
hyperlink to, this Public License.
|
||||
|
||||
2. You may satisfy the conditions in Section 3(a)(1) in any
|
||||
reasonable manner based on the medium, means, and context in
|
||||
which You Share the Licensed Material. For example, it may be
|
||||
reasonable to satisfy the conditions by providing a URI or
|
||||
hyperlink to a resource that includes the required
|
||||
information.
|
||||
|
||||
3. If requested by the Licensor, You must remove any of the
|
||||
information required by Section 3(a)(1)(A) to the extent
|
||||
reasonably practicable.
|
||||
|
||||
4. If You Share Adapted Material You produce, the Adapter's
|
||||
License You apply must not prevent recipients of the Adapted
|
||||
Material from complying with this Public License.
|
||||
|
||||
|
||||
Section 4 -- Sui Generis Database Rights.
|
||||
|
||||
Where the Licensed Rights include Sui Generis Database Rights that
|
||||
apply to Your use of the Licensed Material:
|
||||
|
||||
a. for the avoidance of doubt, Section 2(a)(1) grants You the right
|
||||
to extract, reuse, reproduce, and Share all or a substantial
|
||||
portion of the contents of the database;
|
||||
|
||||
b. if You include all or a substantial portion of the database
|
||||
contents in a database in which You have Sui Generis Database
|
||||
Rights, then the database in which You have Sui Generis Database
|
||||
Rights (but not its individual contents) is Adapted Material; and
|
||||
|
||||
c. You must comply with the conditions in Section 3(a) if You Share
|
||||
all or a substantial portion of the contents of the database.
|
||||
|
||||
For the avoidance of doubt, this Section 4 supplements and does not
|
||||
replace Your obligations under this Public License where the Licensed
|
||||
Rights include other Copyright and Similar Rights.
|
||||
|
||||
|
||||
Section 5 -- Disclaimer of Warranties and Limitation of Liability.
|
||||
|
||||
a. UNLESS OTHERWISE SEPARATELY UNDERTAKEN BY THE LICENSOR, TO THE
|
||||
EXTENT POSSIBLE, THE LICENSOR OFFERS THE LICENSED MATERIAL AS-IS
|
||||
AND AS-AVAILABLE, AND MAKES NO REPRESENTATIONS OR WARRANTIES OF
|
||||
ANY KIND CONCERNING THE LICENSED MATERIAL, WHETHER EXPRESS,
|
||||
IMPLIED, STATUTORY, OR OTHER. THIS INCLUDES, WITHOUT LIMITATION,
|
||||
WARRANTIES OF TITLE, MERCHANTABILITY, FITNESS FOR A PARTICULAR
|
||||
PURPOSE, NON-INFRINGEMENT, ABSENCE OF LATENT OR OTHER DEFECTS,
|
||||
ACCURACY, OR THE PRESENCE OR ABSENCE OF ERRORS, WHETHER OR NOT
|
||||
KNOWN OR DISCOVERABLE. WHERE DISCLAIMERS OF WARRANTIES ARE NOT
|
||||
ALLOWED IN FULL OR IN PART, THIS DISCLAIMER MAY NOT APPLY TO YOU.
|
||||
|
||||
b. TO THE EXTENT POSSIBLE, IN NO EVENT WILL THE LICENSOR BE LIABLE
|
||||
TO YOU ON ANY LEGAL THEORY (INCLUDING, WITHOUT LIMITATION,
|
||||
NEGLIGENCE) OR OTHERWISE FOR ANY DIRECT, SPECIAL, INDIRECT,
|
||||
INCIDENTAL, CONSEQUENTIAL, PUNITIVE, EXEMPLARY, OR OTHER LOSSES,
|
||||
COSTS, EXPENSES, OR DAMAGES ARISING OUT OF THIS PUBLIC LICENSE OR
|
||||
USE OF THE LICENSED MATERIAL, EVEN IF THE LICENSOR HAS BEEN
|
||||
ADVISED OF THE POSSIBILITY OF SUCH LOSSES, COSTS, EXPENSES, OR
|
||||
DAMAGES. WHERE A LIMITATION OF LIABILITY IS NOT ALLOWED IN FULL OR
|
||||
IN PART, THIS LIMITATION MAY NOT APPLY TO YOU.
|
||||
|
||||
c. The disclaimer of warranties and limitation of liability provided
|
||||
above shall be interpreted in a manner that, to the extent
|
||||
possible, most closely approximates an absolute disclaimer and
|
||||
waiver of all liability.
|
||||
|
||||
|
||||
Section 6 -- Term and Termination.
|
||||
|
||||
a. This Public License applies for the term of the Copyright and
|
||||
Similar Rights licensed here. However, if You fail to comply with
|
||||
this Public License, then Your rights under this Public License
|
||||
terminate automatically.
|
||||
|
||||
b. Where Your right to use the Licensed Material has terminated under
|
||||
Section 6(a), it reinstates:
|
||||
|
||||
1. automatically as of the date the violation is cured, provided
|
||||
it is cured within 30 days of Your discovery of the
|
||||
violation; or
|
||||
|
||||
2. upon express reinstatement by the Licensor.
|
||||
|
||||
For the avoidance of doubt, this Section 6(b) does not affect any
|
||||
right the Licensor may have to seek remedies for Your violations
|
||||
of this Public License.
|
||||
|
||||
c. For the avoidance of doubt, the Licensor may also offer the
|
||||
Licensed Material under separate terms or conditions or stop
|
||||
distributing the Licensed Material at any time; however, doing so
|
||||
will not terminate this Public License.
|
||||
|
||||
d. Sections 1, 5, 6, 7, and 8 survive termination of this Public
|
||||
License.
|
||||
|
||||
|
||||
Section 7 -- Other Terms and Conditions.
|
||||
|
||||
a. The Licensor shall not be bound by any additional or different
|
||||
terms or conditions communicated by You unless expressly agreed.
|
||||
|
||||
b. Any arrangements, understandings, or agreements regarding the
|
||||
Licensed Material not stated herein are separate from and
|
||||
independent of the terms and conditions of this Public License.
|
||||
|
||||
|
||||
Section 8 -- Interpretation.
|
||||
|
||||
a. For the avoidance of doubt, this Public License does not, and
|
||||
shall not be interpreted to, reduce, limit, restrict, or impose
|
||||
conditions on any use of the Licensed Material that could lawfully
|
||||
be made without permission under this Public License.
|
||||
|
||||
b. To the extent possible, if any provision of this Public License is
|
||||
deemed unenforceable, it shall be automatically reformed to the
|
||||
minimum extent necessary to make it enforceable. If the provision
|
||||
cannot be reformed, it shall be severed from this Public License
|
||||
without affecting the enforceability of the remaining terms and
|
||||
conditions.
|
||||
|
||||
c. No term or condition of this Public License will be waived and no
|
||||
failure to comply consented to unless expressly agreed to by the
|
||||
Licensor.
|
||||
|
||||
d. Nothing in this Public License constitutes or may be interpreted
|
||||
as a limitation upon, or waiver of, any privileges and immunities
|
||||
that apply to the Licensor or You, including from the legal
|
||||
processes of any jurisdiction or authority.
|
||||
|
||||
|
||||
=======================================================================
|
||||
|
||||
Creative Commons is not a party to its public
|
||||
licenses. Notwithstanding, Creative Commons may elect to apply one of
|
||||
its public licenses to material it publishes and in those instances
|
||||
will be considered the “Licensor.” The text of the Creative Commons
|
||||
public licenses is dedicated to the public domain under the CC0 Public
|
||||
Domain Dedication. Except for the limited purpose of indicating that
|
||||
material is shared under a Creative Commons public license or as
|
||||
otherwise permitted by the Creative Commons policies published at
|
||||
creativecommons.org/policies, Creative Commons does not authorize the
|
||||
use of the trademark "Creative Commons" or any other trademark or logo
|
||||
of Creative Commons without its prior written consent including,
|
||||
without limitation, in connection with any unauthorized modifications
|
||||
to any of its public licenses or any other arrangements,
|
||||
understandings, or agreements concerning use of licensed material. For
|
||||
the avoidance of doubt, this paragraph does not form part of the
|
||||
public licenses.
|
||||
|
||||
Creative Commons may be contacted at creativecommons.org.
|
||||
14
README.md
14
README.md
@ -1,3 +1,13 @@
|
||||
# beaglebone-ai-64
|
||||
# BeagleBoard.org BeagleBone AI-64
|
||||
|
||||
BeagleBoard.org BeagleBone AI-64 - https://beaglebone.ai/64
|
||||
|
||||
BeagleBoard.org BeagleBone AI-64 - https://beaglebone.ai/64
|
||||
* Latest system reference manual: [doc/SRM/BeagleBone\_AI-64\_System\_Reference\_Manual-0.0.3.pdf](git.beagleboard.org/beagleboard/beaglebone-ai-64/-/tree/master/doc/SRM/BeagleBone_AI-64_System_Reference_Manual-0.0.3.pdf)
|
||||
* Latest instructions: [beagleboard.org/getting-started](beagleboard.org/getting-started)
|
||||
* Software update instructions: [beagleboard.org/update-ai64](beagleboard.org/update-ai64)
|
||||
* Latest software: [beagleboard.org/latest-images](beagleboard.org/latest-images)
|
||||
* Latest product information: [beagleboard.org/ai-64](beagleboard.org/ai-64)
|
||||
* Design: [git.beagleboard.org/beagleboard/beaglebone-ai-64](git.beagleboard.org/beagleboard/beaglebone-ai-64)
|
||||
* Support: [beagleboard.org/support](beagleboard.org/support)
|
||||
* Repair issues: [beagleboard.org/rma](beagleboard.org/rma)
|
||||
* Newsletter: [beagleboard.org/newsletter](beagleboard.org/newsletter)
|
||||
|
||||
49
doc/SRM/BeagleBone_AI-64_System_Reference_Manual.adoc
Executable file
49
doc/SRM/BeagleBone_AI-64_System_Reference_Manual.adoc
Executable file
@ -0,0 +1,49 @@
|
||||
= BeagleBone AI-64 System Reference Manual
|
||||
:xrefstyle: full
|
||||
:doctype: book
|
||||
:encoding: utf-8
|
||||
:lang: en
|
||||
:icons: font
|
||||
:table-caption!:
|
||||
:toc: left
|
||||
:toclevels: 3
|
||||
:toc-placement!:
|
||||
:autofit-option:
|
||||
:base_font_size_min: 0
|
||||
:table_cell_padding: 0
|
||||
:stylesheet: asciidoctor.css
|
||||
:numbered:
|
||||
|
||||
include::colophon.adoc[]
|
||||
|
||||
include::preface.adoc[]
|
||||
|
||||
include::dedication.adoc[]
|
||||
|
||||
include::glossary.adoc[]
|
||||
|
||||
include::chapter-01.adoc[]
|
||||
|
||||
include::chapter-02.adoc[]
|
||||
|
||||
include::chapter-03.adoc[]
|
||||
|
||||
include::chapter-04.adoc[]
|
||||
|
||||
include::chapter-05.adoc[]
|
||||
|
||||
// include::chapter-06.adoc[]
|
||||
|
||||
// include::chapter-07.adoc[]
|
||||
|
||||
// include::chapter-08.adoc[]
|
||||
|
||||
include::chapter-09.adoc[]
|
||||
|
||||
include::chapter-10.adoc[]
|
||||
|
||||
include::chapter-11.adoc[]
|
||||
|
||||
include::bibliography.adoc[]
|
||||
|
||||
include::index.adoc[]
|
||||
425
doc/SRM/asciidoctor.css
Executable file
425
doc/SRM/asciidoctor.css
Executable file
@ -0,0 +1,425 @@
|
||||
/* Asciidoctor default stylesheet | MIT License | https://asciidoctor.org */
|
||||
/* Uncomment @import statement to use as custom stylesheet */
|
||||
/*@import "https://fonts.googleapis.com/css?family=Open+Sans:300,300italic,400,400italic,600,600italic%7CNoto+Serif:400,400italic,700,700italic%7CDroid+Sans+Mono:400,700";*/
|
||||
article,aside,details,figcaption,figure,footer,header,hgroup,main,nav,section{display:block}
|
||||
audio,video{display:inline-block}
|
||||
audio:not([controls]){display:none;height:0}
|
||||
html{font-family:sans-serif;-ms-text-size-adjust:100%;-webkit-text-size-adjust:100%}
|
||||
a{background:none}
|
||||
a:focus{outline:thin dotted}
|
||||
a:active,a:hover{outline:0}
|
||||
h1{font-size:2em;margin:.67em 0}
|
||||
abbr[title]{border-bottom:1px dotted}
|
||||
b,strong{font-weight:bold}
|
||||
dfn{font-style:italic}
|
||||
hr{-moz-box-sizing:content-box;box-sizing:content-box;height:0}
|
||||
mark{background:#ff0;color:#000}
|
||||
code,kbd,pre,samp{font-family:monospace;font-size:1em}
|
||||
pre{white-space:pre-wrap}
|
||||
q{quotes:"\201C" "\201D" "\2018" "\2019"}
|
||||
small{font-size:80%}
|
||||
sub,sup{font-size:75%;line-height:0;position:relative;vertical-align:baseline}
|
||||
sup{top:-.5em}
|
||||
sub{bottom:-.25em}
|
||||
img{border:0}
|
||||
svg:not(:root){overflow:hidden}
|
||||
figure{margin:0}
|
||||
fieldset{border:1px solid silver;margin:0 2px;padding:.35em .625em .75em}
|
||||
legend{border:0;padding:0}
|
||||
button,input,select,textarea{font-family:inherit;font-size:100%;margin:0}
|
||||
button,input{line-height:normal}
|
||||
button,select{text-transform:none}
|
||||
button,html input[type="button"],input[type="reset"],input[type="submit"]{-webkit-appearance:button;cursor:pointer}
|
||||
button[disabled],html input[disabled]{cursor:default}
|
||||
input[type="checkbox"],input[type="radio"]{box-sizing:border-box;padding:0}
|
||||
button::-moz-focus-inner,input::-moz-focus-inner{border:0;padding:0}
|
||||
textarea{overflow:auto;vertical-align:top}
|
||||
table{border-collapse:collapse;border-spacing:0}
|
||||
*,*::before,*::after{-moz-box-sizing:border-box;-webkit-box-sizing:border-box;box-sizing:border-box}
|
||||
html,body{font-size:100%}
|
||||
body{background:#fff;color:rgba(0,0,0,.8);padding:0;margin:0;font-family:"Noto Serif","DejaVu Serif",serif;font-weight:400;font-style:normal;line-height:1;position:relative;cursor:auto;tab-size:4;-moz-osx-font-smoothing:grayscale;-webkit-font-smoothing:antialiased}
|
||||
a:hover{cursor:pointer}
|
||||
img,object,embed{max-width:100%;height:auto}
|
||||
object,embed{height:100%}
|
||||
img{-ms-interpolation-mode:bicubic}
|
||||
.left{float:left!important}
|
||||
.right{float:right!important}
|
||||
.text-left{text-align:left!important}
|
||||
.text-right{text-align:right!important}
|
||||
.text-center{text-align:center!important}
|
||||
.text-justify{text-align:justify!important}
|
||||
.hide{display:none}
|
||||
img,object,svg{display:inline-block;vertical-align:middle}
|
||||
textarea{height:auto;min-height:50px}
|
||||
select{width:100%}
|
||||
.center{margin-left:auto;margin-right:auto}
|
||||
.stretch{width:100%}
|
||||
.subheader,.admonitionblock td.content>.title,.audioblock>.title,.exampleblock>.title,.imageblock>.title,.listingblock>.title,.literalblock>.title,.stemblock>.title,.openblock>.title,.paragraph>.title,.quoteblock>.title,table.tableblock>.title,.verseblock>.title,.videoblock>.title,.dlist>.title,.olist>.title,.ulist>.title,.qlist>.title,.hdlist>.title{line-height:1.45;color:#7a2518;font-weight:400;margin-top:0;margin-bottom:.25em}
|
||||
div,dl,dt,dd,ul,ol,li,h1,h2,h3,#toctitle,.sidebarblock>.content>.title,h4,h5,h6,pre,form,p,blockquote,th,td{margin:0;padding:0;direction:ltr}
|
||||
a{color:#2156a5;text-decoration:underline;line-height:inherit}
|
||||
a:hover,a:focus{color:#1d4b8f}
|
||||
a img{border:0}
|
||||
p{font-family:inherit;font-weight:400;font-size:1em;line-height:1.6;margin-bottom:1.25em;text-rendering:optimizeLegibility}
|
||||
p aside{font-size:.875em;line-height:1.35;font-style:italic}
|
||||
h1,h2,h3,#toctitle,.sidebarblock>.content>.title,h4,h5,h6{font-family:"Open Sans","DejaVu Sans",sans-serif;font-weight:300;font-style:normal;color:#ba3925;text-rendering:optimizeLegibility;margin-top:1em;margin-bottom:.5em;line-height:1.0125em}
|
||||
h1 small,h2 small,h3 small,#toctitle small,.sidebarblock>.content>.title small,h4 small,h5 small,h6 small{font-size:60%;color:#e99b8f;line-height:0}
|
||||
h1{font-size:2.125em}
|
||||
h2{font-size:1.6875em}
|
||||
h3,#toctitle,.sidebarblock>.content>.title{font-size:1.375em}
|
||||
h4,h5{font-size:1.125em}
|
||||
h6{font-size:1em}
|
||||
hr{border:solid #dddddf;border-width:1px 0 0;clear:both;margin:1.25em 0 1.1875em;height:0}
|
||||
em,i{font-style:italic;line-height:inherit}
|
||||
strong,b{font-weight:bold;line-height:inherit}
|
||||
small{font-size:60%;line-height:inherit}
|
||||
code{font-family:"Droid Sans Mono","DejaVu Sans Mono",monospace;font-weight:400;color:rgba(0,0,0,.9)}
|
||||
ul,ol,dl{font-size:1em;line-height:1.6;margin-bottom:1.25em;list-style-position:outside;font-family:inherit}
|
||||
ul,ol{margin-left:1.5em}
|
||||
ul li ul,ul li ol{margin-left:1.25em;margin-bottom:0;font-size:1em}
|
||||
ul.square li ul,ul.circle li ul,ul.disc li ul{list-style:inherit}
|
||||
ul.square{list-style-type:square}
|
||||
ul.circle{list-style-type:circle}
|
||||
ul.disc{list-style-type:disc}
|
||||
ol li ul,ol li ol{margin-left:1.25em;margin-bottom:0}
|
||||
dl dt{margin-bottom:.3125em;font-weight:bold}
|
||||
dl dd{margin-bottom:1.25em}
|
||||
abbr,acronym{text-transform:uppercase;font-size:90%;color:rgba(0,0,0,.8);border-bottom:1px dotted #ddd;cursor:help}
|
||||
abbr{text-transform:none}
|
||||
blockquote{margin:0 0 1.25em;padding:.5625em 1.25em 0 1.1875em;border-left:1px solid #ddd}
|
||||
blockquote cite{display:block;font-size:.9375em;color:rgba(0,0,0,.6)}
|
||||
blockquote cite::before{content:"\2014 \0020"}
|
||||
blockquote cite a,blockquote cite a:visited{color:rgba(0,0,0,.6)}
|
||||
blockquote,blockquote p{line-height:1.6;color:rgba(0,0,0,.85)}
|
||||
@media screen and (min-width:768px){h1,h2,h3,#toctitle,.sidebarblock>.content>.title,h4,h5,h6{line-height:1.2}
|
||||
h1{font-size:2.75em}
|
||||
h2{font-size:2.3125em}
|
||||
h3,#toctitle,.sidebarblock>.content>.title{font-size:1.6875em}
|
||||
h4{font-size:1.4375em}}
|
||||
table{background:#fff;margin-bottom:1.25em;border:solid 1px #dedede}
|
||||
table thead,table tfoot{background:#f7f8f7}
|
||||
table thead tr th,table thead tr td,table tfoot tr th,table tfoot tr td{padding:.5em .625em .625em;font-size:inherit;color:rgba(0,0,0,.8);text-align:left}
|
||||
table tr th,table tr td{padding:.5625em .625em;font-size:inherit;color:rgba(0,0,0,.8)}
|
||||
table tr.even,table tr.alt{background:#f8f8f7}
|
||||
table thead tr th,table tfoot tr th,table tbody tr td,table tr td,table tfoot tr td{display:table-cell;line-height:1.6}
|
||||
h1,h2,h3,#toctitle,.sidebarblock>.content>.title,h4,h5,h6{line-height:1.2;word-spacing:-.05em}
|
||||
h1 strong,h2 strong,h3 strong,#toctitle strong,.sidebarblock>.content>.title strong,h4 strong,h5 strong,h6 strong{font-weight:400}
|
||||
.clearfix::before,.clearfix::after,.float-group::before,.float-group::after{content:" ";display:table}
|
||||
.clearfix::after,.float-group::after{clear:both}
|
||||
:not(pre):not([class^=L])>code{font-size:.9375em;font-style:normal!important;letter-spacing:0;padding:.1em .5ex;word-spacing:-.15em;background:#f7f7f8;-webkit-border-radius:4px;border-radius:4px;line-height:1.45;text-rendering:optimizeSpeed;word-wrap:break-word}
|
||||
:not(pre)>code.nobreak{word-wrap:normal}
|
||||
:not(pre)>code.nowrap{white-space:nowrap}
|
||||
pre{color:rgba(0,0,0,.9);font-family:"Droid Sans Mono","DejaVu Sans Mono",monospace;line-height:1.45;text-rendering:optimizeSpeed}
|
||||
pre code,pre pre{color:inherit;font-size:inherit;line-height:inherit}
|
||||
pre>code{display:block}
|
||||
pre.nowrap,pre.nowrap pre{white-space:pre;word-wrap:normal}
|
||||
em em{font-style:normal}
|
||||
strong strong{font-weight:400}
|
||||
.keyseq{color:rgba(51,51,51,.8)}
|
||||
kbd{font-family:"Droid Sans Mono","DejaVu Sans Mono",monospace;display:inline-block;color:rgba(0,0,0,.8);font-size:.65em;line-height:1.45;background:#f7f7f7;border:1px solid #ccc;-webkit-border-radius:3px;border-radius:3px;-webkit-box-shadow:0 1px 0 rgba(0,0,0,.2),0 0 0 .1em white inset;box-shadow:0 1px 0 rgba(0,0,0,.2),0 0 0 .1em #fff inset;margin:0 .15em;padding:.2em .5em;vertical-align:middle;position:relative;top:-.1em;white-space:nowrap}
|
||||
.keyseq kbd:first-child{margin-left:0}
|
||||
.keyseq kbd:last-child{margin-right:0}
|
||||
.menuseq,.menuref{color:#000}
|
||||
.menuseq b:not(.caret),.menuref{font-weight:inherit}
|
||||
.menuseq{word-spacing:-.02em}
|
||||
.menuseq b.caret{font-size:1.25em;line-height:.8}
|
||||
.menuseq i.caret{font-weight:bold;text-align:center;width:.45em}
|
||||
b.button::before,b.button::after{position:relative;top:-1px;font-weight:400}
|
||||
b.button::before{content:"[";padding:0 3px 0 2px}
|
||||
b.button::after{content:"]";padding:0 2px 0 3px}
|
||||
p a>code:hover{color:rgba(0,0,0,.9)}
|
||||
#header,#content,#footnotes,#footer{width:100%;margin-left:auto;margin-right:auto;margin-top:0;margin-bottom:0;max-width:62.5em;*zoom:1;position:relative;padding-left:.9375em;padding-right:.9375em}
|
||||
#header::before,#header::after,#content::before,#content::after,#footnotes::before,#footnotes::after,#footer::before,#footer::after{content:" ";display:table}
|
||||
#header::after,#content::after,#footnotes::after,#footer::after{clear:both}
|
||||
#content{margin-top:1.25em}
|
||||
#content::before{content:none}
|
||||
#header>h1:first-child{color:rgba(0,0,0,.85);margin-top:2.25rem;margin-bottom:0}
|
||||
#header>h1:first-child+#toc{margin-top:8px;border-top:1px solid #dddddf}
|
||||
#header>h1:only-child,body.toc2 #header>h1:nth-last-child(2){border-bottom:1px solid #dddddf;padding-bottom:8px}
|
||||
#header .details{border-bottom:1px solid #dddddf;line-height:1.45;padding-top:.25em;padding-bottom:.25em;padding-left:.25em;color:rgba(0,0,0,.6);display:-ms-flexbox;display:-webkit-flex;display:flex;-ms-flex-flow:row wrap;-webkit-flex-flow:row wrap;flex-flow:row wrap}
|
||||
#header .details span:first-child{margin-left:-.125em}
|
||||
#header .details span.email a{color:rgba(0,0,0,.85)}
|
||||
#header .details br{display:none}
|
||||
#header .details br+span::before{content:"\00a0\2013\00a0"}
|
||||
#header .details br+span.author::before{content:"\00a0\22c5\00a0";color:rgba(0,0,0,.85)}
|
||||
#header .details br+span#revremark::before{content:"\00a0|\00a0"}
|
||||
#header #revnumber{text-transform:capitalize}
|
||||
#header #revnumber::after{content:"\00a0"}
|
||||
#content>h1:first-child:not([class]){color:rgba(0,0,0,.85);border-bottom:1px solid #dddddf;padding-bottom:8px;margin-top:0;padding-top:1rem;margin-bottom:1.25rem}
|
||||
#toc{border-bottom:1px solid #e7e7e9;padding-bottom:.5em}
|
||||
#toc>ul{margin-left:.125em}
|
||||
#toc ul.sectlevel0>li>a{font-style:italic}
|
||||
#toc ul.sectlevel0 ul.sectlevel1{margin:.5em 0}
|
||||
#toc ul{font-family:"Open Sans","DejaVu Sans",sans-serif;list-style-type:none}
|
||||
#toc li{line-height:1.3334;margin-top:.3334em}
|
||||
#toc a{text-decoration:none}
|
||||
#toc a:active{text-decoration:underline}
|
||||
#toctitle{color:#7a2518;font-size:1.2em}
|
||||
@media screen and (min-width:768px){#toctitle{font-size:1.375em}
|
||||
body.toc2{padding-left:15em;padding-right:0}
|
||||
#toc.toc2{margin-top:0!important;background:#f8f8f7;position:fixed;width:15em;left:0;top:0;border-right:1px solid #e7e7e9;border-top-width:0!important;border-bottom-width:0!important;z-index:1000;padding:1.25em 1em;height:100%;overflow:auto}
|
||||
#toc.toc2 #toctitle{margin-top:0;margin-bottom:.8rem;font-size:1.2em}
|
||||
#toc.toc2>ul{font-size:.9em;margin-bottom:0}
|
||||
#toc.toc2 ul ul{margin-left:0;padding-left:1em}
|
||||
#toc.toc2 ul.sectlevel0 ul.sectlevel1{padding-left:0;margin-top:.5em;margin-bottom:.5em}
|
||||
body.toc2.toc-right{padding-left:0;padding-right:15em}
|
||||
body.toc2.toc-right #toc.toc2{border-right-width:0;border-left:1px solid #e7e7e9;left:auto;right:0}}
|
||||
@media screen and (min-width:1280px){body.toc2{padding-left:20em;padding-right:0}
|
||||
#toc.toc2{width:20em}
|
||||
#toc.toc2 #toctitle{font-size:1.375em}
|
||||
#toc.toc2>ul{font-size:.95em}
|
||||
#toc.toc2 ul ul{padding-left:1.25em}
|
||||
body.toc2.toc-right{padding-left:0;padding-right:20em}}
|
||||
#content #toc{border-style:solid;border-width:1px;border-color:#e0e0dc;margin-bottom:1.25em;padding:1.25em;background:#f8f8f7;-webkit-border-radius:4px;border-radius:4px}
|
||||
#content #toc>:first-child{margin-top:0}
|
||||
#content #toc>:last-child{margin-bottom:0}
|
||||
#footer{max-width:100%;background:rgba(0,0,0,.8);padding:1.25em}
|
||||
#footer-text{color:rgba(255,255,255,.8);line-height:1.44}
|
||||
#content{margin-bottom:.625em}
|
||||
.sect1{padding-bottom:.625em}
|
||||
@media screen and (min-width:768px){#content{margin-bottom:1.25em}
|
||||
.sect1{padding-bottom:1.25em}}
|
||||
.sect1:last-child{padding-bottom:0}
|
||||
.sect1+.sect1{border-top:1px solid #e7e7e9}
|
||||
#content h1>a.anchor,h2>a.anchor,h3>a.anchor,#toctitle>a.anchor,.sidebarblock>.content>.title>a.anchor,h4>a.anchor,h5>a.anchor,h6>a.anchor{position:absolute;z-index:1001;width:1.5ex;margin-left:-1.5ex;display:block;text-decoration:none!important;visibility:hidden;text-align:center;font-weight:400}
|
||||
#content h1>a.anchor::before,h2>a.anchor::before,h3>a.anchor::before,#toctitle>a.anchor::before,.sidebarblock>.content>.title>a.anchor::before,h4>a.anchor::before,h5>a.anchor::before,h6>a.anchor::before{content:"\00A7";font-size:.85em;display:block;padding-top:.1em}
|
||||
#content h1:hover>a.anchor,#content h1>a.anchor:hover,h2:hover>a.anchor,h2>a.anchor:hover,h3:hover>a.anchor,#toctitle:hover>a.anchor,.sidebarblock>.content>.title:hover>a.anchor,h3>a.anchor:hover,#toctitle>a.anchor:hover,.sidebarblock>.content>.title>a.anchor:hover,h4:hover>a.anchor,h4>a.anchor:hover,h5:hover>a.anchor,h5>a.anchor:hover,h6:hover>a.anchor,h6>a.anchor:hover{visibility:visible}
|
||||
#content h1>a.link,h2>a.link,h3>a.link,#toctitle>a.link,.sidebarblock>.content>.title>a.link,h4>a.link,h5>a.link,h6>a.link{color:#ba3925;text-decoration:none}
|
||||
#content h1>a.link:hover,h2>a.link:hover,h3>a.link:hover,#toctitle>a.link:hover,.sidebarblock>.content>.title>a.link:hover,h4>a.link:hover,h5>a.link:hover,h6>a.link:hover{color:#a53221}
|
||||
details,.audioblock,.imageblock,.literalblock,.listingblock,.stemblock,.videoblock{margin-bottom:1.25em}
|
||||
details>summary:first-of-type{cursor:pointer;display:list-item;outline:none;margin-bottom:.75em}
|
||||
.admonitionblock td.content>.title,.audioblock>.title,.exampleblock>.title,.imageblock>.title,.listingblock>.title,.literalblock>.title,.stemblock>.title,.openblock>.title,.paragraph>.title,.quoteblock>.title,table.tableblock>.title,.verseblock>.title,.videoblock>.title,.dlist>.title,.olist>.title,.ulist>.title,.qlist>.title,.hdlist>.title{text-rendering:optimizeLegibility;text-align:left;font-family:"Noto Serif","DejaVu Serif",serif;font-size:1rem;font-style:italic}
|
||||
table.tableblock.fit-content>caption.title{white-space:nowrap;width:0}
|
||||
.paragraph.lead>p,#preamble>.sectionbody>[class="paragraph"]:first-of-type p{font-size:1.21875em;line-height:1.6;color:rgba(0,0,0,.85)}
|
||||
table.tableblock #preamble>.sectionbody>[class="paragraph"]:first-of-type p{font-size:inherit}
|
||||
.admonitionblock>table{border-collapse:separate;border:0;background:none;width:100%}
|
||||
.admonitionblock>table td.icon{text-align:center;width:80px}
|
||||
.admonitionblock>table td.icon img{max-width:none}
|
||||
.admonitionblock>table td.icon .title{font-weight:bold;font-family:"Open Sans","DejaVu Sans",sans-serif;text-transform:uppercase}
|
||||
.admonitionblock>table td.content{padding-left:1.125em;padding-right:1.25em;border-left:1px solid #dddddf;color:rgba(0,0,0,.6)}
|
||||
.admonitionblock>table td.content>:last-child>:last-child{margin-bottom:0}
|
||||
.exampleblock>.content{border-style:solid;border-width:1px;border-color:#e6e6e6;margin-bottom:1.25em;padding:1.25em;background:#fff;-webkit-border-radius:4px;border-radius:4px}
|
||||
.exampleblock>.content>:first-child{margin-top:0}
|
||||
.exampleblock>.content>:last-child{margin-bottom:0}
|
||||
.sidebarblock{border-style:solid;border-width:1px;border-color:#dbdbd6;margin-bottom:1.25em;padding:1.25em;background:#f3f3f2;-webkit-border-radius:4px;border-radius:4px}
|
||||
.sidebarblock>:first-child{margin-top:0}
|
||||
.sidebarblock>:last-child{margin-bottom:0}
|
||||
.sidebarblock>.content>.title{color:#7a2518;margin-top:0;text-align:center}
|
||||
.exampleblock>.content>:last-child>:last-child,.exampleblock>.content .olist>ol>li:last-child>:last-child,.exampleblock>.content .ulist>ul>li:last-child>:last-child,.exampleblock>.content .qlist>ol>li:last-child>:last-child,.sidebarblock>.content>:last-child>:last-child,.sidebarblock>.content .olist>ol>li:last-child>:last-child,.sidebarblock>.content .ulist>ul>li:last-child>:last-child,.sidebarblock>.content .qlist>ol>li:last-child>:last-child{margin-bottom:0}
|
||||
.literalblock pre,.listingblock>.content>pre{-webkit-border-radius:4px;border-radius:4px;word-wrap:break-word;overflow-x:auto;padding:1em;font-size:.8125em}
|
||||
@media screen and (min-width:768px){.literalblock pre,.listingblock>.content>pre{font-size:.90625em}}
|
||||
@media screen and (min-width:1280px){.literalblock pre,.listingblock>.content>pre{font-size:1em}}
|
||||
.literalblock pre,.listingblock>.content>pre:not(.highlight),.listingblock>.content>pre[class="highlight"],.listingblock>.content>pre[class^="highlight "]{background:#f7f7f8}
|
||||
.literalblock.output pre{color:#f7f7f8;background:rgba(0,0,0,.9)}
|
||||
.listingblock>.content{position:relative}
|
||||
.listingblock code[data-lang]::before{display:none;content:attr(data-lang);position:absolute;font-size:.75em;top:.425rem;right:.5rem;line-height:1;text-transform:uppercase;color:inherit;opacity:.5}
|
||||
.listingblock:hover code[data-lang]::before{display:block}
|
||||
.listingblock.terminal pre .command::before{content:attr(data-prompt);padding-right:.5em;color:inherit;opacity:.5}
|
||||
.listingblock.terminal pre .command:not([data-prompt])::before{content:"$"}
|
||||
.listingblock pre.highlightjs{padding:0}
|
||||
.listingblock pre.highlightjs>code{padding:1em;-webkit-border-radius:4px;border-radius:4px}
|
||||
.listingblock pre.prettyprint{border-width:0}
|
||||
.prettyprint{background:#f7f7f8}
|
||||
pre.prettyprint .linenums{line-height:1.45;margin-left:2em}
|
||||
pre.prettyprint li{background:none;list-style-type:inherit;padding-left:0}
|
||||
pre.prettyprint li code[data-lang]::before{opacity:1}
|
||||
pre.prettyprint li:not(:first-child) code[data-lang]::before{display:none}
|
||||
table.linenotable{border-collapse:separate;border:0;margin-bottom:0;background:none}
|
||||
table.linenotable td[class]{color:inherit;vertical-align:top;padding:0;line-height:inherit;white-space:normal}
|
||||
table.linenotable td.code{padding-left:.75em}
|
||||
table.linenotable td.linenos{border-right:1px solid currentColor;opacity:.35;padding-right:.5em}
|
||||
pre.pygments .lineno{border-right:1px solid currentColor;opacity:.35;display:inline-block;margin-right:.75em}
|
||||
pre.pygments .lineno::before{content:"";margin-right:-.125em}
|
||||
.quoteblock{margin:0 1em 1.25em 1.5em;display:table}
|
||||
.quoteblock>.title{margin-left:-1.5em;margin-bottom:.75em}
|
||||
.quoteblock blockquote,.quoteblock p{color:rgba(0,0,0,.85);font-size:1.15rem;line-height:1.75;word-spacing:.1em;letter-spacing:0;font-style:italic;text-align:justify}
|
||||
.quoteblock blockquote{margin:0;padding:0;border:0}
|
||||
.quoteblock blockquote::before{content:"\201c";float:left;font-size:2.75em;font-weight:bold;line-height:.6em;margin-left:-.6em;color:#7a2518;text-shadow:0 1px 2px rgba(0,0,0,.1)}
|
||||
.quoteblock blockquote>.paragraph:last-child p{margin-bottom:0}
|
||||
.quoteblock .attribution{margin-top:.75em;margin-right:.5ex;text-align:right}
|
||||
.verseblock{margin:0 1em 1.25em}
|
||||
.verseblock pre{font-family:"Open Sans","DejaVu Sans",sans;font-size:1.15rem;color:rgba(0,0,0,.85);font-weight:300;text-rendering:optimizeLegibility}
|
||||
.verseblock pre strong{font-weight:400}
|
||||
.verseblock .attribution{margin-top:1.25rem;margin-left:.5ex}
|
||||
.quoteblock .attribution,.verseblock .attribution{font-size:.9375em;line-height:1.45;font-style:italic}
|
||||
.quoteblock .attribution br,.verseblock .attribution br{display:none}
|
||||
.quoteblock .attribution cite,.verseblock .attribution cite{display:block;letter-spacing:-.025em;color:rgba(0,0,0,.6)}
|
||||
.quoteblock.abstract blockquote::before,.quoteblock.excerpt blockquote::before,.quoteblock .quoteblock blockquote::before{display:none}
|
||||
.quoteblock.abstract blockquote,.quoteblock.abstract p,.quoteblock.excerpt blockquote,.quoteblock.excerpt p,.quoteblock .quoteblock blockquote,.quoteblock .quoteblock p{line-height:1.6;word-spacing:0}
|
||||
.quoteblock.abstract{margin:0 1em 1.25em;display:block}
|
||||
.quoteblock.abstract>.title{margin:0 0 .375em;font-size:1.15em;text-align:center}
|
||||
.quoteblock.excerpt,.quoteblock .quoteblock{margin:0 0 1.25em;padding:0 0 .25em 1em;border-left:.25em solid #dddddf}
|
||||
.quoteblock.excerpt blockquote,.quoteblock.excerpt p,.quoteblock .quoteblock blockquote,.quoteblock .quoteblock p{color:inherit;font-size:1.0625rem}
|
||||
.quoteblock.excerpt .attribution,.quoteblock .quoteblock .attribution{color:inherit;text-align:left;margin-right:0}
|
||||
table.tableblock{max-width:100%;border-collapse:separate}
|
||||
p.tableblock:last-child{margin-bottom:0}
|
||||
td.tableblock>.content>:last-child{margin-bottom:-1.25em}
|
||||
td.tableblock>.content>:last-child.sidebarblock{margin-bottom:0}
|
||||
table.tableblock,th.tableblock,td.tableblock{border:0 solid #dedede}
|
||||
table.grid-all>thead>tr>.tableblock,table.grid-all>tbody>tr>.tableblock{border-width:0 1px 1px 0}
|
||||
table.grid-all>tfoot>tr>.tableblock{border-width:1px 1px 0 0}
|
||||
table.grid-cols>*>tr>.tableblock{border-width:0 1px 0 0}
|
||||
table.grid-rows>thead>tr>.tableblock,table.grid-rows>tbody>tr>.tableblock{border-width:0 0 1px}
|
||||
table.grid-rows>tfoot>tr>.tableblock{border-width:1px 0 0}
|
||||
table.grid-all>*>tr>.tableblock:last-child,table.grid-cols>*>tr>.tableblock:last-child{border-right-width:0}
|
||||
table.grid-all>tbody>tr:last-child>.tableblock,table.grid-all>thead:last-child>tr>.tableblock,table.grid-rows>tbody>tr:last-child>.tableblock,table.grid-rows>thead:last-child>tr>.tableblock{border-bottom-width:0}
|
||||
table.frame-all{border-width:1px}
|
||||
table.frame-sides{border-width:0 1px}
|
||||
table.frame-topbot,table.frame-ends{border-width:1px 0}
|
||||
table.stripes-all tr,table.stripes-odd tr:nth-of-type(odd),table.stripes-even tr:nth-of-type(even),table.stripes-hover tr:hover{background:#f8f8f7}
|
||||
th.halign-left,td.halign-left{text-align:left}
|
||||
th.halign-right,td.halign-right{text-align:right}
|
||||
th.halign-center,td.halign-center{text-align:center}
|
||||
th.valign-top,td.valign-top{vertical-align:top}
|
||||
th.valign-bottom,td.valign-bottom{vertical-align:bottom}
|
||||
th.valign-middle,td.valign-middle{vertical-align:middle}
|
||||
table thead th,table tfoot th{font-weight:bold}
|
||||
tbody tr th{display:table-cell;line-height:1.6;background:#f7f8f7}
|
||||
tbody tr th,tbody tr th p,tfoot tr th,tfoot tr th p{color:rgba(0,0,0,.8);font-weight:bold}
|
||||
p.tableblock>code:only-child{background:none;padding:0}
|
||||
p.tableblock{font-size:1em}
|
||||
ol{margin-left:1.75em}
|
||||
ul li ol{margin-left:1.5em}
|
||||
dl dd{margin-left:1.125em}
|
||||
dl dd:last-child,dl dd:last-child>:last-child{margin-bottom:0}
|
||||
ol>li p,ul>li p,ul dd,ol dd,.olist .olist,.ulist .ulist,.ulist .olist,.olist .ulist{margin-bottom:.625em}
|
||||
ul.checklist,ul.none,ol.none,ul.no-bullet,ol.no-bullet,ol.unnumbered,ul.unstyled,ol.unstyled{list-style-type:none}
|
||||
ul.no-bullet,ol.no-bullet,ol.unnumbered{margin-left:.625em}
|
||||
ul.unstyled,ol.unstyled{margin-left:0}
|
||||
ul.checklist{margin-left:.625em}
|
||||
ul.checklist li>p:first-child>.fa-square-o:first-child,ul.checklist li>p:first-child>.fa-check-square-o:first-child{width:1.25em;font-size:.8em;position:relative;bottom:.125em}
|
||||
ul.checklist li>p:first-child>input[type="checkbox"]:first-child{margin-right:.25em}
|
||||
ul.inline{display:-ms-flexbox;display:-webkit-box;display:flex;-ms-flex-flow:row wrap;-webkit-flex-flow:row wrap;flex-flow:row wrap;list-style:none;margin:0 0 .625em -1.25em}
|
||||
ul.inline>li{margin-left:1.25em}
|
||||
.unstyled dl dt{font-weight:400;font-style:normal}
|
||||
ol.arabic{list-style-type:decimal}
|
||||
ol.decimal{list-style-type:decimal-leading-zero}
|
||||
ol.loweralpha{list-style-type:lower-alpha}
|
||||
ol.upperalpha{list-style-type:upper-alpha}
|
||||
ol.lowerroman{list-style-type:lower-roman}
|
||||
ol.upperroman{list-style-type:upper-roman}
|
||||
ol.lowergreek{list-style-type:lower-greek}
|
||||
.hdlist>table,.colist>table{border:0;background:none}
|
||||
.hdlist>table>tbody>tr,.colist>table>tbody>tr{background:none}
|
||||
td.hdlist1,td.hdlist2{vertical-align:top;padding:0 .625em}
|
||||
td.hdlist1{font-weight:bold;padding-bottom:1.25em}
|
||||
.literalblock+.colist,.listingblock+.colist{margin-top:-.5em}
|
||||
.colist td:not([class]):first-child{padding:.4em .75em 0;line-height:1;vertical-align:top}
|
||||
.colist td:not([class]):first-child img{max-width:none}
|
||||
.colist td:not([class]):last-child{padding:.25em 0}
|
||||
.thumb,.th{line-height:0;display:inline-block;border:solid 4px #fff;-webkit-box-shadow:0 0 0 1px #ddd;box-shadow:0 0 0 1px #ddd}
|
||||
.imageblock.left{margin:.25em .625em 1.25em 0}
|
||||
.imageblock.right{margin:.25em 0 1.25em .625em}
|
||||
.imageblock>.title{margin-bottom:0}
|
||||
.imageblock.thumb,.imageblock.th{border-width:6px}
|
||||
.imageblock.thumb>.title,.imageblock.th>.title{padding:0 .125em}
|
||||
.image.left,.image.right{margin-top:.25em;margin-bottom:.25em;display:inline-block;line-height:0}
|
||||
.image.left{margin-right:.625em}
|
||||
.image.right{margin-left:.625em}
|
||||
a.image{text-decoration:none;display:inline-block}
|
||||
a.image object{pointer-events:none}
|
||||
sup.footnote,sup.footnoteref{font-size:.875em;position:static;vertical-align:super}
|
||||
sup.footnote a,sup.footnoteref a{text-decoration:none}
|
||||
sup.footnote a:active,sup.footnoteref a:active{text-decoration:underline}
|
||||
#footnotes{padding-top:.75em;padding-bottom:.75em;margin-bottom:.625em}
|
||||
#footnotes hr{width:20%;min-width:6.25em;margin:-.25em 0 .75em;border-width:1px 0 0}
|
||||
#footnotes .footnote{padding:0 .375em 0 .225em;line-height:1.3334;font-size:.875em;margin-left:1.2em;margin-bottom:.2em}
|
||||
#footnotes .footnote a:first-of-type{font-weight:bold;text-decoration:none;margin-left:-1.05em}
|
||||
#footnotes .footnote:last-of-type{margin-bottom:0}
|
||||
#content #footnotes{margin-top:-.625em;margin-bottom:0;padding:.75em 0}
|
||||
.gist .file-data>table{border:0;background:#fff;width:100%;margin-bottom:0}
|
||||
.gist .file-data>table td.line-data{width:99%}
|
||||
div.unbreakable{page-break-inside:avoid}
|
||||
.big{font-size:larger}
|
||||
.small{font-size:smaller}
|
||||
.underline{text-decoration:underline}
|
||||
.overline{text-decoration:overline}
|
||||
.line-through{text-decoration:line-through}
|
||||
.aqua{color:#00bfbf}
|
||||
.aqua-background{background:#00fafa}
|
||||
.black{color:#000}
|
||||
.black-background{background:#000}
|
||||
.blue{color:#0000bf}
|
||||
.blue-background{background:#0000fa}
|
||||
.fuchsia{color:#bf00bf}
|
||||
.fuchsia-background{background:#fa00fa}
|
||||
.gray{color:#606060}
|
||||
.gray-background{background:#7d7d7d}
|
||||
.green{color:#006000}
|
||||
.green-background{background:#007d00}
|
||||
.lime{color:#00bf00}
|
||||
.lime-background{background:#00fa00}
|
||||
.maroon{color:#600000}
|
||||
.maroon-background{background:#7d0000}
|
||||
.navy{color:#000060}
|
||||
.navy-background{background:#00007d}
|
||||
.olive{color:#606000}
|
||||
.olive-background{background:#7d7d00}
|
||||
.purple{color:#600060}
|
||||
.purple-background{background:#7d007d}
|
||||
.red{color:#bf0000}
|
||||
.red-background{background:#fa0000}
|
||||
.silver{color:#909090}
|
||||
.silver-background{background:#bcbcbc}
|
||||
.teal{color:#006060}
|
||||
.teal-background{background:#007d7d}
|
||||
.white{color:#bfbfbf}
|
||||
.white-background{background:#fafafa}
|
||||
.yellow{color:#bfbf00}
|
||||
.yellow-background{background:#fafa00}
|
||||
span.icon>.fa{cursor:default}
|
||||
a span.icon>.fa{cursor:inherit}
|
||||
.admonitionblock td.icon [class^="fa icon-"]{font-size:2.5em;text-shadow:1px 1px 2px rgba(0,0,0,.5);cursor:default}
|
||||
.admonitionblock td.icon .icon-note::before{content:"\f05a";color:#19407c}
|
||||
.admonitionblock td.icon .icon-tip::before{content:"\f0eb";text-shadow:1px 1px 2px rgba(155,155,0,.8);color:#111}
|
||||
.admonitionblock td.icon .icon-warning::before{content:"\f071";color:#bf6900}
|
||||
.admonitionblock td.icon .icon-caution::before{content:"\f06d";color:#bf3400}
|
||||
.admonitionblock td.icon .icon-important::before{content:"\f06a";color:#bf0000}
|
||||
.conum[data-value]{display:inline-block;color:#fff!important;background:rgba(0,0,0,.8);-webkit-border-radius:100px;border-radius:100px;text-align:center;font-size:.75em;width:1.67em;height:1.67em;line-height:1.67em;font-family:"Open Sans","DejaVu Sans",sans-serif;font-style:normal;font-weight:bold}
|
||||
.conum[data-value] *{color:#fff!important}
|
||||
.conum[data-value]+b{display:none}
|
||||
.conum[data-value]::after{content:attr(data-value)}
|
||||
pre .conum[data-value]{position:relative;top:-.125em}
|
||||
b.conum *{color:inherit!important}
|
||||
.conum:not([data-value]):empty{display:none}
|
||||
dt,th.tableblock,td.content,div.footnote{text-rendering:optimizeLegibility}
|
||||
h1,h2,p,td.content,span.alt{letter-spacing:-.01em}
|
||||
p strong,td.content strong,div.footnote strong{letter-spacing:-.005em}
|
||||
p,blockquote,dt,td.content,span.alt{font-size:1.0625rem}
|
||||
p{margin-bottom:1.25rem}
|
||||
.sidebarblock p,.sidebarblock dt,.sidebarblock td.content,p.tableblock{font-size:1em}
|
||||
.exampleblock>.content{background:#fffef7;border-color:#e0e0dc;-webkit-box-shadow:0 1px 4px #e0e0dc;box-shadow:0 1px 4px #e0e0dc}
|
||||
.print-only{display:none!important}
|
||||
@page{margin:1.25cm .75cm}
|
||||
@media print{*{-webkit-box-shadow:none!important;box-shadow:none!important;text-shadow:none!important}
|
||||
html{font-size:80%}
|
||||
a{color:inherit!important;text-decoration:underline!important}
|
||||
a.bare,a[href^="#"],a[href^="mailto:"]{text-decoration:none!important}
|
||||
a[href^="http:"]:not(.bare)::after,a[href^="https:"]:not(.bare)::after{content:"(" attr(href) ")";display:inline-block;font-size:.875em;padding-left:.25em}
|
||||
abbr[title]::after{content:" (" attr(title) ")"}
|
||||
pre,blockquote,tr,img,object,svg{page-break-inside:avoid}
|
||||
thead{display:table-header-group}
|
||||
svg{max-width:100%}
|
||||
p,blockquote,dt,td.content{font-size:1em;orphans:3;widows:3}
|
||||
h2,h3,#toctitle,.sidebarblock>.content>.title{page-break-after:avoid}
|
||||
#toc,.sidebarblock,.exampleblock>.content{background:none!important}
|
||||
#toc{border-bottom:1px solid #dddddf!important;padding-bottom:0!important}
|
||||
body.book #header{text-align:center}
|
||||
body.book #header>h1:first-child{border:0!important;margin:2.5em 0 1em}
|
||||
body.book #header .details{border:0!important;display:block;padding:0!important}
|
||||
body.book #header .details span:first-child{margin-left:0!important}
|
||||
body.book #header .details br{display:block}
|
||||
body.book #header .details br+span::before{content:none!important}
|
||||
body.book #toc{border:0!important;text-align:left!important;padding:0!important;margin:0!important}
|
||||
body.book #toc,body.book #preamble,body.book h1.sect0,body.book .sect1>h2{page-break-before:always}
|
||||
.listingblock code[data-lang]::before{display:block}
|
||||
#footer{padding:0 .9375em}
|
||||
.hide-on-print{display:none!important}
|
||||
.print-only{display:block!important}
|
||||
.hide-for-print{display:none!important}
|
||||
.show-for-print{display:inherit!important}}
|
||||
@media print,amzn-kf8{#header>h1:first-child{margin-top:1.25rem}
|
||||
.sect1{padding:0!important}
|
||||
.sect1+.sect1{border:0}
|
||||
#footer{background:none}
|
||||
#footer-text{color:rgba(0,0,0,.6);font-size:.9em}}
|
||||
@media amzn-kf8{#header,#content,#footnotes,#footer{padding:0}}
|
||||
13
doc/SRM/bibliography.adoc
Executable file
13
doc/SRM/bibliography.adoc
Executable file
@ -0,0 +1,13 @@
|
||||
[bibliography]
|
||||
== Bibliography
|
||||
|
||||
[bibliography]
|
||||
.Datasheets
|
||||
- https://www.ti.com/lit/ds/symlink/tda4vm.pdf[TDA4VM Jacinto™ Processors for ADAS and Autonomous Vehicles Silicon Revisions 1.0 and 1.1 datasheet (Rev. J)]
|
||||
- https://www.ti.com/lit/zip/spruil1[DRA829/TDA4VM Technical Reference Manual (Rev. C)]
|
||||
|
||||
.Books
|
||||
|
||||
- https://beagleboard.org/cookbook[BeagleBone Cookbook]
|
||||
- https://beagleboard.org/bad-to-the-bone[Bad to the Bone]
|
||||
- http://derekmolloy.ie/exploring-beaglebone-tools-and-techniques-for-building-with-embedded-linux/[Exploring BeagleBone]
|
||||
18
doc/SRM/chapter-01.adoc
Executable file
18
doc/SRM/chapter-01.adoc
Executable file
@ -0,0 +1,18 @@
|
||||
[[introduction]]
|
||||
== Introduction
|
||||
|
||||
This document is the *System Reference Manual* for BeagleBone AI-64
|
||||
and covers its use and design. The board will primarily be referred to
|
||||
in the remainder of this document simply as the board, although it may
|
||||
also be referred to as AI-64 or BeagleBone AI-64 as a reminder.
|
||||
|
||||
This design is subject to change without notice as we will work to keep
|
||||
improving the design as the product matures based on feedback and
|
||||
experience. Software updates will be frequent and will be independent of
|
||||
the hardware revisions and as such not result in a change in the
|
||||
revision number.
|
||||
|
||||
Make sure you frequently check the
|
||||
https://git.beagleboard.org/beagleboard/beaglebone-ai-64/[BeagleBone AI-64 git repository]
|
||||
for the most up to date support documents.
|
||||
|
||||
34
doc/SRM/chapter-02.adoc
Executable file
34
doc/SRM/chapter-02.adoc
Executable file
@ -0,0 +1,34 @@
|
||||
[[change-history]]
|
||||
== Change History
|
||||
|
||||
This section describes the change history of this document and board.
|
||||
Document changes are not always a result of a board change. A board
|
||||
change will always result in a document change.
|
||||
|
||||
[[document-change-history]]
|
||||
=== Document Change History
|
||||
|
||||
This table seeks to keep track of major revision cycles in the documentation. Moving forward, we'll seek to align these version numbers across all of the various documentation.
|
||||
|
||||
.Change History
|
||||
[[change-history-table, Change History]]
|
||||
[cols="1,7,2,1",options="header",]
|
||||
|=======================================================================
|
||||
|*Rev* |*Changes* |*Date* |*By*
|
||||
|0.0.1 |AI-64 initial prototype |September 2021 |James Anderson
|
||||
|0.0.2 |AI-64 final prototype |December 2021 |James Anderson
|
||||
|0.0.3 |AI-64 initial production release |June 9, 2022 |Deepak Khatri and Jason Kridner
|
||||
|=======================================================================
|
||||
|
||||
[[board-changes]]
|
||||
=== Board Changes
|
||||
|
||||
Be sure to check the board revision history in the schematic file in the
|
||||
https://git.beagleboard.org/beagleboard/beaglebone-ai-64[BeagleBone AI-64 git repository].
|
||||
Also check the https://git.beagleboard.org/beagleboard/beaglebone-ai-64/-/issues[issues list].
|
||||
|
||||
[[rev-B]]
|
||||
==== Rev B
|
||||
|
||||
We are starting with revision B based on this being an update to the BeagleBone Black AI. However, because this board ended up being so different, we've decided to name it BeagleBone AI-64, rather than simply a new revision. This refers to the Seeed release on 21 Dec 2021 of "BeagleBone AI-64_SCH_Rev B_211221". This is the initial production release.
|
||||
|
||||
242
doc/SRM/chapter-03.adoc
Executable file
242
doc/SRM/chapter-03.adoc
Executable file
@ -0,0 +1,242 @@
|
||||
[[connecting-up-your-beaglebone-ai-64]]
|
||||
== Connecting up your BeagleBone AI-64
|
||||
|
||||
This section provides instructions on how to hook up your board. This
|
||||
beagle requires a 5V ≥ 3A power supply to work properly via either
|
||||
USB Type-C power adapter or a barrel jack power adapter.
|
||||
|
||||
Recommended adapters:
|
||||
|
||||
* 5V @ 3A https://www.digikey.com/en/products/detail/raspberry-pi/RPI-USB-C-power-supply-White-US/10258760[USB C power supply] adaptor for SBCs.
|
||||
* 5V ≥ 3A laptop/mobile adaptor with USB-C cable.
|
||||
|
||||
All the <<bbai-ports>> we will use in this chapter
|
||||
are shown in the figure below.
|
||||
|
||||
[[bbai-ports,BeagleBone AI-64 conections ports]]
|
||||
image::images/ch03/ports.jpg[title="BeagleBone AI-64 conections ports."]
|
||||
|
||||
|
||||
=== Methods of operation
|
||||
|
||||
1. Tethered to a PC, or
|
||||
2. As a standalone development platform in a desktop PC configuration with a Display Port Monitor, power supply, keyboard, and mouse
|
||||
|
||||
[[whats-in-the-box]]
|
||||
=== What’s In the Box
|
||||
|
||||
In the box you will find three main items as shown in <<bbai-64-pacakage>>.
|
||||
|
||||
* BeagleBone AI-64.
|
||||
* Instruction card.
|
||||
|
||||
Get yourself a USB-A to USB-C and you have a setup for
|
||||
the tethered scenario and creates an out of box
|
||||
experience where the board can be used immediately with
|
||||
no other equipment needed.
|
||||
|
||||
[[bbai-64-pacakage,BeagleBone AI-64 box image]]
|
||||
image::images/ch03/bbai64-in-box.jpg[title="BeagleBone AI-64 box content"]
|
||||
|
||||
[[main-connection-scenarios]]
|
||||
=== Main Connection Scenarios
|
||||
|
||||
This section will describe how to connect the board for use. This
|
||||
section is basically a slightly more detailed description of the Quick
|
||||
Start Guide that came in the box. There is also a Quick Start Guide
|
||||
document on the board that should also be referred to. The intent here
|
||||
is that someone looking to purchase the board will be able to read this
|
||||
section and get a good idea as to what the initial set up will be like.
|
||||
|
||||
The board can be configured in several different ways, but we will
|
||||
discuss the two most common scenarios as described in the Quick Start
|
||||
Guide card that comes in the box.
|
||||
|
||||
* Tethered to a PC via the USB cable
|
||||
** Board is accessed as a storage drive and
|
||||
** a virtual Ethernet connection.
|
||||
* Standalone desktop
|
||||
** Display
|
||||
** Keyboard and mouse
|
||||
** External 5V ≥ 3A power supply
|
||||
|
||||
Each of these configurations is discussed in general terms in the
|
||||
following sections.
|
||||
|
||||
[[tethered-to-a-pc]]
|
||||
=== Tethered To A PC
|
||||
|
||||
In this configuration, the board is powered by the PC via the provided
|
||||
USB cable--no other cables are required. The board is accessed either as
|
||||
a USB storage drive or via the browser on the PC. You need to use either
|
||||
Firefox or Chrome on the PC, Internet Explorer will not work properly.
|
||||
<<tethered-figure>> shows this configuration.
|
||||
|
||||
[[tethered-figure,Tethered Configuration figure]]
|
||||
image::images/ch03/usb-tethering.jpg[title="Tethered Configuration"]
|
||||
|
||||
At least 5V @ 3A is required to power the board, In most cases
|
||||
the PC may not be able to supply sufficient power for
|
||||
the board. You should always use an external 5V ≥ 3A DC
|
||||
power supply connected to the barrel jack.
|
||||
|
||||
[[connect-the-cable-to-the-board]]
|
||||
==== Connect the Cable to the Board
|
||||
|
||||
1. Connect the type C USB cable to the board as shown
|
||||
in <<usb-c-connect-figure>>. The connector is on the
|
||||
top side of the board near barrel jack.
|
||||
+
|
||||
[[usb-c-connect-figure,USB Connection to the Board figure]]
|
||||
image::images/ch03/usb-c-connection.jpg[title="USB Connection to the Board"]
|
||||
2. Connect the USB-A end of thecable tp your PC or laptop USB
|
||||
port as shown in the <<usb-a-connect-figure>> below.
|
||||
+
|
||||
[[usb-a-connect-figure,USB Connection to the PC/Laptop figure]]
|
||||
image::images/ch03/usb-a-connection.jpg[title="USB Connection to the PC/Laptop"]
|
||||
3. The board will power on and the power LED will be on as shown in
|
||||
<<power-led-figure>> below.
|
||||
+
|
||||
[[power-led-figure,Board Power LED figure]]
|
||||
image::images/ch03/power-led.jpg[title="Board Power LED"]
|
||||
4. When the board starts to the booting process started by the process
|
||||
of applying power, the LEDs will come on in sequence as shown in <<boot-status-figure>>
|
||||
below. It will take a few seconds for the status LEDs to come on, so
|
||||
be patient. The LEDs will be flashing in an erratic manner as it begins
|
||||
to boot the Linux kernel.
|
||||
+
|
||||
[[boot-status-figure,Board Boot Status figure]]
|
||||
image::images/ch03/led-pattern.jpg[title="Board Boot Status"]
|
||||
|
||||
[[accessing-the-board-as-a-storage-drive]]
|
||||
==== Accessing the Board as a Storage Drive
|
||||
|
||||
The board will appear around a USB Storage drive on your PC after the
|
||||
kernel has booted, which will take a round 10 seconds. The kernel on the
|
||||
board needs to boot before the port gets enumerated. Once the board
|
||||
appears as a storage drive, do the following:
|
||||
|
||||
1. Open the USB Drive folder.
|
||||
2. Click on the file named *start.htm*
|
||||
3. The file will be opened by your browser on the PC and you should get
|
||||
a display showing the Quick Start Guide.
|
||||
4. Your board is now operational! Follow the instructions on your PC
|
||||
screen.
|
||||
|
||||
[[standalone-wdisplay-and-keyboardmouse]]
|
||||
=== Standalone w/Display and Keyboard/Mouse
|
||||
|
||||
In this configuration, the board works more like a PC, totally free from
|
||||
any connection to a PC as shown in <<desktop-config-figure>>. It allows you to create
|
||||
your code to make the board do whatever you need it to do. It will
|
||||
however require certain common PC accessories. These accessories and
|
||||
instructions are described in the following section.
|
||||
|
||||
[[desktop-config-figure,Desktop Configuration figure]]
|
||||
image::images/ch03/desktop-configuration.jpg[title="Desktop Configuration"]
|
||||
|
||||
Ethernet cable and M.2 WiFi + Bluetooth card are optional. They can be used if network access required.
|
||||
|
||||
[[required-accessories]]
|
||||
==== Required Accessories
|
||||
|
||||
In order to use the board in this configuration, you will need the
|
||||
following accessories:
|
||||
|
||||
* 5VDC ≥ 3A power supply.
|
||||
* Display Port or HDMI monitor.
|
||||
* miniDP-DP or active miniDP-HDMI cable
|
||||
(or a recommended *miniDP-DP or active miniDP-HDMI adapter*
|
||||
https://www.amazon.com/dp/B089GF8M87
|
||||
has been tested and worked beautifully.).
|
||||
* USB wired/wireless keyboard and mouse.
|
||||
* powered USB HUB (OPTIONAL). The board has only two USB Type-A host ports, so you may need to use a powered USB Hub if you wish to add additional USB devices, such as a USB WiFi adapter.
|
||||
* M.2 Bluetooth & WiFi module (OPTIONAL). For wireless connections, a USB WiFi adapter or a recommended M.2 WiFi module can provide wireless networking.
|
||||
|
||||
[[connecting-up-the-board]]
|
||||
==== Connecting Up the Board
|
||||
|
||||
1. Connect the miniDP to DP or active miniDP to HDMI cable from your BeagleBone AI-64 to your monitor.
|
||||
+
|
||||
[[display-cable-figure,miniDP-DP or active miniDP-HDMI cable connection figure]]
|
||||
image::images/ch03/monitor-cable.jpg[title="Connect miniDP-DP or active miniDP-HDMI cable to BeagleBone AI-64"]
|
||||
|
||||
2. If you have an Display Port or HDMI monitor with HDMI-HDMI or DP-DP cable you can use adapters as shown in. <<display-adaptors-figure>>.
|
||||
+
|
||||
[[display-adaptors-figure,Display adaptors figure]]
|
||||
image::images/ch03/display-adaptors.jpg[title="Display adaptors"]
|
||||
|
||||
3. If you have wired/wireless USB keyboard and mouse such as
|
||||
+
|
||||
seen in <<keyboard-mouse-figure>> below, you need to plug the receiver in the USB host
|
||||
port of the board as shown in <<keyboard-mouse-figure>>.
|
||||
+
|
||||
[[keyboard-mouse-figure,Keyboard and Mouse figure]]
|
||||
image::images/ch03/mouse-keyboard.jpg[title="Keyboard and Mouse"]
|
||||
+
|
||||
4. Connect the Ethernet Cable
|
||||
+
|
||||
If you decide you want to connect to your local area network, an
|
||||
Ethernet cable can be used. Connect the Ethernet Cable to the Ethernet
|
||||
port as shown in <<ethernet-cable-figure>. Any standard 100M Ethernet cable should
|
||||
work.
|
||||
+
|
||||
[[ethernet-cable-figure,Ethernet Cable Connection figure]]
|
||||
image::images/ch03/ethernet-cable.jpg[title="Ethernet Cable Connection"]
|
||||
|
||||
5. The final step is to plug in the DC power supply to the DC power jack as
|
||||
shown in <<barrel-jack-figure>> below.
|
||||
+
|
||||
[[barrel-jack-figure,External DC Power figure]]
|
||||
image::images/ch03/barrel-jack.jpg[title="External DC Power"]
|
||||
|
||||
6. The cable needed to connect to your display is a miniDP-DP or active miniDP-HDMI.
|
||||
Connect the miniDP connector end to the board at this time. The
|
||||
connector is on the top side of the board as shown in <<miniDP-figure>>
|
||||
below.
|
||||
+
|
||||
[[miniDP-figure,miniDP to DP or active miniDP to HDMI connection figure]]
|
||||
image::images/ch03/miniDP-connector.jpg[title="Connect miniDP to DP or active miniDP to HDMI Cable to the Board"]
|
||||
+
|
||||
The connector is fairly robust, but we suggest that you not use the
|
||||
cable as a leash for your Beagle. Take proper care not to put too much
|
||||
stress on the connector or cable.
|
||||
|
||||
7. Booting the Board
|
||||
+
|
||||
As soon as the power is applied to the board, it will start the booting
|
||||
up process. When the board starts to boot the LEDs will come on. It will take a few seconds for
|
||||
the status LEDs to come on, so be patient. The LEDs will be flashing in
|
||||
an erratic manner as it boots the Linux kernel.
|
||||
+
|
||||
[[LEDs-figure,BeagleBone AI-64 LEDs figure]]
|
||||
image::images/ch03/leds.jpg[title="BeagleBone AI-64 LEDs"]
|
||||
+
|
||||
While the four user LEDS can be over written and used as desired, they
|
||||
do have specific meanings in the image that is shipped with the board
|
||||
once the Linux kernel has booted.
|
||||
+
|
||||
* *USR0* is the heartbeat indicator from the Linux kernel.
|
||||
* *USR1* turns on when the microSD card is being accessed
|
||||
* *USR2* is an activity indicator. It turns on when the kernel is not
|
||||
in the idle loop.
|
||||
* *USR3* turns on when the onboard eMMC is being accessed.
|
||||
* *USR4* is an activity indicator for WiFi.
|
||||
|
||||
8. A Booted System
|
||||
.. The board will have a mouse pointer appear on the screen as it
|
||||
enters the Linux boot step. You may have to move the physical mouse to
|
||||
get the mouse pointer to appear. The system can come up in the suspend
|
||||
mode with the monitor in a sleep mode.
|
||||
.. After a minute or two a login screen will appear. You do not have to
|
||||
do anything at this point.
|
||||
.. After a minute or two the desktop will appear. It should be similar
|
||||
to the one shown in <<figure-16>>. HOWEVER, it will change from one
|
||||
release to the next, so do not expect your system to look exactly like
|
||||
the one in the figure, but it will be very similar.
|
||||
.. And at this point you are ready to go! <<figure-16>> shows the desktop
|
||||
after booting.
|
||||
+
|
||||
[[figure-16,Figure 16]]
|
||||
.Figure 16. Desktop Screen
|
||||
image::images/ch03/xfce-desktop.jpg[title="BeagleBone XFCE Desktop Screen"]
|
||||
145
doc/SRM/chapter-04.adoc
Executable file
145
doc/SRM/chapter-04.adoc
Executable file
@ -0,0 +1,145 @@
|
||||
[[beaglebone-ai-64-overview]]
|
||||
== BeagleBone AI-64 Overview
|
||||
|
||||
BeagleBone AI-64 is the latest addition to BeagleBoard.org
|
||||
family and like its predecessors, is designed to address the open-source
|
||||
Community, early adopters, and anyone interested in a low cost
|
||||
64-bit Dual Arm® Cortex®-A72 processor based Single Board Computer (SBC).
|
||||
|
||||
It has been equipped with a minimum set of features to allow the user to
|
||||
experience the power of the processor and is not intended as a full
|
||||
development platform as many of the features and interfaces supplied by
|
||||
the processor are not accessible from BeagleBone AI-64 via onboard
|
||||
support of some interfaces. It is not a complete product designed to do
|
||||
any particular function. It is a foundation for experimentation and
|
||||
learning how to program the processor and to access the peripherals by
|
||||
the creation of your own software and hardware.
|
||||
|
||||
It also offers access to many of the interfaces and allows for the use
|
||||
of add-on boards called capes, to add many different combinations of
|
||||
features. A user may also develop their own board or add their own
|
||||
circuitry.
|
||||
|
||||
BeagleBone AI-64 is manufactured and warranted by partners listed at
|
||||
https://beagleboard.org/logo for the benefit of the community and its
|
||||
supporters including the current BeagleBoard.org Foundation board members
|
||||
|
||||
* Jason Kridner, principal of JK Embedded Consulting an
|
||||
independent contractor and architect for new Beagle designs.
|
||||
* Drew Fustini, independent Linux developer
|
||||
* Robert Nelson, applications engineer at Digi-Key
|
||||
* Mark Yoder, professor at Rose-Hulman Institute of Technology
|
||||
* Kathy Giori, product engineer at ZEDEDA
|
||||
|
||||
See bbb.io/about
|
||||
|
||||
BeagleBone AI-64 has been designed
|
||||
by Seeed Studio (Seeed Development Limited)
|
||||
under guidance from BeagleBoard.org Foundation.
|
||||
|
||||
[[beaglebone-compatibility]]
|
||||
=== BeagleBone Compatibility
|
||||
The board is intended to provide functionality well beyond BeagleBone Black or BeagleBone AI, while still providing compatibility with BeagleBone Black's expansion headers as
|
||||
much as possible. There are several significant differences between the three designs.
|
||||
|
||||
[[beaglebone-comparison-table, BeagleBone Comparison]]
|
||||
[cols="1,3,3,3",options="header",]
|
||||
|=======================================================================
|
||||
|*Feature* |AI-64 |AI |Black
|
||||
|SoC |TDA4VM |AM5729 |AM3358
|
||||
|Arm CPU |Cortex-A72 (64-bit) |Cortex-A15 (32-bit) |Cortex-A8 (32-bit)
|
||||
|Arm cores/MHz |2x 2GHz |2x 1.5GHz |1x 1GHz
|
||||
|RAM |4GB |1GB |512MB
|
||||
|eMMC flash |16GB |16GB |4GB
|
||||
|Size |4" x 3.1" |3.4" x 2.1" |3.4" x 2.1"
|
||||
|Display |miniDP + DSI |microHDMI |microHDMI
|
||||
|USB host (Type-A) |2x 5Gbps |1x 480Mbps |1x 480Mbps
|
||||
|USB dual-role |Type-C 5Gbps |Type-C 5Gbps |mini-AB 480Mbps
|
||||
|Ethernet |10/100/1000M |10/100/1000M |10/100M
|
||||
|M.2 |E-key |- |-
|
||||
|WiFi/ Bluetooth |- |AzureWave AW‑CM256SM |-
|
||||
|=======================================================================
|
||||
|
||||
[NOTE]
|
||||
====
|
||||
TODO: add cape compatibility details
|
||||
====
|
||||
|
||||
[[beaglebone-ai-64-features-and-specification]]
|
||||
=== BeagleBone AI-64 Features and Specification
|
||||
|
||||
This section covers the specifications and features of the board and
|
||||
provides a high level description of the major components and interfaces
|
||||
that make up the board.
|
||||
|
||||
[[ai64-features,BeagleBone AI-64 features table]]
|
||||
[cols="1h,3",options="header",]
|
||||
|=======================================================================
|
||||
| |*Feature*
|
||||
|*Processor* | Texas Instruments TDA4VM
|
||||
|*Graphics Engine* | PowerVR® Series8XE GE8430
|
||||
|*SDRAM Memory* |LPDDR4 3.2GHz (4GB) Kingston Q3222PM1WDGTK-U
|
||||
|*Onboard Flash* |eMMC (16GB) Kingston EMMC16G-TB29-PZ90
|
||||
|*PMIC* |TPS65941213 and TPS65941111 PMICs regulator and one additional LDO.
|
||||
|*Debug Support* | 2x 3 pin 3.3V TTL headers: +
|
||||
1. WKUP_UART0: Wake-up domain serial port +
|
||||
2. UART0: Main domain serial port
|
||||
|
||||
10-pin JTAG TAG-CONNECT footprint
|
||||
|
||||
|*Power Source* | USB C or DC Jack (5V, >3A)
|
||||
|*PCB* | 4” x 3.1”
|
||||
|*Indicators* |1-Power, 5-User Controllable LEDs
|
||||
|*USB-3.0 Client Port* |Access to USB0, SuperSpeed, dual-role mode via USB-C (no power output)
|
||||
|*USB-3.0 Host Port* |TUSB8041 4-port SuperSpeed hub on USB1, 2xType A Socket, up-to 2.8A total, depending on power input
|
||||
|*Ethernet* |Gigabit, RJ45, link indicator, speed indicator
|
||||
|*SD/MMC Connector* |microSD , 1.8/3.3V
|
||||
|*User Input* |1. Reset Button +
|
||||
2. Boot Button +
|
||||
3. Power Button
|
||||
|*Video Out* | miniDP
|
||||
|*Audio* | via miniDP (stereo)
|
||||
|*Weight* | 192gm (with heatsink)
|
||||
|*Power* |Refer to <<main-board-power>> section
|
||||
|=======================================================================
|
||||
|
||||
[[board-component-locations]]
|
||||
=== Board Component Locations
|
||||
|
||||
This section describes the key components on the board. It provides
|
||||
information on their location and function. Familiarize yourself with
|
||||
the various components on the board.
|
||||
|
||||
[[board-componets]]
|
||||
==== Board components
|
||||
|
||||
<<board-componets-figure>> below shows the locations of the connectors, LEDs, and
|
||||
switches on the PCB layout of the board.
|
||||
|
||||
[[board-componets-figure,BeagleBone AI-64 board components figure]]
|
||||
image::images/ch04/components.png[title="BeagleBone AI-64 board components"]
|
||||
|
||||
* *DC Power* is the main DC input that accepts 5V power.
|
||||
* *Power Button* alerts the processor to initiate the power down
|
||||
sequence and is used to power down the board.
|
||||
* *GigaBit Ethernet* is the connection to the LAN.
|
||||
* *Serial Debug ports* WKUP_UART0 for early boot from the management MCU
|
||||
and UART0 is for the main processor.
|
||||
* *USB Client* is a USB-C connection to a PC that can also power the
|
||||
board.
|
||||
* *BOOT switch* can be used to force a boot from the microSD card if the
|
||||
power is cycled on the board, removing power and reapplying the power to
|
||||
the board..
|
||||
* There are five green **LEDs** that can be used by the user.
|
||||
* *Reset Button* allows the user to reset the processor.
|
||||
* *microSD* slot is where a microSD card can be installed.
|
||||
* *miniDP* connector is where the display is connected to.
|
||||
* *USB Host* can be connected different USB interfaces such as Wi-Fi,
|
||||
Bluetooth, Keyboard, etc.
|
||||
|
||||
On bottom side we have,
|
||||
|
||||
* *TI TDA4VM* processor.
|
||||
* *4GB LPDDR4* Dual Data Rate RAM memory.
|
||||
* *Ethernet PHY* physical interface to the network.
|
||||
* *eMMC* onboard MMC chip that holds up to 16GB of data.
|
||||
329
doc/SRM/chapter-05.adoc
Executable file
329
doc/SRM/chapter-05.adoc
Executable file
@ -0,0 +1,329 @@
|
||||
[[beaglebone-ai-64-high-level-specification]]
|
||||
== BeagleBone AI-64 High Level Specification
|
||||
|
||||
<<bbai-64-block-diagram-ch05>> below shows the high level block diagram of BeagleBone
|
||||
AI-64 board surrounding TDA4VM SoC.
|
||||
|
||||
[[bbai-64-block-diagram-ch05,BeagleBone AI-64 Key Components figure]]
|
||||
image::images/ch05/board-block-diagram.svg[title="BeagleBone AI-64 Key Components"]
|
||||
|
||||
[[processor]]
|
||||
=== Processor
|
||||
|
||||
BeagleBone AI-64 uses TI J721E-family https://www.ti.com/product/TDA4VM[TDA4VM] system-on-chip (SoC) which is part of the K3 Multicore SoC architecture platform
|
||||
and it is targeted for the reliability and low-latency needs of the automotive market provide for a great
|
||||
general purpose platform suitable for industrial automation, mobile robotics, building automation and numerous hobby projects.
|
||||
|
||||
The SoC designed as a low power, high performance and highly integrated device architecture, adding
|
||||
significant enhancement on processing power, graphics capability, video and imaging processing, virtualization
|
||||
and coherent memory support. In addition, these SoCs support state of the art security and functional safety
|
||||
features. For the remaining of this section device, SoC, and processor will be used interchangeably.
|
||||
|
||||
*Some of the main distinguished characteristics of the device are:*
|
||||
|
||||
* 64-bit architecture with virtualization and coherent memory support, which leverages full processing capability
|
||||
of 64-bit Arm® Cortex®-A72
|
||||
* Fully programmable industrial communication subsystems to enable future-proof designs for customers that
|
||||
need to adopt the new Gigabit Time-sensitive Networks (TSN) standards, but still need full support on legacy
|
||||
protocols and continuous system optimization over the product deployment
|
||||
* Integration of vision hardware processing accelerators to facilitate extensive processing requirements in low
|
||||
power budget for automotive ADAS and machine vision applications
|
||||
* Integration of a general-purpose microcontroller unit (MCU) with a dual Arm® Cortex®-R5F MCU subsystem,
|
||||
available for general purpose use as two cores or in lockstep, intended to help customers achieve functional
|
||||
safety goals for their end products
|
||||
* Integration of a next-generation fixed and floating-point C71x Digital Signal Processor (DSP) that significantly
|
||||
boosts power over a broad range of general signal processing tasks for both general applications and
|
||||
automotive functions which also incorporates advanced techniques to improve control code efficiency and
|
||||
ease of programming such as branch prediction, protected pipeline, precise exception and virtual memory
|
||||
management
|
||||
* Tightly coupled Matrix Multiplication Accelerator (MMA) that extends the C71x DSP architecture's scalar and
|
||||
vector facilities enabling deep learning and enhance vision, analytics and wide range of general applications.
|
||||
The achieved total TOPS (Tera Operations Per Second) performance significantly differentiates the device for
|
||||
single board computer in machine vision and deep learning applications
|
||||
* Key display features including flexibility to interface with different panel types (eDP, DSI, DPI) with multi-layer
|
||||
hardware composition
|
||||
* Integration of hardware features that help applications to achieve functional safety mechanisms
|
||||
* Robust security architecture with sandboxed DMSC controller managing all secure configurations with high
|
||||
performance client-server messaging scheme between secure DMSC and all cores
|
||||
* Simplified solution for power supply management, enabling lower cost system solution (on-die bias LDOs and
|
||||
power good comparators for minimal power sequencing requirements consistent with low cost supply design)
|
||||
|
||||
*The device is composed of the following main subsystems, across different domains of the SoC, among others:*
|
||||
|
||||
* One dual-core 64-bit Arm Cortex-A72 microprocessor subsystem at up to 2.0 GHz and up to 24K DMIPS
|
||||
(Dhrystone Million Instructions per Second)
|
||||
* Up to three Microcontroller Units (MCU), based on dual-core Arm Cortex-R5F processor running at up to 1.0
|
||||
GHz, up to 12K DMIPS
|
||||
* Up to two TMS320C66x DSP CorePac modules running at up to 1.35 GHz, up to 40 GFLOPS
|
||||
* One C71x floating point, vector DSP running at up to up to 1.0 GHz, up to 80 GFLOPS
|
||||
* One deep-learning MMA, up to 8 TOPS (8b) at 1.0 GHz
|
||||
* Up to two gigabit dual-core Programmable Real-Time Unit and Industrial Communication Subsystems
|
||||
(PRU_ICSSG)
|
||||
* Two Navigator Subsystems (NAVSS) for data movement and control
|
||||
* One multi-pipeline Display Subsystem (DSS) with one MIPI® Display Serial Interface Controller (DSI) and
|
||||
shared MIPI D-PHY Transmitter (DPHY_TX), one Embedded DisplayPort Transmitter (EDP) with shared
|
||||
Serializer/Deserializer (SERDES), and two MIPI Display Pixel Interface (DPI) ports
|
||||
* Two Camera Streaming Interface Receivers (CSI_RX_IF) with dedicated MIPI D-PHYs (DPHY_RX)
|
||||
* One Camera Streaming Interface Transmitter (CSI_TX_IF) with MIPI D-PHY Transmitter (DPHY_TX) shared
|
||||
with DSI
|
||||
* One Vision Processing Accelerator (VPAC) with image signal processor
|
||||
* One Depth and Motion Processing Accelerator (DMPAC)
|
||||
* One dual-core multi-standard HD Video Decoder (DECODER)
|
||||
* One dual-core multi-standard HD Video Encoder (ENCODER)
|
||||
* One Graphics Processing Unit (GPU)
|
||||
* One Device Management and Security Controller (DMSC)
|
||||
|
||||
*The device provides a rich set of peripherals such as:*
|
||||
|
||||
* General connectivity peripherals, including:
|
||||
** Two 12-bit general purpose Analog-to-Digital Converters (ADC)
|
||||
** Ten Inter-Integrated Circuit (I2C) interfaces
|
||||
** Three Improved Inter-Integrated Circuit (I3C) controllers
|
||||
** Eleven master/slave Multichannel Serial Peripheral Interfaces (MCSPI)
|
||||
** Twelve configurable Universal Asynchronous Receiver/Transmitter (UART) interfaces
|
||||
** Ten General-Purpose Input/Output (GPIO) modules
|
||||
|
||||
* High-speed interfaces, including:
|
||||
** Two Gigabit Ethernet Switch (CPSW) modules
|
||||
** Two Dual-Role-Device (DRD) Universal Serial Bus Subsystems (USBSS) with integrated PHY
|
||||
** Four Peripheral Component Interconnect express (PCIe) Gen3 subsystems
|
||||
|
||||
* Flash memory interfaces, including:
|
||||
** One Octal SPI (OSPI) interface and one Quad SPI (QSPI) or one QSPI and one HyperBus^TM^
|
||||
** One General Purpose Memory Controller (GPMC) with Error Location Module (ELM) and 8- or 16-
|
||||
bit-wide data bus width (supports parallel NOR or NAND FLASH devices)
|
||||
** Three Multimedia Card/Secure Digital (MMCSD) controllers
|
||||
** One Universal Flash Storage (UFS) interface
|
||||
|
||||
* Industrial and control interfaces, including:
|
||||
** Sixteen Controller Area Network (MCAN) interfaces with flexible data rate support
|
||||
** Three Enhanced Capture (ECAP) modules
|
||||
** Six Enhanced Pulse-Width Modulation (EPWM) subsystems
|
||||
** Three Enhanced Quadrature Encoder Pulse (EQEP) modules
|
||||
|
||||
* Audio peripherals, including:
|
||||
** One Audio Tracking Logic (ATL)
|
||||
** Twelve Multichannel Audio Serial Port (MCASP) modules supporting up to 16 channels with independent
|
||||
TX/RX clock/sync domain
|
||||
|
||||
* One Video Processing Front End (VPFE) interface module
|
||||
|
||||
*The device also integrates:*
|
||||
|
||||
* Power distribution, reset controls and clock management components
|
||||
|
||||
* Power-management techniques for device power consumption minimization:
|
||||
** Adaptive Voltage Scaling (AVS)
|
||||
** Dynamic Frequency Scaling (DFS)
|
||||
** Gated clocks
|
||||
** Multiple voltage domains
|
||||
** Independently controlled power domains for major modules
|
||||
** Voltage and Temperature Management (VTM) module
|
||||
** Power-on Reset Generators (PRG)
|
||||
** Power Sleep Controllers (PSC)
|
||||
|
||||
* Optimized interconnect (CBASS) architecture to enable latency-critical real time network and IO applications
|
||||
|
||||
* Control modules (CTRL_MMRs) mainly associated with device top-level configurations such as:
|
||||
** IO Pad and pin multiplexing configuration
|
||||
** PLL control and associated High-Speed Dividers (HSDIV)
|
||||
** Clock selection
|
||||
** Analog function controls
|
||||
|
||||
* Multicore Shared Memory Controller (MSMC)
|
||||
* DDR Subsystem (DDRSS) with Error Correcting Code (ECC), supporting LPDDR4
|
||||
* 1KB RAM with ECC support for C71x boot vectors
|
||||
* 2KB RAM with ECC support for A72 and R5F boot vectors
|
||||
* 512KB On-Chip SRAM protected by ECC
|
||||
* One Global Time Counter (GTC) module
|
||||
* Thirty 32-bit counter timers with compare and capture modes
|
||||
* Debug and trace capabilities
|
||||
|
||||
*The device includes different modules for functional safety requirements support:*
|
||||
|
||||
* MCU island with dual lock step Arm Cortex-R5F
|
||||
* Safety enabled interconnect with implemented features to help with Freedom From Interference (FFI)
|
||||
* Twelve Real Time Interrupt (RTI) modules with Windowed Watchdog Timer (WWDT) functionality to monitor
|
||||
processor cores
|
||||
* Sixteen Dual-Clock Comparators (DCC) to monitor clocking sources during run-time
|
||||
* Three Error Signaling Modules (ESM) to enable error monitoring
|
||||
* Temperature monitoring sensors
|
||||
* ECC on all critical memories
|
||||
* Dedicated hardware Memory Cyclic Redundancy Check (MCRC) blocks
|
||||
|
||||
*The device supports the following main security functionalities among others:*
|
||||
|
||||
* Secure Boot Management
|
||||
* Public Key Accelerator (PKA) for large vector math operation
|
||||
* Cryptographic acceleration (AES, 3DES, MD5, SHA1, SHA2-224, 256, 512 operation)
|
||||
* Trusted Execution Environment (TEE)
|
||||
* Secure storage support
|
||||
* On-the-fly encryption and authentication support for OSPI interface
|
||||
|
||||
The device is partitioned into three functional domains as shown in <<soc-block-diagram>>,
|
||||
each containing specific processing cores and peripherals:
|
||||
|
||||
* Wake-up (WKUP) domain
|
||||
* Microcontroller (MCU) domain with one of the dual Cortex-R5 cluster
|
||||
* MAIN domain
|
||||
|
||||
[[soc-block-diagram,Device Top-level Block Diagram]]
|
||||
image::images/ch05/soc-block-diagram.svg[title="Device Top-level Block Diagram"]
|
||||
|
||||
[[memory]]
|
||||
=== Memory
|
||||
|
||||
Described in the following sections are the three memory devices found
|
||||
on the board.
|
||||
|
||||
[[mb-ddr4l]]
|
||||
==== 4GB LPDDR4
|
||||
|
||||
A single (1024M x 16bits x 2channels) LPDDR4 4Gb memory device is used. The memory
|
||||
used is is:
|
||||
|
||||
* Kingston Q3222PM1WDGTK-U
|
||||
|
||||
[[kb-eeprom]]
|
||||
==== 4Kb EEPROM
|
||||
|
||||
A single 4Kb EEPROM (24FC04HT-I/OT) is provided on I2C0 that holds the board
|
||||
information. This information includes board name, serial number, and
|
||||
revision information.
|
||||
|
||||
[[gb-embedded-mmc]]
|
||||
==== 16GB Embedded MMC
|
||||
|
||||
A single 16GB embedded MMC (eMMC) device is on the board. The device
|
||||
connects to the MMC1 port of the processor, allowing for 8bit wide
|
||||
access. Default boot mode for the board will be MMC1 with an option to
|
||||
change it to MMC0, the SD card slot, for booting from the SD card as a
|
||||
result of removing and reapplying the power to the board. Simply
|
||||
pressing the reset button will not change the boot mode. MMC0 cannot be
|
||||
used in 8Bit mode because the lower data pins are located on the pins
|
||||
used by the Ethernet port. This does not interfere with SD card
|
||||
operation but it does make it unsuitable for use as an eMMC port if the
|
||||
8 bit feature is needed.
|
||||
|
||||
[[microsd-connector]]
|
||||
==== MicroSD Connector
|
||||
|
||||
The board is equipped with a single microSD connector to act as the
|
||||
secondary boot source for the board and, if selected as such, can be the
|
||||
primary boot source. The connector will support larger capacity microSD
|
||||
cards. The microSD card is not provided with the board. Booting from
|
||||
MMC0 will be used to flash the eMMC in the production environment or can
|
||||
be used by the user to update the SW as needed.
|
||||
|
||||
[[boot-modes]]
|
||||
==== Boot Modes
|
||||
|
||||
As mentioned earlier, there are two boot modes:
|
||||
|
||||
* **eMMC Boot…**This is the default boot mode and will allow for the
|
||||
fastest boot time and will enable the board to boot out of the box using
|
||||
the pre-flashed OS image without having to purchase an microSD card or
|
||||
an microSD card writer.
|
||||
* **SD Boot…**This mode will boot from the microSD slot. This mode can
|
||||
be used to override what is on the eMMC device and can be used to
|
||||
program the eMMC when used in the manufacturing process or for field
|
||||
updates.
|
||||
|
||||
[NOTE]
|
||||
====
|
||||
TODO: This section needs more work and references to greater detail. Other boot modes are possible.
|
||||
|
||||
_Software to support USB and serial boot modes is not provided by
|
||||
beagleboard.org._ _Please contact TI for support of this feature._
|
||||
====
|
||||
|
||||
A switch is provided to allow switching between the modes.
|
||||
|
||||
* Holding the boot switch down during a removal and reapplication of
|
||||
power without a microSD card inserted will force the boot source to be
|
||||
the USB port and if nothing is detected on the USB client port, it will
|
||||
go to the serial port for download.
|
||||
* Without holding the switch, the board will boot try to boot from the
|
||||
eMMC. If it is empty, then it will try booting from the microSD slot,
|
||||
followed by the serial port, and then the USB port.
|
||||
* If you hold the boot switch down during the removal and reapplication
|
||||
of power to the board, and you have a microSD card inserted with a
|
||||
bootable image, the board will boot from the microSD card.
|
||||
|
||||
_NOTE: Pressing the RESET button on the board will NOT result in a
|
||||
change of the_ _boot mode. You MUST remove power and reapply power to
|
||||
change the boot mode._ _The boot pins are sampled during power on reset
|
||||
from the PMIC to the processor._ _The reset button on the board is a
|
||||
warm reset only and will not force a boot mode_ _change._
|
||||
|
||||
[[power-management]]
|
||||
=== Power Management
|
||||
|
||||
The *TPS65941213 and TPS65941111* power management device is used along with a separate
|
||||
LDO to provide power to the system.
|
||||
|
||||
[[pc-usb-interface]]
|
||||
=== PC USB Interface
|
||||
|
||||
The board has a USB type-C connector that connects to USB0 port of the
|
||||
processor.
|
||||
|
||||
[[serial-debug-ports]]
|
||||
=== Serial Debug Ports
|
||||
|
||||
Two serial debug ports are provided on board via 3pin micro headers,
|
||||
|
||||
1. WKUP_UART0: Wake-up domain serial port
|
||||
2. UART0: Main domain serial port
|
||||
|
||||
|
||||
In order to use the interfaces a
|
||||
https://uk.farnell.com/element14/1103004000156/beaglebone-ai-serials-cable/dp/3291081[3pin micro to 6pin dupont adaptor header]
|
||||
is required with a 6 pin USB to TTL adapter. The header is compatible with
|
||||
the one provided by FTDI and canbe purchased for about $$12 to $$20 from
|
||||
various sources. Signals supported are TX and RX. None of the handshake
|
||||
signals are supported.
|
||||
|
||||
[[usb1-host-port]]
|
||||
=== USB1 Host Port
|
||||
|
||||
On the board is a single USB Type A female connector with full LS/FS/HS
|
||||
Host support that connects to USB1 on the processor. The port can
|
||||
provide power on/off control and up to 1.5A of current at 5V. Under USB
|
||||
power, the board will not be able to supply the full 1.5A, but should
|
||||
be sufficient to supply enough current for a lower power USB device
|
||||
supplying power between 50 to 100mA.
|
||||
|
||||
[[power-sources]]
|
||||
=== Power Sources
|
||||
|
||||
The board can be powered from two different sources:
|
||||
|
||||
* A 5V ≥ 3A power supply plugged into the barrel jack.
|
||||
* A wall adaptor with 5V ≥ 3A output power.
|
||||
|
||||
The power supply is not provided with the board but can be easily
|
||||
obtained from numerous sources. A 5V ≥ 3A supply is mandatory to have with
|
||||
the board, but if there is a cape plugged into the board or you have a power
|
||||
hungry device or hub plugged into the host port, then more current may
|
||||
needed from the DC supply.
|
||||
|
||||
[[reset-button]]
|
||||
=== Reset Button
|
||||
|
||||
When pressed and released, causes a reset of the board.
|
||||
|
||||
[[power-button]]
|
||||
=== Power Button
|
||||
|
||||
This button takes advantage of the input to the PMIC for
|
||||
power down features.
|
||||
|
||||
[[indicators]]
|
||||
=== Indicators
|
||||
|
||||
There are a total of six green LEDs on the board.
|
||||
|
||||
* One green power LED indicates that power is applied and the power
|
||||
management IC is up.
|
||||
* Five blue LEDs that can be controlled via the SW by setting GPIO pins.
|
||||
1201
doc/SRM/chapter-06.adoc
Executable file
1201
doc/SRM/chapter-06.adoc
Executable file
File diff suppressed because it is too large
Load Diff
340
doc/SRM/chapter-07.adoc
Executable file
340
doc/SRM/chapter-07.adoc
Executable file
@ -0,0 +1,340 @@
|
||||
[[connectors]]
|
||||
== Connectors
|
||||
|
||||
This section describes each of the connectors on the board.
|
||||
|
||||
[[section-7-1,Section 7.1 Expansion Connectors]]
|
||||
=== Expansion Connectors
|
||||
|
||||
The expansion interface on the board is comprised of two 46 pin
|
||||
connectors. All signals on the expansion headers are _3.3V_ unless
|
||||
otherwise indicated.
|
||||
|
||||
_NOTE: Do not connect 5V logic level signals to these pins or the board
|
||||
will be_ _damaged._ '''
|
||||
|
||||
*NOTE: DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO
|
||||
THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.*
|
||||
|
||||
*NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.*
|
||||
|
||||
<<figure-50>> shows the location of the expansion connectors.
|
||||
|
||||
[[figure-50,Figure 50]]
|
||||
.Figure 50. Expansion Connector Location
|
||||
image:media/image68.jpg[media/image68.jpg,title="media/image68.jpg",width=286,height=394,align="center"]
|
||||
|
||||
The location and spacing of the expansion headers are the same as on the BeagleBone Black.
|
||||
|
||||
[[connector-p8-and-p9]]
|
||||
==== Connector P8 and P9
|
||||
|
||||
<<table-12>> shows the pin bindings for **P8** and **P9** expansion headers. Signals
|
||||
can be connected to theese connectors based on setting the pin mux on the
|
||||
processor, but this is the default settings on power up. The SW is
|
||||
responsible for setting the default function of each pin. There are some
|
||||
signals that have not been listed here. Refer to the processor
|
||||
documentation for more information on these pins and detailed
|
||||
descriptions of all of the pins listed. In some cases there may not be
|
||||
enough signals to complete a group of signals that may be required to
|
||||
implement a total interface.
|
||||
|
||||
The *BALL NUMBER* Identifier is the pin number in the processor documentation.
|
||||
|
||||
The *PIN No.* column is the pin number on the expansion header.
|
||||
|
||||
The *ADDRESS* column is the pin CONFIGURATION address??? for each pin.
|
||||
|
||||
The *MUXMODE[14:0] SETTINGS* are the possible pin configurations.
|
||||
|
||||
|
||||
*NOTE: DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO
|
||||
THE BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.*
|
||||
|
||||
*NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.*
|
||||
|
||||
|
||||
|=======
|
||||
| *PIN No.* | *ADDRESS* | *REGISTER NAME* | *BALL NUMBER* | *MUXMODE[14:0] SETTINGS*|||||||||||||||
|
||||
| *PIN No.* | *ADDRESS* | *REGISTER NAME* | *BALL NUMBER* |*0* | *1* | *2* | *3* | *4* | *5* | *6* | *7* | *8* | *9* | *10* | *11* | *12* | *13* | *14* | *Bootstrap*
|
||||
|P8_03|0x00011C054 | PADCONFIG21 | AH21 | PRG1_PRU0_GPO19 | PRG1_PRU0_GPI19 | PRG1_IEP0_EDC_SYNC_OUT0 | PRG1_PWM0_TZ_OUT | | RMII5_TXD0 | MCAN6_TX | GPIO0_20 | | | VOUT0_EXTPCLKIN | VPFE0_PCLK | MCASP4_AFSX | | |
|
||||
|P8_04 |0x00011C0C4 | PADCONFIG49 | AC29 | PRG0_PRU0_GPO5 | PRG0_PRU0_GPI5 | | PRG0_PWM3_B2 | | RMII3_TXD0 | | GPIO0_48 | GPMC0_AD0 | | | | MCASP0_AXR3 | | | BOOTMODE2
|
||||
|P8_05 |0x00011C088 | PADCONFIG34 | AH25 | PRG1_PRU1_GPO12 | PRG1_PRU1_GPI12 | PRG1_RGMII2_TD1 | PRG1_PWM1_A0 | RGMII2_TD1 | | MCAN7_TX | GPIO0_33 | RGMII8_TD1 | | VOUT0_DATA12 | | MCASP9_AFSX | | |
|
||||
|P8_06 |0x00011C08C | PADCONFIG35 | AG25 | PRG1_PRU1_GPO13 | PRG1_PRU1_GPI13 | PRG1_RGMII2_TD2 | PRG1_PWM1_B0 | RGMII2_TD2 | | MCAN7_RX | GPIO0_34 | RGMII8_TD2 | | VOUT0_DATA13 | VPFE0_DATA8 | MCASP9_AXR0 | MCASP4_ACLKR | |
|
||||
|P8_07 |0x00011C03C | PADCONFIG15 | AD24 | PRG1_PRU0_GPO14 | PRG1_PRU0_GPI14 | PRG1_RGMII1_TD3 | PRG1_PWM0_A1 | RGMII1_TD3 | | MCAN5_RX | GPIO0_15 | | RGMII7_TD3 | VOUT0_DATA19 | VPFE0_DATA3 | MCASP7_AXR1 | | |
|
||||
|P8_08 |0x00011C038 | PADCONFIG14 | AG24 | PRG1_PRU0_GPO13 | PRG1_PRU0_GPI13 | PRG1_RGMII1_TD2 | PRG1_PWM0_B0 | RGMII1_TD2 | | MCAN5_TX | GPIO0_14 | | RGMII7_TD2 | VOUT0_DATA18 | VPFE0_DATA2 | MCASP7_AXR0 | | |
|
||||
|P8_09 |0x00011C044 | PADCONFIG17 | AE24 | PRG1_PRU0_GPO16 | PRG1_PRU0_GPI16 | PRG1_RGMII1_TXC | PRG1_PWM0_A2 | RGMII1_TXC | | MCAN6_RX | GPIO0_17 | | RGMII7_TXC | VOUT0_DATA21 | VPFE0_DATA5 | MCASP7_AXR3 | MCASP7_AFSR | |
|
||||
|P8_10 |0x00011C040 | PADCONFIG16 | AC24 | PRG1_PRU0_GPO15 | PRG1_PRU0_GPI15 | PRG1_RGMII1_TX_CTL | PRG1_PWM0_B1 | RGMII1_TX_CTL | | MCAN6_TX | GPIO0_16 | | RGMII7_TX_CTL | VOUT0_DATA20 | VPFE0_DATA4 | MCASP7_AXR2 | MCASP7_ACLKR | |
|
||||
|P8_11 |0x00011C0F4 | PADCONFIG61 | AB24 | PRG0_PRU0_GPO17 | PRG0_PRU0_GPI17 | PRG0_IEP0_EDC_SYNC_OUT1 | PRG0_PWM0_B2 | PRG0_ECAP0_SYNC_OUT | | | GPIO0_60 | GPMC0_AD5 | OBSCLK1 | | | MCASP0_AXR13 | | | BOOTMODE7
|
||||
|P8_12 |0x00011C0F0 | PADCONFIG60 | AH28 | PRG0_PRU0_GPO16 | PRG0_PRU0_GPI16 | PRG0_RGMII1_TXC | PRG0_PWM0_A2 | RGMII3_TXC | | | GPIO0_59 | | | DSS_FSYNC1 | | MCASP0_AXR12 | | |
|
||||
|P8_13 |0x00011C168 | PADCONFIG90 | V27 | RGMII5_TD1 | RMII7_TXD1 | I2C3_SCL | | VOUT1_DATA4 | TRC_DATA2 | EHRPWM0_B | GPIO0_89 | GPMC0_A5 | | | | MCASP11_ACLKX | | |
|
||||
|P8_14 |0x00011C130 | PADCONFIG76 | AF27 | PRG0_PRU1_GPO12 | PRG0_PRU1_GPI12 | PRG0_RGMII2_TD1 | PRG0_PWM1_A0 | RGMII4_TD1 | | | GPIO0_75 | | | | | MCASP1_AXR8 | | UART8_CTSn |
|
||||
|P8_15 |0x00011C0F8 | PADCONFIG62 | AB29 | PRG0_PRU0_GPO18 | PRG0_PRU0_GPI18 | PRG0_IEP0_EDC_LATCH_IN0 | PRG0_PWM0_TZ_IN | PRG0_ECAP0_IN_APWM_OUT | | | GPIO0_61 | GPMC0_AD6 | | | | MCASP0_AXR14 | | |
|
||||
|P8_16 |0x00011C0FC | PADCONFIG63 | AB28 | PRG0_PRU0_GPO19 | PRG0_PRU0_GPI19 | PRG0_IEP0_EDC_SYNC_OUT0 | PRG0_PWM0_TZ_OUT | | | | GPIO0_62 | GPMC0_AD7 | | | | MCASP0_AXR15 | | |
|
||||
|P8_17 |0x00011C00C | PADCONFIG3 | AF22 | PRG1_PRU0_GPO2 | PRG1_PRU0_GPI2 | PRG1_RGMII1_RD2 | PRG1_PWM2_A0 | RGMII1_RD2 | RMII1_CRS_DV | | GPIO0_3 | GPMC0_WAIT1 | RGMII7_RD2 | | | MCASP6_AXR0 | | UART1_RXD |
|
||||
|P8_18 |0x00011C010 | PADCONFIG4 | AJ23 | PRG1_PRU0_GPO3 | PRG1_PRU0_GPI3 | PRG1_RGMII1_RD3 | PRG1_PWM3_A2 | RGMII1_RD3 | RMII1_RX_ER | | GPIO0_4 | GPMC0_DIR | RGMII7_RD3 | | | MCASP6_AXR1 | | UART1_TXD |
|
||||
|P8_19 |0x00011C164 | PADCONFIG89 | V29 | RGMII5_TD2 | UART3_TXD | | SYNC3_OUT | VOUT1_DATA3 | TRC_DATA1 | EHRPWM0_A | GPIO0_88 | GPMC0_A4 | | | | MCASP10_AXR1 | | |
|
||||
|P8_20 |0x00011C134 | PADCONFIG77 | AF26 | PRG0_PRU1_GPO13 | PRG0_PRU1_GPI13 | PRG0_RGMII2_TD2 | PRG0_PWM1_B0 | RGMII4_TD2 | | | GPIO0_76 | | | | | MCASP1_AXR9 | | UART8_RTSn |
|
||||
|P8_21 |0x00011C07C | PADCONFIG31 | AF21 | PRG1_PRU1_GPO9 | PRG1_PRU1_GPI9 | PRG1_UART0_RXD | | SPI6_CS3 | RMII6_RXD1 | MCAN8_TX | GPIO0_30 | GPMC0_CSn0 | PRG1_IEP0_EDIO_DATA_IN_OUT30 | VOUT0_DATA9 | | MCASP4_AXR3 | | |
|
||||
|P8_22 |0x00011C014 | PADCONFIG5 | AH23 | PRG1_PRU0_GPO4 | PRG1_PRU0_GPI4 | PRG1_RGMII1_RX_CTL | PRG1_PWM2_B0 | RGMII1_RX_CTL | RMII1_TXD0 | | GPIO0_5 | GPMC0_CSn2 | RGMII7_RX_CTL | | | MCASP6_AXR2 | MCASP6_ACLKR | UART2_RXD |
|
||||
|P8_23 |0x00011C080 | PADCONFIG32 | AB23 | PRG1_PRU1_GPO10 | PRG1_PRU1_GPI10 | PRG1_UART0_TXD | PRG1_PWM2_TZ_IN | | RMII6_CRS_DV | MCAN8_RX | GPIO0_31 | GPMC0_CLKOUT | PRG1_IEP0_EDIO_DATA_IN_OUT31 | VOUT0_DATA10 | GPMC0_FCLK_MUX | MCASP5_ACLKX | | |
|
||||
|P8_24 |0x00011C018 | PADCONFIG6 | AD20 | PRG1_PRU0_GPO5 | PRG1_PRU0_GPI5 | | PRG1_PWM3_B2 | | RMII1_TX_EN | | GPIO0_6 | GPMC0_WEn | | | | MCASP3_AXR0 | | | BOOTMODE0
|
||||
|P8_25 |0x00011C090 | PADCONFIG36 | AH26 | PRG1_PRU1_GPO14 | PRG1_PRU1_GPI14 | PRG1_RGMII2_TD3 | PRG1_PWM1_A1 | RGMII2_TD3 | | MCAN8_TX | GPIO0_35 | RGMII8_TD3 | | VOUT0_DATA14 | | MCASP9_AXR1 | MCASP4_AFSR | |
|
||||
|P8_26 |0x00011C0D0 | PADCONFIG52 | AC27 | PRG0_PRU0_GPO8 | PRG0_PRU0_GPI8 | | PRG0_PWM2_A1 | | | MCAN9_RX | GPIO0_51 | GPMC0_AD2 | | | | MCASP0_AXR6 | | UART6_RXD |
|
||||
|P8_27 |0x00011C120 | PADCONFIG72 | AA28 | PRG0_PRU1_GPO8 | PRG0_PRU1_GPI8 | | PRG0_PWM2_TZ_OUT | | | MCAN11_RX | GPIO0_71 | GPMC0_AD10 | | | | MCASP1_AFSX | | |
|
||||
|P8_28 |0x00011C124 | PADCONFIG73 | Y24 | PRG0_PRU1_GPO9 | PRG0_PRU1_GPI9 | PRG0_UART0_RXD | | SPI3_CS3 | | PRG0_IEP0_EDIO_DATA_IN_OUT30 | GPIO0_72 | GPMC0_AD11 | | DSS_FSYNC3 | | MCASP1_AXR5 | | UART8_RXD |
|
||||
|P8_29 |0x00011C128 | PADCONFIG74 | AA25 | PRG0_PRU1_GPO10 | PRG0_PRU1_GPI10 | PRG0_UART0_TXD | PRG0_PWM2_TZ_IN | | | PRG0_IEP0_EDIO_DATA_IN_OUT31 | GPIO0_73 | GPMC0_AD12 | CLKOUT | | | MCASP1_AXR6 | | UART8_TXD |
|
||||
|P8_30 |0x00011C12C | PADCONFIG75 | AG26 | PRG0_PRU1_GPO11 | PRG0_PRU1_GPI11 | PRG0_RGMII2_TD0 | | RGMII4_TD0 | RMII4_TX_EN | | GPIO0_74 | GPMC0_A26 | | | | MCASP1_AXR7 | | |
|
||||
|P8_31A |0x00011C084 | PADCONFIG33 | AJ25 | PRG1_PRU1_GPO11 | PRG1_PRU1_GPI11 | PRG1_RGMII2_TD0 | | RGMII2_TD0 | RMII2_TX_EN | | GPIO0_32 | RGMII8_TD0 | EQEP1_I | VOUT0_DATA11 | | MCASP9_ACLKX | | |
|
||||
|P8_31B |0x00011C100 | PADCONFIG64 | AE29 | PRG0_PRU1_GPO0 | PRG0_PRU1_GPI0 | PRG0_RGMII2_RD0 | | RGMII4_RD0 | RMII4_RXD0 | | GPIO0_63 | UART4_CTSn | | | | MCASP1_AXR0 | | UART5_RXD |
|
||||
|P8_32A |0x00011C06C | PADCONFIG27 | AG21 | PRG1_PRU1_GPO5 | PRG1_PRU1_GPI5 | | | | RMII5_TX_EN | MCAN6_RX | GPIO0_26 | GPMC0_WPn | EQEP1_S | VOUT0_DATA5 | | MCASP4_AXR0 | | TIMER_IO4 |
|
||||
|P8_32B |0x00011C104 | PADCONFIG65 | AD28 | PRG0_PRU1_GPO1 | PRG0_PRU1_GPI1 | PRG0_RGMII2_RD1 | | RGMII4_RD1 | RMII4_RXD1 | | GPIO0_64 | UART4_RTSn | | | | MCASP1_AXR1 | | UART5_TXD |
|
||||
|P8_33A |0x00011C068 | PADCONFIG26 | AH24 | PRG1_PRU1_GPO4 | PRG1_PRU1_GPI4 | PRG1_RGMII2_RX_CTL | PRG1_PWM2_B2 | RGMII2_RX_CTL | RMII2_TXD0 | | GPIO0_25 | RGMII8_RX_CTL | EQEP1_B | VOUT0_DATA4 | VPFE0_DATA13 | MCASP8_AXR2 | MCASP8_ACLKR | TIMER_IO3 |
|
||||
|P8_33B |0x00011C1C0 | PADCONFIG112 | AA2 | SPI0_CS0 | UART0_RTSn | | | | | | GPIO0_111 | | | | | | | |
|
||||
|P8_34 |0x00011C01C | PADCONFIG7 | AD22 | PRG1_PRU0_GPO6 | PRG1_PRU0_GPI6 | PRG1_RGMII1_RXC | PRG1_PWM3_A1 | RGMII1_RXC | RMII1_TXD1 | AUDIO_EXT_REFCLK0 | GPIO0_7 | GPMC0_CSn3 | RGMII7_RXC | | | MCASP6_AXR3 | MCASP6_AFSR | UART2_TXD |
|
||||
|P8_35A |0x00011C064 | PADCONFIG25 | AD23 | PRG1_PRU1_GPO3 | PRG1_PRU1_GPI3 | PRG1_RGMII2_RD3 | | RGMII2_RD3 | RMII2_RX_ER | | GPIO0_24 | RGMII8_RD3 | EQEP1_A | VOUT0_DATA3 | VPFE0_WEN | MCASP8_AXR1 | MCASP3_AFSR | TIMER_IO2 |
|
||||
|P8_35B |0x00011C1D4 | PADCONFIG117 | Y3 | SPI1_CS0 | UART0_CTSn | | UART5_RXD | | | PRG0_IEP0_EDIO_OUTVALID | GPIO0_116 | PRG0_IEP0_EDC_LATCH_IN0 | | | | | | |
|
||||
|P8_36 |0x00011C020 | PADCONFIG8 | AE20 | PRG1_PRU0_GPO7 | PRG1_PRU0_GPI7 | PRG1_IEP0_EDC_LATCH_IN1 | PRG1_PWM3_B1 | | AUDIO_EXT_REFCLK1 | MCAN4_TX | GPIO0_8 | | | | | MCASP3_AXR1 | | |
|
||||
|P8_37A |0x00011C1AC | PADCONFIG107 | Y27 | RGMII6_RD2 | UART4_RTSn | | UART5_TXD | | TRC_DATA19 | EHRPWM5_A | GPIO0_106 | GPMC0_A22 | | | | MCASP11_AXR5 | | |
|
||||
|P8_37B |0x00011C02C | PADCONFIG11 | AD21 | PRG1_PRU0_GPO10 | PRG1_PRU0_GPI10 | PRG1_UART0_RTSn | PRG1_PWM2_B1 | SPI6_CS2 | RMII5_CRS_DV | | GPIO0_11 | GPMC0_BE0n_CLE | PRG1_IEP0_EDIO_DATA_IN_OUT29 | OBSCLK2 | | MCASP3_AFSX | | |
|
||||
|P8_38A |0x00011C1A8 | PADCONFIG106 | Y29 | RGMII6_RD3 | UART4_CTSn | | UART5_RXD | CLKOUT | TRC_DATA18 | EHRPWM_TZn_IN4 | GPIO0_105 | GPMC0_A21 | | | | MCASP11_AXR4 | | |
|
||||
|P8_38B |0x00011C024 | PADCONFIG9 | AJ20 | PRG1_PRU0_GPO8 | PRG1_PRU0_GPI8 | | PRG1_PWM2_A1 | | RMII5_RXD0 | MCAN4_RX | GPIO0_9 | GPMC0_OEn_REn | | VOUT0_DATA22 | | MCASP3_AXR2 | | |
|
||||
|P8_39 |0x00011C118 | PADCONFIG70 | AC26 | PRG0_PRU1_GPO6 | PRG0_PRU1_GPI6 | PRG0_RGMII2_RXC | | RGMII4_RXC | RMII4_TXD0 | | GPIO0_69 | GPMC0_A25 | | | | MCASP1_AXR3 | | |
|
||||
|P8_40 |0x00011C11C | PADCONFIG71 | AA24 | PRG0_PRU1_GPO7 | PRG0_PRU1_GPI7 | PRG0_IEP1_EDC_LATCH_IN1 | | SPI3_CS0 | | MCAN11_TX | GPIO0_70 | GPMC0_AD9 | | | | MCASP1_AXR4 | | UART2_TXD |
|
||||
|P8_41 |0x00011C110 | PADCONFIG68 | AD29 | PRG0_PRU1_GPO4 | PRG0_PRU1_GPI4 | PRG0_RGMII2_RX_CTL | PRG0_PWM2_B2 | RGMII4_RX_CTL | RMII4_TXD1 | | GPIO0_67 | GPMC0_A24 | | | | MCASP1_AXR2 | | |
|
||||
|P8_42 |0x00011C114 | PADCONFIG69 | AB27 | PRG0_PRU1_GPO5 | PRG0_PRU1_GPI5 | | | | | | GPIO0_68 | GPMC0_AD8 | | | | MCASP1_ACLKX | | | BOOTMODE6
|
||||
|P8_43 |0x00011C108 | PADCONFIG66 | AD27 | PRG0_PRU1_GPO2 | PRG0_PRU1_GPI2 | PRG0_RGMII2_RD2 | PRG0_PWM2_A2 | RGMII4_RD2 | RMII4_CRS_DV | | GPIO0_65 | GPMC0_A23 | | | | MCASP1_ACLKR | MCASP1_AXR10 | |
|
||||
|P8_44 |0x00011C10C | PADCONFIG67 | AC25 | PRG0_PRU1_GPO3 | PRG0_PRU1_GPI3 | PRG0_RGMII2_RD3 | | RGMII4_RD3 | RMII4_RX_ER | | GPIO0_66 | | | | | MCASP1_AFSR | MCASP1_AXR11 | |
|
||||
|P8_45 |0x00011C140 | PADCONFIG80 | AG29 | PRG0_PRU1_GPO16 | PRG0_PRU1_GPI16 | PRG0_RGMII2_TXC | PRG0_PWM1_A2 | RGMII4_TXC | | | GPIO0_79 | | | | | MCASP2_AXR2 | | |
|
||||
|P8_46 |0x00011C144 | PADCONFIG81 | Y25 | PRG0_PRU1_GPO17 | PRG0_PRU1_GPI17 | PRG0_IEP1_EDC_SYNC_OUT1 | PRG0_PWM1_B2 | SPI3_CLK | | | GPIO0_80 | GPMC0_AD13 | | | | MCASP2_AXR3 | | | BOOTMODE3
|
||||
|P9_11 |0x00011C004 | PADCONFIG1 | AC23 | PRG1_PRU0_GPO0 | PRG1_PRU0_GPI0 | PRG1_RGMII1_RD0 | PRG1_PWM3_A0 | RGMII1_RD0 | RMII1_RXD0 | | GPIO0_1 | GPMC0_BE1n | RGMII7_RD0 | | | MCASP6_ACLKX | | UART0_RXD |
|
||||
|P9_12 |0x00011C0B8 | PADCONFIG46 | AE27 | PRG0_PRU0_GPO2 | PRG0_PRU0_GPI2 | PRG0_RGMII1_RD2 | PRG0_PWM2_A0 | RGMII3_RD2 | RMII3_CRS_DV | | GPIO0_45 | UART3_RXD | | | | MCASP0_ACLKR | | |
|
||||
|P9_13 |0x00011C008 | PADCONFIG2 | AG22 | PRG1_PRU0_GPO1 | PRG1_PRU0_GPI1 | PRG1_RGMII1_RD1 | PRG1_PWM3_B0 | RGMII1_RD1 | RMII1_RXD1 | | GPIO0_2 | GPMC0_WAIT0 | RGMII7_RD1 | | | MCASP6_AFSX | | UART0_TXD |
|
||||
|P9_14 |0x00011C178 | PADCONFIG94 | U27 | RGMII5_RD3 | UART3_CTSn | | UART6_RXD | VOUT1_DATA8 | TRC_DATA6 | EHRPWM2_A | GPIO0_93 | GPMC0_A9 | | | | MCASP11_AXR0 | | |
|
||||
|P9_15 |0x00011C0C0 | PADCONFIG48 | AD25 | PRG0_PRU0_GPO4 | PRG0_PRU0_GPI4 | PRG0_RGMII1_RX_CTL | PRG0_PWM2_B0 | RGMII3_RX_CTL | RMII3_TXD1 | | GPIO0_47 | | | | | MCASP0_AXR2 | | |
|
||||
|P9_16A |0x00011C17C | PADCONFIG95 | U24 | RGMII5_RD2 | UART3_RTSn | | UART6_TXD | VOUT1_DATA9 | TRC_DATA7 | EHRPWM2_B | GPIO0_94 | GPMC0_A10 | | | | MCASP11_AXR1 | | |
|
||||
|P9_16B |0x00011C1DC | PADCONFIG119 | Y1 | SPI1_CLK | UART5_CTSn | I2C4_SDA | UART2_RXD | | | | GPIO0_118 | PRG0_IEP0_EDC_SYNC_OUT0 | | | | | | |
|
||||
|P9_17A |0x00011C074 | PADCONFIG29 | AC21 | PRG1_PRU1_GPO7 | PRG1_PRU1_GPI7 | PRG1_IEP1_EDC_LATCH_IN1 | | SPI6_CS0 | RMII6_RX_ER | MCAN7_TX | GPIO0_28 | | | VOUT0_DATA7 | VPFE0_DATA15 | MCASP4_AXR1 | | UART3_TXD |
|
||||
|P9_17B |0x00011C1D0 | PADCONFIG116 | AA3 | SPI0_D1 | | I2C6_SCL | | | | | GPIO0_115 | | | | | | | |
|
||||
|P9_18A |0x00011C0A4 | PADCONFIG41 | AH22 | PRG1_PRU1_GPO19 | PRG1_PRU1_GPI19 | PRG1_IEP1_EDC_SYNC_OUT0 | PRG1_PWM1_TZ_OUT | SPI6_D1 | RMII6_TXD1 | PRG1_ECAP0_IN_APWM_OUT | GPIO0_40 | | | VOUT0_PCLK | | MCASP5_AXR1 | | |
|
||||
|P9_18B |0x00011C1E4 | PADCONFIG121 | Y2 | SPI1_D1 | | I2C6_SDA | | | | | GPIO0_120 | PRG0_IEP1_EDC_SYNC_OUT0 | | | | | | |
|
||||
|P9_19A |0x00011C208 | PADCONFIG130 | W5 | MCAN0_RX | | | | I2C2_SCL | | | GPIO1_1 | | | | | | | |
|
||||
|P9_19B |0x00011C13C | PADCONFIG79 | AF29 | PRG0_PRU1_GPO15 | PRG0_PRU1_GPI15 | PRG0_RGMII2_TX_CTL | PRG0_PWM1_B1 | RGMII4_TX_CTL | | | GPIO0_78 | | | | | MCASP2_AXR1 | | UART2_RTSn |
|
||||
|P9_20A |0x00011C20C | PADCONFIG131 | W6 | MCAN0_TX | | | | I2C2_SDA | | | GPIO1_2 | | | | | | | |
|
||||
|P9_21A |0x00011C0A0 | PADCONFIG40 | AJ22 | PRG1_PRU1_GPO18 | PRG1_PRU1_GPI18 | PRG1_IEP1_EDC_LATCH_IN0 | PRG1_PWM1_TZ_IN | SPI6_D0 | RMII6_TXD0 | PRG1_ECAP0_SYNC_IN | GPIO0_39 | | VOUT0_VP2_VSYNC | VOUT0_VSYNC | | MCASP5_AXR0 | | VOUT0_VP0_VSYNC |
|
||||
|P9_22A |0x00011C09C | PADCONFIG39 | AC22 | PRG1_PRU1_GPO17 | PRG1_PRU1_GPI17 | PRG1_IEP1_EDC_SYNC_OUT1 | PRG1_PWM1_B2 | SPI6_CLK | RMII6_TX_EN | PRG1_ECAP0_SYNC_OUT | GPIO0_38 | | VOUT0_VP2_DE | VOUT0_DE | VPFE0_DATA10 | MCASP5_AFSX | | VOUT0_VP0_DE | BOOTMODE1
|
||||
|P9_22B |0x00011C170 | PADCONFIG92 | U29 | RGMII5_TXC | RMII7_TX_EN | I2C6_SCL | | VOUT1_DATA6 | TRC_DATA4 | EHRPWM1_B | GPIO0_91 | GPMC0_A7 | | | | MCASP10_AXR2 | | |
|
||||
|P9_23 |0x00011C028 | PADCONFIG10 | AG20 | PRG1_PRU0_GPO9 | PRG1_PRU0_GPI9 | PRG1_UART0_CTSn | PRG1_PWM3_TZ_IN | SPI6_CS1 | RMII5_RXD1 | | GPIO0_10 | GPMC0_ADVn_ALE | PRG1_IEP0_EDIO_DATA_IN_OUT28 | VOUT0_DATA23 | | MCASP3_ACLKX | | |
|
||||
|P9_24A |0x00011C034 | PADCONFIG13 | AJ24 | PRG1_PRU0_GPO12 | PRG1_PRU0_GPI12 | PRG1_RGMII1_TD1 | PRG1_PWM0_A0 | RGMII1_TD1 | | MCAN4_RX | GPIO0_13 | | RGMII7_TD1 | VOUT0_DATA17 | VPFE0_DATA1 | MCASP7_AFSX | | |
|
||||
|P9_24B |0x00011C1E0 | PADCONFIG120 | Y5 | SPI1_D0 | UART5_RTSn | I2C4_SCL | UART2_TXD | | | | GPIO0_119 | PRG0_IEP1_EDC_LATCH_IN0 | | | | | | |
|
||||
|P9_25A |0x00011C200 | PADCONFIG128 | AC4 | UART1_CTSn | MCAN3_RX | | | SPI2_D0 | EQEP0_S | | GPIO0_127 | | | | | | | |
|
||||
|P9_25B |0x00011C1A4 | PADCONFIG105 | W26 | RGMII6_RXC | | | AUDIO_EXT_REFCLK2 | VOUT1_DE | TRC_DATA17 | EHRPWM4_B | GPIO0_104 | GPMC0_A20 | VOUT1_VP0_DE | | | MCASP10_AXR7 | | |
|
||||
|P9_26A |0x00011C030 | PADCONFIG12 | AF24 | PRG1_PRU0_GPO11 | PRG1_PRU0_GPI11 | PRG1_RGMII1_TD0 | PRG1_PWM3_TZ_OUT | RGMII1_TD0 | | MCAN4_TX | GPIO0_12 | | RGMII7_TD0 | VOUT0_DATA16 | VPFE0_DATA0 | MCASP7_ACLKX | | |
|
||||
|P9_27A |0x00011C0BC | PADCONFIG47 | AD26 | PRG0_PRU0_GPO3 | PRG0_PRU0_GPI3 | PRG0_RGMII1_RD3 | PRG0_PWM3_A2 | RGMII3_RD3 | RMII3_RX_ER | | GPIO0_46 | UART3_TXD | | | | MCASP0_AFSR | | |
|
||||
|P9_27B |0x00011C1F4 | PADCONFIG125 | AB1 | UART0_RTSn | TIMER_IO7 | SPI0_CS3 | MCAN2_TX | SPI2_CLK | EQEP0_B | | GPIO0_124 | | | | | | | |
|
||||
|P9_28A |0x00011C230 | PADCONFIG140 | U2 | ECAP0_IN_APWM_OUT | SYNC0_OUT | CPTS0_RFT_CLK | | SPI2_CS3 | I3C0_SDAPULLEN | SPI7_CS0 | GPIO1_11 | | | | | | | |
|
||||
|P9_28B |0x00011C0B0 | PADCONFIG44 | AF28 | PRG0_PRU0_GPO0 | PRG0_PRU0_GPI0 | PRG0_RGMII1_RD0 | PRG0_PWM3_A0 | RGMII3_RD0 | RMII3_RXD1 | | GPIO0_43 | | | | | MCASP0_AXR0 | | |
|
||||
|P9_29A |0x00011C0D8 | PADCONFIG54 | AB25 | PRG0_PRU0_GPO10 | PRG0_PRU0_GPI10 | PRG0_UART0_RTSn | PRG0_PWM2_B1 | SPI3_CS2 | PRG0_IEP0_EDIO_DATA_IN_OUT29 | MCAN10_RX | GPIO0_53 | GPMC0_AD4 | | | | MCASP0_AFSX | | |
|
||||
|P9_29B |0x00011C23C | PADCONFIG143 | V5 | TIMER_IO1 | ECAP2_IN_APWM_OUT | OBSCLK0 | | | | SPI7_D1 | GPIO1_14 | | | | | | | | BOOTMODE5
|
||||
|P9_30A |0x00011C0B4 | PADCONFIG45 | AE28 | PRG0_PRU0_GPO1 | PRG0_PRU0_GPI1 | PRG0_RGMII1_RD1 | PRG0_PWM3_B0 | RGMII3_RD1 | RMII3_RXD0 | | GPIO0_44 | | | | | MCASP0_AXR1 | | |
|
||||
|P9_30B |0x00011C238 | PADCONFIG142 | V6 | TIMER_IO0 | ECAP1_IN_APWM_OUT | SYSCLKOUT0 | | | | SPI7_D0 | GPIO1_13 | | | | | | | | BOOTMODE4
|
||||
|P9_31A |0x00011C0D4 | PADCONFIG53 | AB26 | PRG0_PRU0_GPO9 | PRG0_PRU0_GPI9 | PRG0_UART0_CTSn | PRG0_PWM3_TZ_IN | SPI3_CS1 | PRG0_IEP0_EDIO_DATA_IN_OUT28 | MCAN10_TX | GPIO0_52 | GPMC0_AD3 | | | | MCASP0_ACLKX | | UART6_TXD |
|
||||
|P9_31B |0x00011C234 | PADCONFIG141 | U3 | EXT_REFCLK1 | SYNC1_OUT | | | | | SPI7_CLK | GPIO1_12 | | | | | | | |
|
||||
|P9_33A |0x00011C0CC | PADCONFIG51 | AC28 | PRG0_PRU0_GPO7 | PRG0_PRU0_GPI7 | PRG0_IEP0_EDC_LATCH_IN1 | PRG0_PWM3_B1 | PRG0_ECAP0_SYNC_IN | | MCAN9_TX | GPIO0_50 | GPMC0_AD1 | | | | MCASP0_AXR5 | | |
|
||||
|P9_33B |0x04301C140 | WKUP_PADCONFIG80 | K24 | MCU_ADC0_AIN4 | | | | | | | | | | | | | | |
|
||||
|P9_35A |0x00011C0E0 | PADCONFIG56 | AH27 | PRG0_PRU0_GPO12 | PRG0_PRU0_GPI12 | PRG0_RGMII1_TD1 | PRG0_PWM0_A0 | RGMII3_TD1 | | | GPIO0_55 | | | DSS_FSYNC0 | | MCASP0_AXR8 | | |
|
||||
|P9_35B |0x04301C148 | WKUP_PADCONFIG82 | K29 | MCU_ADC0_AIN6 | | | | | | | | | | | | | | |
|
||||
|P9_36A |0x00011C0E4 | PADCONFIG57 | AH29 | PRG0_PRU0_GPO13 | PRG0_PRU0_GPI13 | PRG0_RGMII1_TD2 | PRG0_PWM0_B0 | RGMII3_TD2 | | | GPIO0_56 | | | DSS_FSYNC2 | | MCASP0_AXR9 | | |
|
||||
|P9_36B |0x04301C144 | WKUP_PADCONFIG81 | K27 | MCU_ADC0_AIN5 | | | | | | | | | | | | | | |
|
||||
|P9_37A |0x00011C0E8 | PADCONFIG58 | AG28 | PRG0_PRU0_GPO14 | PRG0_PRU0_GPI14 | PRG0_RGMII1_TD3 | PRG0_PWM0_A1 | RGMII3_TD3 | | | GPIO0_57 | UART4_RXD | | | | MCASP0_AXR10 | | |
|
||||
|P9_37B |0x04301C138 | WKUP_PADCONFIG78 | K28 | MCU_ADC0_AIN2 | | | | | | | | | | | | | | |
|
||||
|P9_38A |0x00011C0EC | PADCONFIG59 | AG27 | PRG0_PRU0_GPO15 | PRG0_PRU0_GPI15 | PRG0_RGMII1_TX_CTL | PRG0_PWM0_B1 | RGMII3_TX_CTL | | | GPIO0_58 | UART4_TXD | | DSS_FSYNC3 | | MCASP0_AXR11 | | |
|
||||
|P9_38B |0x04301C13C | WKUP_PADCONFIG79 | L28 | MCU_ADC0_AIN3 | | | | | | | | | | | | | | |
|
||||
|P9_39A |0x04301C130 | WKUP_PADCONFIG76 | K25 | MCU_ADC0_AIN0 | | | | | | | | | | | | | | |
|
||||
|P9_39B |0x00011C0DC | PADCONFIG55 | AJ28 | PRG0_PRU0_GPO11 | PRG0_PRU0_GPI11 | PRG0_RGMII1_TD0 | PRG0_PWM3_TZ_OUT | RGMII3_TD0 | | | GPIO0_54 | | CLKOUT | | | MCASP0_AXR7 | | |
|
||||
|P9_40A |0x00011C148 | PADCONFIG82 | AA26 | PRG0_PRU1_GPO18 | PRG0_PRU1_GPI18 | PRG0_IEP1_EDC_LATCH_IN0 | PRG0_PWM1_TZ_IN | SPI3_D0 | | MCAN12_TX | GPIO0_81 | GPMC0_AD14 | | | | MCASP2_AFSX | | UART2_RXD |
|
||||
|P9_40B |0x04301C134 | WKUP_PADCONFIG77 | K26 | MCU_ADC0_AIN1 | | | | | | | | | | | | | | |
|
||||
|P9_41 |0x00011C204 | PADCONFIG129 | AD5 | UART1_RTSn | MCAN3_TX | | | SPI2_D1 | EQEP0_I | | GPIO1_0 | | | | | | | |
|
||||
|P9_42A |0x00011C1F0 | PADCONFIG124 | AC2 | UART0_CTSn | TIMER_IO6 | SPI0_CS2 | MCAN2_RX | SPI2_CS0 | EQEP0_A | | GPIO0_123 | | | | | | | |
|
||||
|P9_42B |0x00011C04C | PADCONFIG19 | AJ21 | PRG1_PRU0_GPO17 | PRG1_PRU0_GPI17 | PRG1_IEP0_EDC_SYNC_OUT1 | PRG1_PWM0_B2 | | RMII5_TXD1 | MCAN5_TX | GPIO0_18 | | | | VPFE0_DATA6 | MCASP3_AXR3 | | | |
|
||||
|=======
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
[[power-jack]]
|
||||
=== Power Jack
|
||||
|
||||
The DC power jack is located next to the RJ45 Ethernet connector as
|
||||
shown in <<figure-51>>. This uses the same power connector as is used on
|
||||
the BeagleBone Black. The connector has a 2.1mm diameter center post
|
||||
(5VDC) and a 5.5mm diameter outer dimension on the barrel (GND).
|
||||
|
||||
[[figure-51,Figure 51]]
|
||||
.Figure 51. 5VDC Power Jack
|
||||
image:media/image69.jpg[media/image69.jpg,title="media/image69.jpg",width=579,height=411]
|
||||
|
||||
The board requires a regulated 5VDC +/-.25V supply at 1A. A higher
|
||||
current rating may be needed if capes are plugged into the expansion
|
||||
headers. Using a higher current power supply will not damage the board.
|
||||
|
||||
[[usb-client]]
|
||||
=== USB Client
|
||||
|
||||
The USB Client connector is accessible on the bottom side of the board
|
||||
under the row of four LEDs as shown in <<figure-52>>. It uses a 5 pin
|
||||
miniUSB cable, the same as is used on the BeagleBone Black. The cable
|
||||
is provided with the board. The cable can also be used to power the
|
||||
board.
|
||||
|
||||
[[figure-52,Figure 52]]
|
||||
.Figure 52. USB Client
|
||||
image:media/image71.jpg[media/image71.jpg,title="media/image71.jpg",width=633,height=454]
|
||||
|
||||
This port is a USB Client only interface and is intended for connection
|
||||
to a PC.
|
||||
|
||||
[[usb-host-1]]
|
||||
=== USB Host
|
||||
|
||||
There is a single USB Host connector on the board and is shown in
|
||||
*Figure 53* below.
|
||||
|
||||
image:media/image71.jpg[media/image71.jpg,title="media/image71.jpg",width=593,height=387]
|
||||
|
||||
[[figure-53.-usb-host-connector]]
|
||||
Figure 53. USB Host Connector
|
||||
|
||||
The port is USB 2.0 HS compatible and can supply up to 500mA of current.
|
||||
If more current or ports is needed, then a HUB can be used.
|
||||
|
||||
[[serial-header]]
|
||||
=== Serial Header
|
||||
|
||||
Each board has a debug serial interface that can be accessed by using a
|
||||
special serial cable that is plugged into the serial header as shown in
|
||||
*Figure 54* below.
|
||||
|
||||
image:media/image71.jpg[media/image71.jpg,title="media/image71.jpg",width=527,height=351]
|
||||
|
||||
[[figure-54.-serial-debug-header]]
|
||||
Figure 54. Serial Debug Header
|
||||
|
||||
Two signals are provided, TX and RX on this connector. The levels on
|
||||
these signals are 3.3V. In order to access these signals, a FTDI USB to
|
||||
Serial cable is recommended as shown in *Figure 55* below.
|
||||
|
||||
image:media/image73.jpg[media/image73.jpg,title="media/image73.jpg",width=428,height=162]
|
||||
|
||||
The cable can be purchased from several different places and must be the
|
||||
3.3V version TTL-232R-3V3. Information on the cable itself can be found
|
||||
direct from FTDI at:
|
||||
|
||||
http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL-232R_CABLES.pdf[_http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL232R_CABLES.pdf_]
|
||||
|
||||
Pin 1 of the cable is the ai-64 wire. That must align with the pin 1 on
|
||||
the board which is designated by the white dot next to the connector on
|
||||
the board.
|
||||
|
||||
Refer to the support WIKI
|
||||
http://elinux.org/BeagleBoneBlack[_http://elinux.org/BeagleBoneBlack_]
|
||||
for more sources of this cable and other options that will work.
|
||||
|
||||
Table is the pinout of the connector as reflected in the schematic. It
|
||||
is the same as the
|
||||
|
||||
FTDI cable which can be found at
|
||||
|
||||
http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL-232R_CABLES.pdf[_http://www.ftdichip.com/Support/Documents/DataSheets/Cables/DS_TTL-232R_CABLES.pdf_]
|
||||
|
||||
with the exception that only three pins are used on the board. The pin
|
||||
numbers are defined in *Table 14*. The signals are from the perspective
|
||||
of the board.
|
||||
|
||||
[[table-14.-j1-serial-header-pins]]
|
||||
Table 14. J1 Serial Header Pins
|
||||
|
||||
[cols=",",options="header",]
|
||||
|==================
|
||||
|PIN NUMBER |SIGNAL
|
||||
|*1* |Ground
|
||||
|*4* |Receive
|
||||
|*5* |Transmit
|
||||
|==================
|
||||
|
||||
*Figure 56* shows the pin location on the board.
|
||||
|
||||
image:media/image75.jpg[media/image75.jpg,title="media/image75.jpg",width=373,height=374]
|
||||
|
||||
*Figure 56. Serial Header*
|
||||
|
||||
[[hdmi]]
|
||||
=== HDMI
|
||||
|
||||
Access to the HDMI interface is through the HDMI connector that is
|
||||
located on the bottom side of the board as shown in *Figure 57* below.
|
||||
|
||||
image:media/image71.jpg[media/image71.jpg,title="media/image71.jpg",width=579,height=387]
|
||||
|
||||
[[figure-57.-hdmi-connector]]
|
||||
Figure 57. HDMI Connector
|
||||
|
||||
The connector is microHDMI connector. This was done due to the space
|
||||
limitations we had in finding a place to fit the connector. It requires
|
||||
a microHDMI to HDMI cable as shown in *Figure 58* below. The cable can
|
||||
be purchased from several different sources.
|
||||
|
||||
image:media/image77.jpg[media/image77.jpg,title="media/image77.jpg",width=196,height=196]
|
||||
|
||||
*Figure 58. HDMI Cable*
|
||||
|
||||
[[microsd]]
|
||||
=== microSD
|
||||
|
||||
A microSD connector is located on the back or bottom side of the board
|
||||
as shown in *Figure 59* below. The microSD card is not supplied with the
|
||||
board.
|
||||
|
||||
image:media/image71.jpg[media/image71.jpg,title="media/image71.jpg",width=579,height=438]
|
||||
|
||||
[[figure-59.-microsd-connector]]
|
||||
Figure 59. microSD Connector
|
||||
|
||||
When plugging in the SD card, the writing on the card should be up.
|
||||
Align the card with the connector and push to insert. Then release.
|
||||
There should be a click and the card will start to eject slightly, but
|
||||
it then should latch into the connector. To eject the card, push the SD
|
||||
card in and then remove your finger. The SD card will be ejected from
|
||||
the connector.
|
||||
|
||||
Do not pull the SD card out or you could damage the connector.
|
||||
|
||||
[[ethernet-1]]
|
||||
=== Ethernet
|
||||
|
||||
The board comes with a single 10/100 Ethernet interface located next to
|
||||
the power jack as shown in *Figure 60*.
|
||||
|
||||
image:media/image71.jpg[media/image71.jpg,title="media/image71.jpg",width=579,height=387]
|
||||
|
||||
*Figure 60. Ethernet Connector*
|
||||
|
||||
The PHY supports AutoMDX which means either a straight or a swap cable
|
||||
can be used
|
||||
|
||||
[[jtag-connector]]
|
||||
=== JTAG Connector
|
||||
|
||||
A place for an optional 20 pin CTI JTAG header is provided on the board
|
||||
to facilitate the SW development and debugging of the board by using
|
||||
various JTAG emulators. This header is not supplied standard on the
|
||||
board. To use this, a connector will need to be soldered onto the board.
|
||||
|
||||
If you need the JTAG connector you can solder it on yourself. No other
|
||||
components are needed. The connector is made by Samtec and the part
|
||||
number is FTR-110-03-G-D-06. You can purchase it from
|
||||
http://www.digikey.com/[_www.digikey.com_.]
|
||||
592
doc/SRM/chapter-08.adoc
Executable file
592
doc/SRM/chapter-08.adoc
Executable file
@ -0,0 +1,592 @@
|
||||
[[cape-board-support-1]]
|
||||
== Cape Board Support
|
||||
|
||||
*BeagleBone AI-64* has the ability to accept up to
|
||||
four EEPROM addressable expansion boards or capes stacked onto
|
||||
the expansion headers. The word cape comes from the shape of the
|
||||
expansion board for BeagleBone boards as it is fitted around the
|
||||
Ethernet connector on the main board. For BeagleBone this notch acts as a
|
||||
key to ensure proper orientation of the cape. On AI-64 you can see a clear
|
||||
silkscreen marking for the cape orientation. Most of BeagleBone capes
|
||||
can be used with your BeagleBone AI-64 also like shown in <<bbai-cape-placement-figure>> below.
|
||||
|
||||
[[bbai-cape-placement-figure, BeagleBone Ai Cape Placement figure]]
|
||||
image::images/ch08/cape-placement.jpg[title="BeagleBone cape placement"]
|
||||
|
||||
This section describes the rules & guidelines for creating capes to ensure proper
|
||||
operation with BeagleBone AI-64 and proper interoperability with
|
||||
other capes that are intended to coexist with each other. Co-existence
|
||||
is not a requirement and is in itself, something that is impossible to
|
||||
control or administer. But, people will be able to create capes that
|
||||
operate with other capes that are already available based on public
|
||||
information as it pertains to what pins and features each cape uses.
|
||||
This information will be able to be read from the EEPROM on each cape.
|
||||
|
||||
For those wanting to create their own capes this should not put limits on the creation of
|
||||
capes and what they can do, but may set a few basic rules that will allow
|
||||
the software to administer their operation with BeagleBone AI-64. For this
|
||||
reason there is a lot of flexibility in the specification that we hope
|
||||
most people will find it liberating in the spirit of Open Source
|
||||
Hardware. On the other hand we are sure that there are others who would like to see tighter
|
||||
control, more details, more rules and much more order to the way capes
|
||||
are handled.
|
||||
|
||||
Over time, this specification will change and be updated, so please
|
||||
refer to the https://git.beagleboard.org/beagleboard/beaglebone-ai-64/[latest version of this manual]
|
||||
prior to designing your own capes to get the latest information.
|
||||
|
||||
|
||||
[WARNING]
|
||||
Do not apply voltage to any I/O pin when power is not supplied to the board.
|
||||
It will damage the processor and void the warranty.
|
||||
|
||||
[[beaglebone-ai-64-cape-compatibility]]
|
||||
=== BeagleBone AI-64 Cape Compatibility
|
||||
|
||||
The expansion headers on BeagleBone Black and BeagleBone AI-64 provides
|
||||
similar pin configuration options on P8 and P9 expansion header pins thus provide
|
||||
cape compatibility to a certain extent. Which means most BeagleBone Black capes
|
||||
will also be compatible with BeeagleBone AI-64.
|
||||
|
||||
[IMPORTANT]
|
||||
This section is still being worked on, please make sure you have the
|
||||
latest system reference manual (SRM).
|
||||
|
||||
#TODO: Add BeagleBone AI-64 LCD pins information#
|
||||
|
||||
#TODO: Add BeagleBone AI-64 eMMC pins information#
|
||||
|
||||
[[eeprom]]
|
||||
=== EEPROM
|
||||
|
||||
Each cape must have its own EEPROM containing information that will
|
||||
allow the software to identify the board and to configure the expansion
|
||||
headers pins during boot as needed. The one exception is proto boards intended for
|
||||
prototyping. They may or may not have an EEPROM on them. An EEPROM is
|
||||
required for all capes sold in order for them operate correctly when
|
||||
plugged into BeagleBone AI-64.
|
||||
|
||||
The address of the EEPROM will be set via either jumpers or a dipswitch
|
||||
on each expansion board. <<expansion-board-eeprom-without-write-protect-figure>>
|
||||
below is the design of the EEPROM circuit.
|
||||
|
||||
[[expansion-board-eeprom-without-write-protect-figure, Expansion board EEPROM without write protect figure]]
|
||||
image::images/ch08/eeprom.png[title="Expansion board EEPROM without write protect"]
|
||||
|
||||
|
||||
The addressing of this device requires two bytes for the address which
|
||||
is not used on smaller size EEPROMs, which only require only one byte.
|
||||
Other compatible devices may be used as well. Make sure the device you
|
||||
select supports 16 bit addressing. The part package used is at the
|
||||
discretion of the cape designer.
|
||||
|
||||
[[eeprom-address]]
|
||||
==== EEPROM Address
|
||||
|
||||
In order for each cape to have a unique address, a board ID scheme is
|
||||
used that sets the address to be different depending on the setting of
|
||||
the dipswitch or jumpers on the capes. A two position dipswitch or
|
||||
jumpers is used to set the address pins of the EEPROM.
|
||||
|
||||
It is the responsibility of the user to set the proper address for each
|
||||
board and the position in the stack that the board occupies has nothing
|
||||
to do with which board gets first choice on the usage of the expansion
|
||||
bus signals. The process for making that determination and resolving
|
||||
conflicts is left up to the SW and, as of this moment in time, this
|
||||
method is a something of a mystery due to the new Device Tree
|
||||
methodology introduced in the 3.8 kernel.
|
||||
|
||||
Address line A2 is always tied high. This sets the allowable address
|
||||
range for the expansion cards to *0x54* to**0x57**. All other I2C
|
||||
addresses can be used by the user in the design of their capes. But,
|
||||
these addresses must not be used other than for the board EEPROM
|
||||
information. This also allows for the inclusion of EEPROM devices on the
|
||||
cape if needed without interfering with this EEPROM. It requires that A2
|
||||
be grounded on the EEPROM not used for cape identification.
|
||||
|
||||
[[i2c-bus]]
|
||||
==== I2C Bus
|
||||
|
||||
The EEPROMs on each expansion board are connected to I2C2 on connector
|
||||
P9 pins 19 and 20. For this reason I2C2 must always be left connected
|
||||
and should not be changed by SW to remove it from the expansion header
|
||||
pin mux settings. If this is done, the system will be unable to detect
|
||||
the capes.
|
||||
|
||||
The I2C signals require pullup resistors. Each board must have a 5.6K
|
||||
resistor on these signals. With four capes installed this will result in
|
||||
an effective resistance of 1.4K if all capes were installed and all the
|
||||
resistors used were exactly 5.6K. As more capes are added the resistance
|
||||
is reduced to overcome capacitance added to the signals. When no capes
|
||||
are installed the internal pullup resistors must be activated inside the
|
||||
processor to prevent I2C timeouts on the I2C bus.
|
||||
|
||||
The I2C2 bus may also be used by capes for other functions such as I/O
|
||||
expansion or other I2C compatible devices that do not share the same
|
||||
address as the cape EEPROM.
|
||||
|
||||
[[eeprom-write-protect]]
|
||||
==== EEPROM Write Protect
|
||||
|
||||
The design in <<expansion-board-eeprom-with-write-protect-figure>>
|
||||
has the write protect disabled. If the write
|
||||
protect is not enabled, this does expose the EEPROM to being corrupted
|
||||
if the I2C2 bus is used on the cape and the wrong address written to. It
|
||||
is recommended that a write protection function be implemented and a
|
||||
Test Point be added that when grounded, will allow the EEPROM to be
|
||||
written to. To enable write operation, Pin 7 of the EEPROM must be tied
|
||||
to ground.
|
||||
|
||||
When not grounded, the pin is HI via pullup resistor R210 and therefore
|
||||
write protected. Whether or not Write Protect is provided is at the
|
||||
discretion of the cape designer.
|
||||
|
||||
*Variable & MAC Memory*
|
||||
|
||||
VSYS_IO_3V3
|
||||
|
||||
[[expansion-board-eeprom-with-write-protect-figure, Expansion board EEPROM with write protect figure]]
|
||||
image::images/ch08/eeprom-write-protect.png[title="Expansion board EEPROM with write protect"]
|
||||
|
||||
|
||||
[[eeprom-data-format]]
|
||||
==== EEPROM Data Format
|
||||
|
||||
<<expansion-board-eeprom-table>>
|
||||
shows the format of the contents of the expansion board
|
||||
EEPROM. Data is stored in Big Endian with the least significant value on
|
||||
the right. All addresses read as a single byte data from the EEPROM, but
|
||||
two byte addressing is used. ASCII values are intended to be easily read
|
||||
by the user when the EEPROM contents are dumped.
|
||||
|
||||
#Clean/Update table#
|
||||
|
||||
[[expansion-board-eeprom-table, Expansion Board EEPROM table]]
|
||||
[cols=",,,",options="header",]
|
||||
|=======================================================================
|
||||
|*Name* |*Offset* |*Size (bytes)* |*Contents*
|
||||
|*Header* |*0* |*4* |*0xAA, 0x55, 0x33, 0xEE*
|
||||
|
||||
|*EEPROM Revision* |*4* |*2* |*Revision number of the overall format of
|
||||
this EEPROM in ASCII =A1*
|
||||
|
||||
|*Board Name* |*6* |*32* |*Name of board in ASCII so user can read it
|
||||
when the EEPROM is dumped. Up to developer of the board as to what they
|
||||
call the board..*
|
||||
|
||||
|*Version* |*38* |*4* |*Hardware version code for board in ASCII.
|
||||
Version format is up to the developer.* *i.e. 02.1…00A1....10A0*
|
||||
|
||||
|*Manufacturer* |*42* |*16* |*ASCII name of the manufacturer. Company or
|
||||
individual’s name.*
|
||||
|
||||
|*Part Number* |*58* |*16* |*ASCII Characters for the part number. Up to
|
||||
maker of the board.*
|
||||
|
||||
|*Number of Pins* |*74* |*2* |*Number of pins used by the daughter board
|
||||
including the power pins used. Decimal value of total pins 92 max,
|
||||
stored in HEX.*
|
||||
|
||||
|*Serial Number* |*76* |*12* |*Serial number of the board. This is a 12
|
||||
character string which is:* +
|
||||
*WWYY&&&&nnnn* +
|
||||
*where: WW = 2 digit week of the year of production* +
|
||||
*YY = 2 digit year of production* +
|
||||
*&&&&=Assembly code to let the manufacturer document the assembly number
|
||||
or product. A way to quickly tell from reading the serial number what
|
||||
the board is. Up to the developer to determine.* *nnnn = incrementing
|
||||
board number for that week of production*
|
||||
|
||||
|*Pin Usage* |*88* |*148* |**Two bytes** *for each configurable pins of
|
||||
the 74 pins on the expansion* +
|
||||
*connectors* **MSB LSB** +
|
||||
*Bit order: 15..14 ..... 1..0* +
|
||||
*Bit 15....Pin is used or not...0=Unused by cape 1=Used by cape* +
|
||||
*Bit 14-13...Pin Direction.....1 0=Output 01=Input 11=BDIR* +
|
||||
*Bits 12-7...Reserved........should be all zeros* +
|
||||
*Bit 6....Slew Rate .......0=Fast 1=Slow* +
|
||||
*Bit 5....Rx Enable.......0=Disabled 1=Enabled* +
|
||||
*Bit 4....Pull Up/Dn Select....0=Pulldown 1=PullUp* +
|
||||
*Bit 3....Pull Up/DN enabled...0=Enabled 1=Disabled* +
|
||||
*Bits 2-0 ...Mux Mode Selection...Mode 0-7*
|
||||
|
||||
|*VSYS_IO_3V3 Current* |*236* |*2* |*Maximum current in milliamps. This is
|
||||
HEX value of the current in decimal* +
|
||||
*1500mA=0x05 0xDC 325mA=0x01 0x45*
|
||||
|
||||
|*DC_VDD_5V Current* |*238* |*2* |*Maximum current in milliamps. This is
|
||||
HEX value of the current in decimal* +
|
||||
*1500mA=0x05 0xDC 325mA=0x01 0x45*
|
||||
|
||||
|*VSYS_5V0 Current* |*240* |*2* |*Maximum current in milliamps. This is
|
||||
HEX value of the current in decimal* +
|
||||
*1500mA=0x05 0xDC 325mA=0x01 0x45*
|
||||
|
||||
|*DC Supplied* |*242* |*2* |*Indicates whether or not the board is
|
||||
supplying voltage on the DC_VDD_5V rail and the current rating 000=No
|
||||
1-0xFFFF is the current supplied storing the decimal* +
|
||||
*equivalent in HEX format*
|
||||
|
||||
|*Available* |*244* |*32543* |*Available space for other non-volatile
|
||||
codes/data to be used as needed by the manufacturer or SW driver. Could
|
||||
also store presets for use by SW.*
|
||||
|=======================================================================
|
||||
|
||||
[[pin-usage]]
|
||||
==== Pin Usage
|
||||
|
||||
<<eeprom-pin-usage-table>> shows the locations in the EEPROM to set the I/O pin usage for
|
||||
the cape. It contains the value to be written to the Pad Control
|
||||
Registers. Details on this can be found in section *9.2.2* of the
|
||||
*TDA4VM Technical Reference Manual*, The table is left blank as a
|
||||
convenience and can be printed out and used as a template for creating a
|
||||
custom setting for each cape. The 16 bit integers and all 16 bit fields
|
||||
are to be stored in Big Endian format.
|
||||
|
||||
*Bit 15 PIN USAGE* is an indicator and should be a 1 if the pin is
|
||||
used or 0 if it is unused.
|
||||
|
||||
*Bits 14-7 RESERVED* is not to be used and left as 0.
|
||||
|
||||
*Bit 6 SLEW CONTROL* 0=Fast 1=Slow
|
||||
|
||||
*Bit 5 RX Enabled* 0=Disabled 1=Enabled
|
||||
|
||||
*Bit 4 PU/PD* 0=Pulldown 1=Pullup.
|
||||
|
||||
*Bit 3 PULLUP/DN* 0=Pullup/pulldown enabled
|
||||
|
||||
1= Pullup/pulldown disabled
|
||||
|
||||
*Bit 2-0 MUX MODE SELECT* Mode 0-7. (refer to TRM)
|
||||
|
||||
Refer to the TRM for proper settings of the pin MUX mode based on the
|
||||
signal selection to be used.
|
||||
|
||||
The *AIN0-6* pins do not have a pin mux setting, but they need to be set
|
||||
to indicate if each of the pins is used on the cape. Only bit 15 is used
|
||||
for the AIN signals.
|
||||
|
||||
#Add tables#
|
||||
|
||||
[[eeprom-pin-usage-table, EEPROM Pin Usage table]]
|
||||
|
||||
[[p8-header-pins-table, P8 header pins table]]
|
||||
|
||||
[[p9-header-pins-table, P9 header pins table]]
|
||||
|
||||
[[pin-usage-consideration]]
|
||||
=== Pin Usage Consideration
|
||||
|
||||
This section covers things to watch for when hooking up to certain pins
|
||||
on the expansion headers.
|
||||
|
||||
[[expansion-connectors-1]]
|
||||
=== Expansion Connectors
|
||||
|
||||
A combination of male and female headers is used for access to the
|
||||
expansion headers on the main board. There are three possible mounting
|
||||
configurations for the expansion headers:
|
||||
|
||||
* _Single_-no board stacking but can be used on the top of the stack.
|
||||
* _Stacking_-up to four boards can be stacked on top of each other.
|
||||
* _Stacking with signal stealing_-up to three boards can be stacked on
|
||||
top of each other, but certain boards will not pass on the signals they
|
||||
are using to prevent signal loading or use by other cards in the stack.
|
||||
|
||||
The following sections describe how the connectors are to be implemented
|
||||
and used for each of the different configurations.
|
||||
|
||||
[[non-stacking-headers-single-cape]]
|
||||
==== Non-Stacking Headers-Single Cape
|
||||
|
||||
For non-stacking capes single configurations or where the cape can be
|
||||
the last board on the stack, the two 46 pin expansion headers use the
|
||||
same connectors. <<single-expansion-connector-figure>> is a picture of
|
||||
the connector. These are dual row 23 position 2.54mm x 2.54mm connectors.
|
||||
|
||||
[[single-expansion-connector-figure,Single expansion connector figure]]
|
||||
image::images/ch08/single-expansion-connector.jpg[title="Single expansion connector"]
|
||||
|
||||
The connector is typically mounted on the bottom side of the board as
|
||||
shown in <<single-cape-expansion-connector-figure>>. These are very common connectors and should be
|
||||
easily located. You can also use two single row 23 pin headers for each
|
||||
of the dual row headers.
|
||||
|
||||
image::images/ch08/proto.jpg[title="Single cape expansion connector on BeagleBone Proto Cape with EEPROM from onlogic"]
|
||||
|
||||
[[single-cape-expansion-connector-figure, Single cape expansion connector figure]]
|
||||
|
||||
|
||||
It is allowed to only populate the pins you need. As this is a
|
||||
non-stacking configuration, there is no need for all headers to be
|
||||
populated. This can also reduce the overall cost of the cape. This
|
||||
decision is up to the cape designer.
|
||||
|
||||
For convenience listed in <<single-cape-connectors-figure>> are some possible
|
||||
choices for part numbers on this connector. They have varying pin lengths and
|
||||
some may be more suitable than others for your use. It should be noted, that the
|
||||
longer the pin and the further it is inserted into BeagleBone AI-64
|
||||
connector, the harder it will be to remove due to the tension on 92
|
||||
pins. This can be minimized by using shorter pins or removing those pins
|
||||
that are not used by your particular design. The first item in**Table
|
||||
18** is on the edge and may not be the best solution. Overhang is the
|
||||
amount of the pin that goes past the contact point of the connector on
|
||||
BeagleBone AI-64
|
||||
|
||||
.
|
||||
|
||||
[[single-cape-connectors-figure, Single Cape Connectors]]
|
||||
[cols=",,,",options="header",]
|
||||
|=======================================================================
|
||||
|*SUPPLIER* |*PARTNUMBER* |*TAIL LENGTH(in)* |*OVERHANG(in)*
|
||||
|http://www.mlelectronics.com/[_Major League_] |TSHC-123-D-03-145-G-LF
|
||||
|.145 |.004
|
||||
|
||||
|http://www.mlelectronics.com/[_Major League_] |TSHC-123-D-03-240-G-LF
|
||||
|.240 |.099
|
||||
|
||||
|http://www.mlelectronics.com/[_Major League_] |TSHC-123-D-03-255-G-LF
|
||||
|.255 |.114
|
||||
|=======================================================================
|
||||
|
||||
The G in the part number is a plating option. Other options may be used
|
||||
as well as long as the contact area is gold. Other possible sources are
|
||||
Sullins and Samtec for these connectors. You will need to ensure the
|
||||
depth into the connector is sufficient
|
||||
|
||||
[[main-expansion-headers-stacking]]
|
||||
==== Main Expansion Headers-Stacking
|
||||
|
||||
For stacking configuration, the two 46 pin expansion headers use the
|
||||
same connectors. <<expansion-connector-figure>> is a picture of the
|
||||
connector. These are dual row 23 position 2.54mm x 2.54mm connectors.
|
||||
|
||||
[[expansion-connector-figure, Expansion connector figure]]
|
||||
image::images/ch08/expansion-connector.jpg[title="Expansion Connector"]
|
||||
|
||||
The connector is mounted on the top side of the board with longer tails
|
||||
to allow insertion into BeagleBone AI-64.
|
||||
<<stacked-cape-expansion-connector-figure>> is the
|
||||
connector configuration for the connector.
|
||||
|
||||
[[stacked-cape-expansion-connector-figure, Stacked cape expansion connector figure]]
|
||||
image::images/ch08/can-cape.jpg["Stacked cape expansion connector"]
|
||||
|
||||
|
||||
|
||||
For convenience listed in *Table 18* are some possible choices for part
|
||||
numbers on this connector. They have varying pin lengths and some may be
|
||||
more suitable than others for your use. It should be noted, that the
|
||||
longer the pin and the further it is inserted into BeagleBone AI-64
|
||||
connector, the harder it will be to remove due to the tension on 92
|
||||
pins. This can be minimized by using shorter pins. There are most likely
|
||||
other suppliers out there that will work for this connector as well. If
|
||||
anyone finds other suppliers of compatible connectors that work, let us
|
||||
know and they will be added to this document. The first item in**Table
|
||||
19** is on the edge and may not be the best solution. Overhang is the
|
||||
amount of the pin that goes past the contact point of the connector on
|
||||
BeagleBone AI-64.
|
||||
|
||||
The third part listed in <<stacked-cape-connectors-figure>> will have
|
||||
insertion force issues.
|
||||
|
||||
[[stacked-cape-connectors-figure, Stacked cape connectors figure]]
|
||||
[cols=",,,",options="header",]
|
||||
|=======================================================================
|
||||
|*SUPPLIER* |*PARTNUMBER* |*TAIL LENGTH(in)* |*OVERHANG(in)*
|
||||
|http://www.mlelectronics.com/[_Major League_] |SSHQ-123-D-06-G-LF |.190
|
||||
|0.049
|
||||
|
||||
|http://www.mlelectronics.com/[_Major League_] |SSHQ-123-D-08-G-LF |.390
|
||||
|0.249
|
||||
|
||||
|http://www.mlelectronics.com/[_Major League_] |SSHQ-123-D-10-G-LF |.560
|
||||
|0.419
|
||||
|=======================================================================
|
||||
|
||||
There are also different plating options on each of the connectors
|
||||
above. Gold plating on the contacts is the minimum requirement. If you
|
||||
choose to use a different part number for plating or availability
|
||||
purposes, make sure you do not select the “LT” option.
|
||||
|
||||
Other possible sources are Sullins and Samtec but make sure you select
|
||||
one that has the correct mating depth.
|
||||
|
||||
[[stacked-capes-wsignal-stealing]]
|
||||
==== Stacked Capes w/Signal Stealing
|
||||
|
||||
<<stacked-with-signal-stealing-expansion-connector-figure>> is the connector configuration for stackable capes that does
|
||||
not provide all of the signals upwards for use by other boards. This is
|
||||
useful if there is an expectation that other boards could interfere with
|
||||
the operation of your board by exposing those signals for expansion.
|
||||
This configuration consists of a combination of the stacking and
|
||||
nonstacking style connectors.
|
||||
|
||||
image::images/ch08/stealing-expansion-connector.jpg[title="Stacked with signal stealing expansion connector figure"]
|
||||
|
||||
[[stacked-with-signal-stealing-expansion-connector-figure, Stacked with signal stealing expansion connector figure]]
|
||||
|
||||
[[retention-force]]
|
||||
==== Retention Force
|
||||
|
||||
The length of the pins on the expansion header has a direct relationship
|
||||
to the amount of force that is used to remove a cape from BeagleBone
|
||||
AI-64. The longer the pins extend into the connector the harder it is to
|
||||
remove. There is no rule that says that if longer pins are used, that
|
||||
the connector pins have to extend all the way into the mating connector
|
||||
on BeagleBone AI-64, but this is controlled by the user and
|
||||
therefore is hard to control. We have also found that if you use gold
|
||||
pins, while more expensive, it makes for a smoother finish which reduces
|
||||
the friction.
|
||||
|
||||
This section will attempt to describe the tradeoffs and things to
|
||||
consider when selecting a connector and its pin length.
|
||||
|
||||
[[beaglebone-ai-64-female-connectors]]
|
||||
==== BeagleBone AI-64 Female Connectors
|
||||
|
||||
<<connector-pin-insertion-depth>> shows the key measurements used in calculating how much the
|
||||
pin extends past the contact point on the connector, what we call
|
||||
overhang.
|
||||
|
||||
[[connector-pin-insertion-depth, Connector pin insertion depth figure]]
|
||||
image::images/ch08/berg-stip-insertion.jpg[title="Connector Pin Insertion Depth"]
|
||||
|
||||
To calculate the amount of the pin that extends past the Point of
|
||||
Contact, use the following formula:
|
||||
|
||||
Overhang=Total Pin Length- PCB thickness (.062) - contact point (.079)
|
||||
|
||||
The longer the pin extends past the contact point, the more force it
|
||||
will take to insert and remove the board. Removal is a greater issue
|
||||
than the insertion.
|
||||
|
||||
[[signal-usage]]
|
||||
=== Signal Usage
|
||||
|
||||
Based on the pin muxing capabilities of the processor, each expansion
|
||||
pin can be configured for different functions. When in the stacking
|
||||
mode, it will be up to the user to ensure that any conflicts are
|
||||
resolved between multiple stacked cards. When stacked, the first card
|
||||
detected will be used to set the pin muxing of each pin. This will
|
||||
prevent other modes from being supported on stacked cards and may result
|
||||
in them being inoperative.
|
||||
|
||||
In <<section-7-1>> of this document, the functions of the pins are defined
|
||||
as well as the pin muxing options. Refer to this section for more
|
||||
information on what each pin is. To simplify things, if you use the
|
||||
default name as the function for each pin and use those functions, it
|
||||
will simplify board design and reduce conflicts with other boards.
|
||||
|
||||
Interoperability is up to the board suppliers and the user. This
|
||||
specification does not specify a fixed function on any pin and any pin
|
||||
can be used to the full extent of the functionality of that pin as
|
||||
enabled by the processor.
|
||||
|
||||
*DO NOT APPLY VOLTAGE TO ANY I/O PIN WHEN POWER IS NOT SUPPLIED TO THE
|
||||
BOARD. IT WILL DAMAGE THE PROCESSOR AND VOID THE WARRANTY.*
|
||||
|
||||
*NO PINS ARE TO BE DRIVEN UNTIL AFTER THE SYS_RESET LINE GOES HIGH.*
|
||||
|
||||
[[cape-power]]
|
||||
=== Cape Power
|
||||
|
||||
This section describes the power rails for the capes and their usage.
|
||||
|
||||
[[main-board-power]]
|
||||
==== Main Board Power
|
||||
|
||||
The <<expansion-header-voltages-table>> describes the voltages from the
|
||||
main board that are available on the expansion connectors and their ratings.
|
||||
All voltages are supplied by connector**P9**. The current ratings listed are per pin.
|
||||
|
||||
[[expansion-header-voltages-table, Expansion header voltages figure]]
|
||||
[cols=",,,,,",options="header",]
|
||||
|============================================
|
||||
|*Current* |*Name* |*P9* |*P9* |*Name* |*Current*
|
||||
|250mA |VSYS_IO_3V3 |3 |4 |VSYS_IO_3V3 |250mA
|
||||
|1000mA |DC_VDD_5V |5 |6 |DC_VDD_5V |1000mA
|
||||
|250mA |VSYS_5V0 |7 |8 |VSYS_5V0 |250mA
|
||||
|============================================
|
||||
|
||||
The *VSYS_IO_3V3* rail is supplied by the LDO on BeagleBone AI-64 and
|
||||
is the primary power rail for expansion boards. If the power requirement
|
||||
for the capes exceeds the current rating, then locally generated voltage
|
||||
rail can be used. It is recommended that this rail be used to power any
|
||||
buffers or level translators that may be used.
|
||||
|
||||
*DC_VDD_5V* is the main power supply from the DC input jack. This voltage
|
||||
is not present when the board is powered via USB. The amount of current
|
||||
supplied by this rail is dependent upon the amount of current available.
|
||||
Based on the board design, this rail is limited to 1A per pin from the
|
||||
main board.
|
||||
|
||||
The *VSYS_5V0* rail is the main rail for the regulators on the main board.
|
||||
When powered from a DC supply or USB, this rail will be 5V. The
|
||||
available current from this rail depends on the current available from
|
||||
the USB and DC external supplies.
|
||||
|
||||
[[expansion-board-external-power]]
|
||||
==== Expansion Board External Power
|
||||
|
||||
A cape can have a jack or terminals to bring in whatever voltages may be
|
||||
needed by that board. Care should be taken not to let this voltage be
|
||||
fed back into any of the expansion header pins.
|
||||
|
||||
It is possible to provide 5V to the main board from an expansion board.
|
||||
By supplying a 5V signal into the *DC_VDD_5V* rail, the main board can be
|
||||
supplied. This voltage must not exceed 5V. You should not supply any
|
||||
voltage into any other pin of the expansion connectors. Based on the
|
||||
board design, this rail is limited to 1A per pin to BeagleBone
|
||||
AI-64.
|
||||
|
||||
*There are several precautions that need to be taken when working with
|
||||
the expansion headers to prevent damage to the board.*
|
||||
|
||||
1. *Do not apply any voltages to any I/O pins when the board is not
|
||||
powered on.*
|
||||
2. *Do not drive any external signals into the I/O pins until after the
|
||||
VSYS_IO_3V3 rail is up.*
|
||||
3. *Do not apply any voltages that are generated from external
|
||||
sources.*
|
||||
4. *If voltages are generated from the DC_VDD_5V signal, those supplies
|
||||
must not become active until after the VSYS_IO_3V3 rail is up.*
|
||||
5. *If you are applying signals from other boards into the expansion
|
||||
headers, make sure you power the board up after you power up the
|
||||
BeagleBone AI-64 or make the connections after power is applied on both
|
||||
boards.*
|
||||
|
||||
*Powering the processor via its I/O pins can cause damage to the
|
||||
processor.*
|
||||
|
||||
#TODO: Add BeagleBone AI-64 cape mechanical characteristics#
|
||||
|
||||
[[standard-cape-size]]
|
||||
==== Standard Cape Size
|
||||
|
||||
<<cape-board-dimensions-figure>> shows the outline of the standard cape.
|
||||
The dimensions are in inches.
|
||||
|
||||
[[cape-board-dimensions-figure, Cape board dimensions figure]]
|
||||
image::images/ch08/cape-dimension.jpg[title="Cape board dimensions"]
|
||||
|
||||
A notch is provided for BeagleBone Ethernet connector to stick up higher than
|
||||
the cape when mounted. This also acts as a key function to ensure that
|
||||
the cape is oriented correctly. Space is also provided to allow access
|
||||
to the user LEDs and reset button on BeagleBone board. On BeagleBone AI-64 board
|
||||
align it with the notch on the board silkscreen.
|
||||
|
||||
[[extended-cape-size]]
|
||||
==== Extended Cape Size
|
||||
|
||||
Capes larger than the standard board size are also allowed. A good
|
||||
example would be the new BeagleBone AI-64 robotics cape.
|
||||
There is no practical limit to the sizes of these types of boards.
|
||||
The notch is also optional, but it is up to the supplier to ensure that the
|
||||
cape is not plugged incorrectly on BeagleBone AI-64 such that damage would
|
||||
be cause to BeagleBone AI-64. Any such damage will be the responsibility of the
|
||||
supplier of such a cape to repair. As with all capes, the EEPROM is required and
|
||||
compliance with the power requirements must be adhered to.
|
||||
|
||||
|
||||
26
doc/SRM/chapter-09.adoc
Normal file
26
doc/SRM/chapter-09.adoc
Normal file
@ -0,0 +1,26 @@
|
||||
[[section-9,Section 9.0 BeagleBone AI-64 Mechanical]]
|
||||
== BeagleBone AI-64 Mechanical
|
||||
|
||||
[[dimensions-and-weight]]
|
||||
=== Dimensions and Weight
|
||||
|
||||
Size: 102.5 x 80 (4" x 3.15")
|
||||
|
||||
Max height: #TODO#
|
||||
|
||||
PCB Layers: #TODO#
|
||||
|
||||
PCB thickness: 2mm (0.08")
|
||||
|
||||
RoHS Compliant: Yes
|
||||
|
||||
Weight: 192gm
|
||||
|
||||
[[silkscreen-and-component-locations]]
|
||||
=== Silkscreen and Component Locations
|
||||
|
||||
image::images/ch09/board-dimensions.jpg[title="Board Dimensions"]
|
||||
|
||||
image::images/ch09/top-silkscreen.png[title="Top silkscreen"]
|
||||
|
||||
image::images/ch09/bottom-silkscreen.png[title="Bottom silkscreen"]
|
||||
18
doc/SRM/chapter-10.adoc
Normal file
18
doc/SRM/chapter-10.adoc
Normal file
@ -0,0 +1,18 @@
|
||||
[[pictures]]
|
||||
== Pictures
|
||||
|
||||
image::images/ch10/front.jpg[title="BeagleBone AI-64 front"]
|
||||
|
||||
image::images/ch10/back.jpg[title="BeagleBone AI-64 back"]
|
||||
|
||||
image::images/ch10/back-heatsink.jpg[title="BeagleBone AI-64 back with heatsink"]
|
||||
|
||||
image::images/ch10/45-front.jpg[title="BeagleBone AI-64 front at 45° angle"]
|
||||
|
||||
image::images/ch10/45-back.jpg[title="BeagleBone AI-64 back at 45° angle"]
|
||||
|
||||
image::images/ch10/45-back-heatsink.jpg[title="BeagleBone AI-64 back with heatsink at 45° angle"]
|
||||
|
||||
image::images/ch10/feature.jpg[title="BeagleBone AI-64 ports"]
|
||||
|
||||
|
||||
52
doc/SRM/chapter-11.adoc
Normal file
52
doc/SRM/chapter-11.adoc
Normal file
@ -0,0 +1,52 @@
|
||||
[[support-information]]
|
||||
== Support Information
|
||||
|
||||
All support for this design is through BeagleBoard.org community at:
|
||||
|
||||
link:https://forum.beagleboard.org/[BeagleBoard.org fourm].
|
||||
|
||||
|
||||
[[hardware-design]]
|
||||
=== Hardware Design
|
||||
|
||||
You can find all BeagleBone AI-64 hardware files https://git.beagleboard.org/beagleboard/beaglebone-ai-64/-/tree/master/hw[here].
|
||||
|
||||
|
||||
[[software-updates]]
|
||||
=== Software Updates
|
||||
|
||||
You can download and flash the supported image onto your BeagleBone AI-64 from
|
||||
https://debian.beagle.cc/images/bbai64-emmc-flasher-debian-11.2-xfce-arm64-2022-01-14-8gb.img.xz[this] source.
|
||||
|
||||
To see what SW revision is loaded into the eMMC check `/etc/dogtag`.
|
||||
It should look something like as shown below,
|
||||
|
||||
```
|
||||
root@BeagleBone:~# cat /etc/dogtag
|
||||
BeagleBoard.org Debian Bullseye Xfce Image 2022-01-14
|
||||
```
|
||||
|
||||
[[rma-support]]
|
||||
=== RMA Support
|
||||
|
||||
If you feel your board is defective or has issues, request an Return Merchandise Application (RMA) by filling out the form at
|
||||
http://beagleboard.org/support/rma . You will need the serial number and revision of the board. The
|
||||
serial numbers and revisions keep moving. Different boards can have different locations depending
|
||||
on when they were made. The following figures show the three locations of the serial and revision
|
||||
number.
|
||||
|
||||
[[trouble-shooting-video-output-issues]]
|
||||
=== Troubleshooting video output issues
|
||||
|
||||
[WARNING]
|
||||
====
|
||||
When connecting to an HDMI monitor, make sure your miniDP
|
||||
adapter is *active*. A *passive* adapter will not work.
|
||||
See <<display-adaptors-figure>>.
|
||||
====
|
||||
|
||||
[[getting-help]]
|
||||
==== Getting Help
|
||||
|
||||
If you need some up to date troubleshooting techniques,
|
||||
you can post your queries on link:https://forum.beagleboard.org/[BeagleBoard.org fourm].
|
||||
29
doc/SRM/colophon.adoc
Executable file
29
doc/SRM/colophon.adoc
Executable file
@ -0,0 +1,29 @@
|
||||
[colophon]
|
||||
== *Revision 0.0.3*
|
||||
|
||||
*Last PDF conversion:* June 11^th^, 2022
|
||||
|
||||
*Maintaining editor:* mailto:lorforlinux@beagleboard.org[Deepak Khatri]
|
||||
|
||||
*Contributors:*
|
||||
|
||||
* Deepak Khatri
|
||||
* James Anderson
|
||||
* Jason Kridner
|
||||
* Robert P J Day
|
||||
* Gerald Coley
|
||||
|
||||
|
||||
*Supply comments and errors via:* https://git.beagleboard.org/beagleboard/beaglebone-ai-64/-/issues
|
||||
|
||||
*All information in this document is subject to change without notice.*
|
||||
|
||||
*For an up to date version of this document refer to:* https://git.beagleboard.org/beagleboard/beaglebone-ai-64
|
||||
|
||||
*For all the graphics from this document refer to:*
|
||||
|
||||
1. https://www.canva.com/design/DAFBB_G9tF8/LhD-uL0-aJAEH2MPMdyLkg/edit?utm_content=DAFBB_G9tF8&utm_campaign=designshare&utm_medium=link2&utm_source=sharebutton[SRM images].
|
||||
2. https://www.canva.com/design/DAFCvXa2NAQ/raxKIYZjrd0DqYF9IFMbjw/edit?utm_content=DAFCvXa2NAQ&utm_campaign=designshare&utm_medium=link2&utm_source=sharebutton[SRM cover page].
|
||||
|
||||
image::images/by-sa.png[CCBYSA,88,31,align="center"]
|
||||
This work is licensed under a https://creativecommons.org/licenses/by-sa/4.0/[Creative Commons Attribution-ShareAlike 4.0 International License].
|
||||
0
doc/SRM/dedication.adoc
Executable file
0
doc/SRM/dedication.adoc
Executable file
15
doc/SRM/glossary.adoc
Executable file
15
doc/SRM/glossary.adoc
Executable file
@ -0,0 +1,15 @@
|
||||
[glossary]
|
||||
== Glossary
|
||||
|
||||
[glossary]
|
||||
BeagleBoard.org::
|
||||
A community of developers seeking to advance the state of open source software and hardware for embedded systems--and a registered trademark of the BeagleBoard.org Foundation.
|
||||
|
||||
BeagleBoard.org Foundation::
|
||||
A Michigan,USA based 501(c)(3) non-profit corporation.
|
||||
|
||||
BeagleBone::
|
||||
A family of BeagleBoard.org boards from the original mint-tin sized computer and registered trademark of the BeagleBoard.org Foundation.
|
||||
|
||||
Board::
|
||||
In this document, it refers to BeagleBone AI-64.
|
||||
BIN
doc/SRM/images/45-back-heatsink.png
Normal file
BIN
doc/SRM/images/45-back-heatsink.png
Normal file
Binary file not shown.
|
After 
(image error) Size: 5.8 MiB |
BIN
doc/SRM/images/45-back.png
Normal file
BIN
doc/SRM/images/45-back.png
Normal file
Binary file not shown.
|
After 
(image error) Size: 5.6 MiB |
BIN
doc/SRM/images/45-front.png
Normal file
BIN
doc/SRM/images/45-front.png
Normal file
Binary file not shown.
|
After 
(image error) Size: 6.8 MiB |
BIN
doc/SRM/images/Desktop-Configuration.png
Normal file
BIN
doc/SRM/images/Desktop-Configuration.png
Normal file
Binary file not shown.
|
After 
(image error) Size: 1.2 MiB |
BIN
doc/SRM/images/LED-Pattern.png
Normal file
BIN
doc/SRM/images/LED-Pattern.png
Normal file
Binary file not shown.
|
After 
(image error) Size: 2.0 MiB |
BIN
doc/SRM/images/Power-LED.png
Normal file
BIN
doc/SRM/images/Power-LED.png
Normal file
Binary file not shown.
|
After 
(image error) Size: 2.0 MiB |
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user