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Added keepout around J4 for selective solder. Fixes

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Chris Gammell 2025-02-10 09:24:06 -05:00 committed by Chris Gammell
parent 0cea091adf
commit 1a4a3741ed
2 changed files with 4461 additions and 3953 deletions

elixir.kicad_pcb
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LOADING design file

2
elixir.kicad_prl
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@ -1,6 +1,6 @@
{
"board": {
"active_layer": 31,
"active_layer": 37,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],