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78 lines
1.7 KiB
Plaintext
78 lines
1.7 KiB
Plaintext
The following are the changes for the hardware.
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R0.1
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1. Initial release.
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R0.2
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1. Switch from ECP5 to SPARTAN6 FPGA
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R0.3
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1. Remove on-board 39pin/ 50pin connector, switch to 40pin connector or EPD
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2. Remove DSI input connector
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3. Add DisplayPort to LVDS bridge chip and DisplayPort input
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R0.4
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1. Use Type-C input instead of full-size DisplayPort port
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R0.5
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1. Switch from MAX17135 PMIC to TPS65185 PMIC
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2. Switch to a different TypeC connector model
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3. Added global current limit
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R0.6
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1. Switch to individual DCDCs for Eink power supply
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Lite R0.1
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1. Use DVI TMDS input in place of Type-C input and DP bridge
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2. Use DCDC instead of charge pump + zener diode for lower Iq
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3. Add user button
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4. Add VCOM measure capability
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5. Add RP2040 SWD connector
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R0.7
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1. Import DVI TMDS input, newly revised power supply and user button from RL0.1
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2. Connect FPGA to RP2040's hardware SPI
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3. Fix USB Type C mux connection
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R0.8
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1. Fix DVI TMDS connector pinout
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2. Add FL connector
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R0.9
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1. Switch to 7-series FPGA
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2. New 50P connector for EPD
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3. Add voltage/ current monitoring for the screen and the FPGA
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4. Use FFC for FL connector
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5. Add jumper for RP2040 ISP
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6. Add shield
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R0.10
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1. Switch back to 6-series FPGA
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2. Switch to use STM32H750 as EC
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R0.11
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1. Fix main DCDC feedback resistors
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2. Adjust pinout assignment for EPD again
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R0.12
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1. Fix buttons
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2. Fix DVI HPD connection
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R0.13
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1. Add user GPIOs
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2. Use a lower profile USB receptacle
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R1.0
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1. Replace LGS5148 with LGS5145
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R1.1
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1. Temporary fix for DVI HPD glitch
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R1.2
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1. Add additional power switches for positive rails
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2. Add additional decap for VCOM measurement
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R1.3
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1. Proper fix for DVI HPD glitch
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2. Fix negative rail SBD connections
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