mirror of
https://gitlab.com/zephray/glider.git
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112 lines
4.0 KiB
C
112 lines
4.0 KiB
C
//
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// Grimoire
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// Copyright 2025 Wenting Zhang
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and associated documentation files (the "Software"), to deal
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// in the Software without restriction, including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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// SOFTWARE.
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//
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#pragma once
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#include "pal_i2c.h"
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#define LED_GRN GPIOE, GPIO_PIN_0
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#define LED_RED GPIOE, GPIO_PIN_1
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#define BTNCNT 3
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#define BTN1 GPIOE, GPIO_PIN_4
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#define BTN2 GPIOB, GPIO_PIN_5
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#define BTN3 GPIOE, GPIO_PIN_3
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#define BTN_PRESSED_LEVEL 1 // Active high
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#define FPGA_CS GPIOB, GPIO_PIN_12
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#define FPGA_PROG GPIOC, GPIO_PIN_10
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#define FPGA_DONE GPIOC, GPIO_PIN_11
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#define FPGA_SUSP GPIOC, GPIO_PIN_12
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#define DP_PDN GPIOD, GPIO_PIN_3
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#define DP_HPD GPIOD, GPIO_PIN_7
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#define DEC_RST GPIOD, GPIO_PIN_6
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#define HPD_EN GPIOA, GPIO_PIN_9
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#define TYPEC_ORI GPIOA, GPIO_PIN_10
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#define TCPC_INT GPIOA, GPIO_PIN_15
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#define EPD_PWREN GPIOE, GPIO_PIN_11
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#define EPD_POSEN GPIOE, GPIO_PIN_12
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#define EPD_THROT GPIOD, GPIO_PIN_2
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#define FL_EN GPIOE, GPIO_PIN_15
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#define VCOM_MEN GPIOA, GPIO_PIN_2
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#define VCOM_EN GPIOA, GPIO_PIN_3
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#define FPGA_SPI &hspi2
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#define PTN3460_I2C &pi2c1
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#define ADV7611_I2C &pi2c1
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#define FUSB302_I2C &pi2c1
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#define INA3221_I2C &pi2c1
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#define TYPEC_MB_ORI_INV 0
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#define TYPEC_AUX_ORI_INV 0
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#define PTN3460_I2C_ADDR (0x60)
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#define ADV7611_I2C_ADDR (0x4C)
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#define FUSB302_I2C_ADDR (0x22)
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#define INA3221_0_I2C_ADDR (0x40)
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#define INA3221_1_I2C_ADDR (0x41)
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#define INA3221_2_I2C_ADDR (0x42)
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// ADV7611 Sub addresses, make sure they don't conflict with anything else!
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#define CEC_I2C_ADDR (0x3F) // Default 0x40(0x80)
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#define INFOFRAME_I2C_ADDR (0x3E) // Default 0x3E(0x7C)
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#define DPLL_I2C_ADDR (0x26) // Default 0x26(0x4C)
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#define KSV_I2C_ADDR (0x32) // Default 0x32(0x64)
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#define EDID_I2C_ADDR (0x36) // Default 0x36(0x6C)
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#define HDMI_I2C_ADDR (0x34) // Default 0x34(0x68)
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#define CP_I2C_ADDR (0x23) // Default 0x22(0x44)
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// For now, these resources are not shared among multiple threads, do not protect them
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extern SPI_HandleTypeDef hspi2;
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extern ADC_HandleTypeDef hadc1;
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extern DAC_HandleTypeDef hdac1;
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extern QSPI_HandleTypeDef hqspi;
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extern TIM_HandleTypeDef htim1;
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// GPIO operations are atomic, no need to protect
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#define gpio_put HAL_GPIO_WritePin
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#define gpio_get HAL_GPIO_ReadPin
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#define sleep_ms(x) vTaskDelay(pdMS_TO_TICKS(x))
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#define spi_send(spi, buf, size) \
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HAL_SPI_Transmit(spi, buf, size, HAL_MAX_DELAY)
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#define spi_send_dma(spi, buf, size) \
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HAL_SPI_Transmit_DMA(spi, buf, size)
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#define spi_send_recv(spi, txbuf, rxbuf, size) \
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HAL_SPI_TransmitReceive(spi, txbuf, rxbuf, size, HAL_MAX_DELAY)
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#define board_get_uid HAL_GetUIDw0
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size_t board_usb_get_serial(uint16_t desc_str1[], size_t max_chars);
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void board_switch_spi_freq(SPI_HandleTypeDef *spi, uint32_t target);
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void board_late_init(void); // Initialization only after RTOS has started
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void sleep_us(uint32_t x);
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void spi_wait_dma_complete(SPI_HandleTypeDef *spi);
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