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923cd0af3a
The canonical dru's copper-to-copper rule demanded 0.1 mm outer clearance against the 0.09 line standard stated in the same file, flooding DRC with false errors on standard-routed boards. Removed; the project-file floors gate this already. Rule floors set to the line standard where the routed board complies, verified by DRC: zero new violations. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
42 lines
1.6 KiB
Plaintext
42 lines
1.6 KiB
Plaintext
(version 1)
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# OpenDrone canonical design rules.
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#
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# Copied from hardware-template into every board repo. Keep the block above the
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# marker byte-identical across repos. Board-specific rules go
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# below the marker, never in the middle.
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#
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# This file holds CUSTOM rules only. The fab numbers that gate a JLCPCB order
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# live in the project file under board.design_settings.rules, and come from
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# Board Setup > Import Settings from Another Board, pointed at
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# kicad/templates/OpenDrone-6L. The line standard is:
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#
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# clearance 0.09 track 0.09 via 0.35 / 0.20 drill
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# annular 0.075 hole-to-hole 0.20 edge clearance 0.20
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#
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# Do not restate those here. Two copies of a number drift, and the one you are
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# not looking at is the one that is wrong.
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(rule "silkscreen over pad"
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(constraint silk_clearance (min 0.15mm))
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(condition "A.Type == 'Pad'"))
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# --- board-specific rules below this line ------------------------------------
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#
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# Only what this board needs and the line does not. Name every rule so the next
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# person can tell a real constraint from a copied one.
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#
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# 2 oz outer copper, used on the ESC boards. Heavier copper etches with a wider
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# taper, so the outer layers need 0.16 mm where the line standard is 0.09 mm.
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# Inner layers stay at 1 oz and keep the standard. This is a rule and not a
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# global minimum on purpose: raising the board minimum would constrain the
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# signal routing on the inner layers for no reason.
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#
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# (rule "2 oz outer copper, clearance"
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# (constraint clearance (min 0.16mm))
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# (layer outer))
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#
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# (rule "2 oz outer copper, track width"
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# (constraint track_width (min 0.16mm))
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# (layer outer))
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