mirror of
https://gitlab.com/hyperglitch/jellyfish.git
synced 2025-12-26 07:06:47 +00:00
81 lines
3.5 KiB
C
81 lines
3.5 KiB
C
/**
|
|
******************************************************************************
|
|
* @file usbd_cdc_interface.h
|
|
* @author MCD Application Team
|
|
* @brief Header for usbd_cdc_interface.c file.
|
|
******************************************************************************
|
|
* @attention
|
|
*
|
|
* Copyright (c) 2025 STMicroelectronics.
|
|
* All rights reserved.
|
|
*
|
|
* This software is licensed under terms that can be found in the LICENSE file
|
|
* in the root directory of this software component.
|
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
|
*
|
|
******************************************************************************
|
|
*/
|
|
|
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
|
#ifndef __USBD_CDC_IF_H
|
|
#define __USBD_CDC_IF_H
|
|
|
|
/* Includes ------------------------------------------------------------------*/
|
|
#include "usbd_cdc.h"
|
|
|
|
/* Exported types ------------------------------------------------------------*/
|
|
/* Exported constants --------------------------------------------------------*/
|
|
/* User can use this section to tailor USARTx/UARTx instance used and associated
|
|
resources */
|
|
/* Definition for USARTx clock resources */
|
|
#define USARTx USART1
|
|
#define USARTx_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE();
|
|
#define DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
|
|
#define USARTx_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
|
#define USARTx_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
|
|
|
|
#define USARTx_FORCE_RESET() __HAL_RCC_USART1_FORCE_RESET()
|
|
#define USARTx_RELEASE_RESET() __HAL_RCC_USART1_RELEASE_RESET()
|
|
|
|
/* Definition for USARTx Pins */
|
|
#define USARTx_TX_PIN GPIO_PIN_9
|
|
#define USARTx_TX_GPIO_PORT GPIOA
|
|
#define USARTx_TX_AF GPIO_AF7_USART1
|
|
#define USARTx_RX_PIN GPIO_PIN_10
|
|
#define USARTx_RX_GPIO_PORT GPIOA
|
|
#define USARTx_RX_AF GPIO_AF7_USART1
|
|
|
|
/* Definition for USARTx's NVIC: used for receiving data over Rx pin */
|
|
#define USARTx_IRQn USART1_IRQn
|
|
#define USARTx_IRQHandler USART1_IRQHandler
|
|
|
|
/* Definition for USARTx's DMA: used for transmitting data over Tx pin */
|
|
#define USARTx_TX_DMA_CHANNEL DMA_CHANNEL_4
|
|
#define USARTx_TX_DMA_STREAM DMA2_Stream7
|
|
|
|
#define USARTx_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler
|
|
#define USARTx_DMA_TX_IRQn DMA2_Stream7_IRQn
|
|
|
|
/* Definition for TIMx clock resources */
|
|
#define TIMx TIM3
|
|
#define TIMx_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
|
|
#define TIMx_FORCE_RESET() __HAL_RCC_USART1_FORCE_RESET()
|
|
#define TIMx_RELEASE_RESET() __HAL_RCC_USART1_RELEASE_RESET()
|
|
|
|
/* Definition for TIMx's NVIC */
|
|
#define TIMx_IRQn TIM3_IRQn
|
|
#define TIMx_IRQHandler TIM3_IRQHandler
|
|
|
|
/* Periodically, the state of the buffer "UserTxBuffer" is checked.
|
|
The period depends on CDC_POLLING_INTERVAL */
|
|
#define CDC_POLLING_INTERVAL 5 /* in ms. The max is 65 and the min is 1 */
|
|
|
|
extern USBD_CDC_ItfTypeDef USBD_CDC_fops;
|
|
|
|
typedef void (*usb_cdc_rx_callback_t)(uint8_t *data, uint32_t length);
|
|
void USBD_CDC_Register_Rx_Callback(usb_cdc_rx_callback_t callback);
|
|
|
|
/* Exported macro ------------------------------------------------------------*/
|
|
/* Exported functions ------------------------------------------------------- */
|
|
#endif /* __USBD_CDC_IF_H */
|