jellyfish-powersupply/gw/test/circ_buffer_tb.sv

// SPDX-FileCopyrightText: 2025 Igor Brkic <igor@hyperglitch.com>
// SPDX-License-Identifier: GPL-3.0-or-later

`timescale 1ns / 1ps


//TB_DEPS: src/circ_buffer.v


module circ_buffer_tb;

  localparam DATA_WIDTH = 16;
  localparam BUFFER_DEPTH = 16;



  reg clk;
  reg rst;
  reg [DATA_WIDTH-1:0]data_wr = 0;
  reg do_write;
  wire [DATA_WIDTH-1:0]data_rd = 0;
  reg do_read;



  circ_buffer #(
    .DATA_WIDTH(DATA_WIDTH),
    .BUFFER_DEPTH(BUFFER_DEPTH)
  ) cb (
    .rst(rst),
    .clk_wr(clk),
    .clk_rd(clk),
    .data_in(data_wr),
    .do_write(do_write),
    .data_out(data_rd),
    .do_read(do_read)
  );

  // generate a clock
  initial begin
    clk = 0;
    forever #5 clk = ~clk; // 10ns clock period, 100MHz
  end

  // generate a test sequence
  initial begin
    do_write = 0;
    do_read = 0;
    rst = 1;
    #20;
    rst = 0;

    #20;
    for(int i=0; i<16; i++) begin
      #10
      do_read = 1;
      #10;
      do_read = 0;
      #10;
    end
    #20;

    for(int out=0; out<5; out++) begin
      for(int i=0; i<6; i++) begin
        #10
        data_wr = $random;
        do_write = 1;
        #10;
        do_write = 0;
        #10;
      end

      #20

      for(int i=0; i<6; i++) begin
        #10
        do_read = 1;
        #10;
        do_read = 0;
        #10;
      end
    end

    #20;
    for(int i=0; i<16; i++) begin
      #10
      do_read = 1;
      #10;
      do_read = 0;
      #10;
    end

    #20;
    $finish;
  end

  initial begin
    $dumpfile("build/circ_buffer_tb.vcd");
    $dumpvars(0, circ_buffer_tb);
  end
endmodule