mirror of
https://github.com/Architeuthis-Flux/JumperlessV5.git
synced 2025-09-05 10:47:58 +00:00
510 lines
19 KiB
C
510 lines
19 KiB
C
//#if MICROPY_PY_MACHINE_UART
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// rp2 backend for machine.UART for the embedded Jumperless port
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#include "py/runtime.h"
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#include "py/mperrno.h"
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#include "py/ringbuf.h"
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#include "shared/runtime/mpirq.h"
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#include "extmod/modmachine.h"
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#include "hardware/irq.h"
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#include "hardware/uart.h"
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#include "hardware/regs/uart.h"
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#include "pico/mutex.h"
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#include "pico/time.h"
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#include "py/stream.h"
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#include <stdbool.h>
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// Coordinate with AsyncPassthrough for UART0 ownership (C-only prototypes)
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extern void jl_asyncpassthrough_suspend_uart0(void);
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extern void jl_asyncpassthrough_resume_uart0(void);
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extern void jl_asyncpassthrough_override_line_coding(uint32_t baud, uint8_t data_bits, uint8_t parity, uint8_t stop_bits);
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#define DEFAULT_UART_BAUDRATE (115200)
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#define DEFAULT_UART_BITS (8)
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#define DEFAULT_UART_STOP (1)
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#ifdef MICROPY_HW_UART_NO_DEFAULT_PINS
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#define MICROPY_UART_PINS_ARG_OPTS MP_ARG_REQUIRED
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#else
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#define MICROPY_UART_PINS_ARG_OPTS 0
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#endif
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#if !defined(MICROPY_HW_UART0_TX)
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#define MICROPY_HW_UART0_TX (0)
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#define MICROPY_HW_UART0_RX (1)
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#define MICROPY_HW_UART0_CTS (18)
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#define MICROPY_HW_UART0_RTS (19)
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#endif
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#if !defined(MICROPY_HW_UART1_TX)
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#define MICROPY_HW_UART1_TX (20)
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#define MICROPY_HW_UART1_RX (21)
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#define MICROPY_HW_UART1_CTS (22)
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#define MICROPY_HW_UART1_RTS (23)
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#endif
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#define DEFAULT_BUFFER_SIZE (256)
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#define MIN_BUFFER_SIZE (32)
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#define MAX_BUFFER_SIZE (32766)
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#define IS_VALID_PERIPH(uart, pin) (((((pin) + 4) & 8) >> 3) == (uart))
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#if PICO_RP2350
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#define IS_VALID_TX(uart, pin) (((pin) & 1) == 0 && IS_VALID_PERIPH(uart, pin))
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#define IS_VALID_RX(uart, pin) (((pin) & 1) == 1 && IS_VALID_PERIPH(uart, pin))
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#else
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#define IS_VALID_TX(uart, pin) (((pin) & 3) == 0 && IS_VALID_PERIPH(uart, pin))
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#define IS_VALID_RX(uart, pin) (((pin) & 3) == 1 && IS_VALID_PERIPH(uart, pin))
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#endif
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#define IS_VALID_CTS(uart, pin) (((pin) & 3) == 2 && IS_VALID_PERIPH(uart, pin))
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#define IS_VALID_RTS(uart, pin) (((pin) & 3) == 3 && IS_VALID_PERIPH(uart, pin))
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#define UART_INVERT_TX (1)
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#define UART_INVERT_RX (2)
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#define UART_INVERT_MASK (UART_INVERT_TX | UART_INVERT_RX)
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#define UART_HWCONTROL_CTS (1)
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#define UART_HWCONTROL_RTS (2)
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#define MP_UART_ALLOWED_FLAGS (UART_UARTMIS_RTMIS_BITS | UART_UARTMIS_TXMIS_BITS | UART_UARTMIS_BEMIS_BITS)
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#define UART_FIFO_SIZE_RX (32)
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#define UART_FIFO_TRIGGER_LEVEL_RX (24)
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static mutex_t write_mutex_0;
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static mutex_t write_mutex_1;
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static mutex_t read_mutex_0;
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static mutex_t read_mutex_1;
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auto_init_mutex(write_mutex_0);
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auto_init_mutex(write_mutex_1);
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auto_init_mutex(read_mutex_0);
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auto_init_mutex(read_mutex_1);
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typedef struct _machine_uart_obj_t {
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mp_obj_base_t base;
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uart_inst_t *const uart;
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uint8_t uart_id;
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uint32_t baudrate;
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uint8_t bits;
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uart_parity_t parity;
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uint8_t stop;
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uint8_t tx;
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uint8_t rx;
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uint8_t cts;
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uint8_t rts;
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uint16_t timeout;
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uint16_t timeout_char;
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uint8_t invert;
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uint8_t flow;
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uint16_t rxbuf_len;
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ringbuf_t read_buffer;
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mutex_t *read_mutex;
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uint16_t txbuf_len;
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ringbuf_t write_buffer;
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mutex_t *write_mutex;
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uint16_t mp_irq_trigger;
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uint16_t mp_irq_flags;
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mp_irq_obj_t *mp_irq_obj;
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} machine_uart_obj_t;
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// Static ring buffers to avoid GC root registration.
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static uint8_t uart0_rx_buf[DEFAULT_BUFFER_SIZE + 1];
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static uint8_t uart0_tx_buf[DEFAULT_BUFFER_SIZE + 1];
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static uint8_t uart1_rx_buf[DEFAULT_BUFFER_SIZE + 1];
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static uint8_t uart1_tx_buf[DEFAULT_BUFFER_SIZE + 1];
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static machine_uart_obj_t machine_uart_obj[] = {
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{{&machine_uart_type}, uart0, 0, 0, DEFAULT_UART_BITS, UART_PARITY_NONE, DEFAULT_UART_STOP,
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MICROPY_HW_UART0_TX, MICROPY_HW_UART0_RX, MICROPY_HW_UART0_CTS, MICROPY_HW_UART0_RTS,
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0, 0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_0, 0, {NULL, 1, 0, 0}, &write_mutex_0, 0, 0, NULL},
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{{&machine_uart_type}, uart1, 1, 0, DEFAULT_UART_BITS, UART_PARITY_NONE, DEFAULT_UART_STOP,
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MICROPY_HW_UART1_TX, MICROPY_HW_UART1_RX, MICROPY_HW_UART1_CTS, MICROPY_HW_UART1_RTS,
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0, 0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_1, 0, {NULL, 1, 0, 0}, &write_mutex_1, 0, 0, NULL},
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};
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static const char *_parity_name[] = {"None", "0", "1"};
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static const char *_invert_name[] = {"None", "INV_TX", "INV_RX", "INV_TX|INV_RX"};
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/******************************************************************************/
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// IRQ and buffer handling
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static inline bool write_mutex_try_lock(machine_uart_obj_t *u) {
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return mutex_enter_timeout_ms(u->write_mutex, 0);
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}
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static inline void write_mutex_unlock(machine_uart_obj_t *u) {
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mutex_exit(u->write_mutex);
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}
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static inline bool read_mutex_try_lock(machine_uart_obj_t *u) {
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return mutex_enter_timeout_ms(u->read_mutex, 0);
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}
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static inline void read_mutex_unlock(machine_uart_obj_t *u) {
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mutex_exit(u->read_mutex);
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}
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// take at most max_items bytes from the fifo and store them in the buffer
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static void uart_drain_rx_fifo(machine_uart_obj_t *self, uint32_t max_items) {
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if (read_mutex_try_lock(self)) {
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while (uart_is_readable(self->uart) && ringbuf_free(&self->read_buffer) > 0 && max_items > 0) {
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uint16_t c = uart_get_hw(self->uart)->dr;
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max_items -= 1;
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if (c & UART_UARTDR_BE_BITS) {
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continue;
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}
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ringbuf_put(&(self->read_buffer), c);
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}
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read_mutex_unlock(self);
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}
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}
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// take bytes from the buffer and put them into the UART FIFO
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static void uart_fill_tx_fifo(machine_uart_obj_t *self) {
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if (write_mutex_try_lock(self)) {
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while (uart_is_writable(self->uart) && ringbuf_avail(&self->write_buffer) > 0) {
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uart_get_hw(self->uart)->dr = ringbuf_get(&(self->write_buffer));
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}
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write_mutex_unlock(self);
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}
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}
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static inline void uart_service_interrupt(machine_uart_obj_t *self) {
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if (uart_get_hw(self->uart)->mis & (UART_UARTMIS_RXMIS_BITS | UART_UARTMIS_RTMIS_BITS)) {
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uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & ~(UART_UARTICR_TXIC_BITS | UART_UARTICR_BEIC_BITS);
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uart_drain_rx_fifo(self, UART_FIFO_TRIGGER_LEVEL_RX - 1);
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}
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if (uart_get_hw(self->uart)->mis & UART_UARTMIS_TXMIS_BITS) {
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uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & ~(UART_UARTICR_RXIC_BITS | UART_UARTICR_RTIC_BITS | UART_UARTICR_BEIC_BITS);
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if (ringbuf_avail(&self->write_buffer) > 0) {
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uart_fill_tx_fifo(self);
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}
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}
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if (uart_get_hw(self->uart)->mis & UART_UARTMIS_BEMIS_BITS) {
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hw_set_bits(&uart_get_hw(self->uart)->icr, UART_UARTICR_BEIC_BITS);
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}
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}
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static void uart0_irq_handler(void) {
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uart_service_interrupt(&machine_uart_obj[0]);
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}
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static void uart1_irq_handler(void) {
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uart_service_interrupt(&machine_uart_obj[1]);
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}
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/******************************************************************************/
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// MicroPython bindings for UART
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static void mp_machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
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machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, tx=%d, rx=%d, txbuf=%d, rxbuf=%d, timeout=%u, timeout_char=%u, invert=%s)",
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self->uart_id, self->baudrate, self->bits, _parity_name[self->parity],
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self->stop, self->tx, self->rx, self->txbuf_len, self->rxbuf_len,
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self->timeout, self->timeout_char, _invert_name[self->invert]);
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}
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static void mp_machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
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// Minimal, qstr-lite parsing: only positional args supported to avoid adding qstrs.
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// Usage: UART(id[, baudrate])
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bool explicit_baud = false;
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if (n_args >= 1 && pos_args != NULL) {
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// First positional arg is always baudrate for both make_new and init
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mp_int_t br = mp_obj_get_int(pos_args[0]);
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if (br > 0) {
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self->baudrate = (uint32_t)br;
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explicit_baud = true;
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}
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}
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if (n_args > 0 || kw_args->used > 0 || self->baudrate == 0) {
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if (self->baudrate == 0) {
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self->baudrate = DEFAULT_UART_BAUDRATE;
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self->timeout_char = 0;
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}
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uint32_t min_timeout_char = 13000 / self->baudrate + 1;
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if (self->timeout_char < min_timeout_char) {
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self->timeout_char = min_timeout_char;
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}
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bool was_enabled = uart_is_enabled(self->uart);
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if (!was_enabled) {
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// If taking over UART0, suspend AsyncPassthrough first (preempt mode)
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// if (self->uart_id == 0) {
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// jl_asyncpassthrough_suspend_uart0();
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// }
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uart_init(self->uart, self->baudrate);
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uart_set_format(self->uart, self->bits, self->stop, self->parity);
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__dsb();
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uart_set_fifo_enabled(self->uart, true);
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__dsb();
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gpio_set_function(self->tx, UART_FUNCSEL_NUM(self->uart, self->tx));
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gpio_set_function(self->rx, UART_FUNCSEL_NUM(self->uart, self->rx));
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if (self->invert & UART_INVERT_RX) {
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gpio_set_inover(self->rx, GPIO_OVERRIDE_INVERT);
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}
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if (self->invert & UART_INVERT_TX) {
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gpio_set_outover(self->tx, GPIO_OVERRIDE_INVERT);
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}
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if (self->flow & UART_HWCONTROL_CTS) {
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gpio_set_function(self->cts, GPIO_FUNC_UART);
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}
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if (self->flow & UART_HWCONTROL_RTS) {
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gpio_set_function(self->rts, GPIO_FUNC_UART);
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}
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uart_set_hw_flow(self->uart, self->flow & UART_HWCONTROL_CTS, self->flow & UART_HWCONTROL_RTS);
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} else {
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// Already configured by passthrough; apply only explicitly-provided settings
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bool override_baud = explicit_baud;
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if (override_baud) {
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uart_set_baudrate(self->uart, self->baudrate);
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}
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// Only update format if we ever add explicit parsing for it
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if (self->uart_id == 0 && override_baud) {
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jl_asyncpassthrough_override_line_coding(self->baudrate, self->bits, (uint8_t)self->parity, self->stop);
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}
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}
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// // Always enforce requested baudrate and sync passthrough regardless of prior state
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// uart_set_baudrate(self->uart, self->baudrate);
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// if (self->uart_id == 0) {
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// jl_asyncpassthrough_override_line_coding(self->baudrate, self->bits, (uint8_t)self->parity, self->stop);
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// }
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if (self->read_buffer.buf == NULL) {
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if (self->uart_id == 0) {
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self->read_buffer.buf = uart0_rx_buf;
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self->read_buffer.size = sizeof(uart0_rx_buf);
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} else {
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self->read_buffer.buf = uart1_rx_buf;
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self->read_buffer.size = sizeof(uart1_rx_buf);
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}
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self->read_buffer.iget = 0;
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self->read_buffer.iput = 0;
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}
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if (self->write_buffer.buf == NULL) {
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if (self->uart_id == 0) {
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self->write_buffer.buf = uart0_tx_buf;
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self->write_buffer.size = sizeof(uart0_tx_buf);
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} else {
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self->write_buffer.buf = uart1_tx_buf;
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self->write_buffer.size = sizeof(uart1_tx_buf);
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}
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self->write_buffer.iget = 0;
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self->write_buffer.iput = 0;
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}
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// Only attach IRQs when we initialized the UART
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if (!was_enabled) {
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if (self->uart_id == 0) {
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// UART0 integrates with AsyncPassthrough: use shared handler
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irq_add_shared_handler(UART0_IRQ, uart0_irq_handler, 1);
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irq_set_enabled(UART0_IRQ, true);
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} else {
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// UART1 uses standard rp2 behavior: exclusive handler
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irq_set_exclusive_handler(UART1_IRQ, uart1_irq_handler);
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irq_set_enabled(UART1_IRQ, true);
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}
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uart_set_irq_enables(self->uart, true, true);
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}
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}
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}
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static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
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mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
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int uart_id = mp_obj_get_int(args[0]);
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if (uart_id < 0 || uart_id >= MP_ARRAY_SIZE(machine_uart_obj)) {
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mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("UART(%d) doesn't exist"), uart_id);
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}
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machine_uart_obj_t *self = (machine_uart_obj_t *)&machine_uart_obj[uart_id];
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self->rxbuf_len = DEFAULT_BUFFER_SIZE;
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self->read_buffer.buf = NULL;
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self->txbuf_len = DEFAULT_BUFFER_SIZE;
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self->write_buffer.buf = NULL;
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mp_map_t kw_args;
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mp_map_init_fixed_table(&kw_args, 0, NULL);
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mp_machine_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
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return MP_OBJ_FROM_PTR(self);
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}
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static void mp_machine_uart_deinit(machine_uart_obj_t *self) {
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uart_tx_wait_blocking(self->uart);
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bool was_enabled = uart_is_enabled(self->uart);
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if (!was_enabled) {
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uart_deinit(self->uart);
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}
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if (self->uart_id == 0) {
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if (!was_enabled) {
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irq_set_enabled(UART0_IRQ, false);
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// Remove our shared handler so exclusive handlers can be restored
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irq_remove_handler(UART0_IRQ, uart0_irq_handler);
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// Release UART0 back to AsyncPassthrough
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jl_asyncpassthrough_resume_uart0();
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}
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} else {
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if (!was_enabled) {
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irq_set_enabled(UART1_IRQ, false);
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irq_remove_handler(UART1_IRQ, uart1_irq_handler);
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}
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}
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self->baudrate = 0;
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// Static buffers persist; nothing to clear in GC state.
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}
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static mp_obj_t machine_uart_init(size_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
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mp_machine_uart_init_helper(MP_OBJ_TO_PTR(args[0]), n_args - 1, args + 1, kw_args);
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init);
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static mp_obj_t machine_uart_deinit_obj_fun(mp_obj_t self_in) {
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machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_machine_uart_deinit(self);
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return mp_const_none;
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}
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static MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit_obj_fun);
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static mp_int_t mp_machine_uart_any(machine_uart_obj_t *self) {
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uart_drain_rx_fifo(self, UART_FIFO_SIZE_RX + 1);
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return ringbuf_avail(&self->read_buffer);
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}
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static mp_obj_t machine_uart_any_obj_fun(mp_obj_t self_in) {
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machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
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return MP_OBJ_NEW_SMALL_INT(mp_machine_uart_any(self));
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}
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static MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any_obj_fun);
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static mp_uint_t mp_machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
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machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_uint_t start = mp_hal_ticks_ms();
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mp_uint_t timeout = self->timeout;
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uint8_t *dest = buf_in;
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for (size_t i = 0; i < size; i++) {
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while (ringbuf_avail(&self->read_buffer) == 0) {
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if (uart_is_readable(self->uart)) {
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uart_drain_rx_fifo(self, UART_FIFO_SIZE_RX + 1);
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break;
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}
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mp_uint_t elapsed = mp_hal_ticks_ms() - start;
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if (elapsed > timeout) {
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if (i <= 0) {
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*errcode = MP_EAGAIN;
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return MP_STREAM_ERROR;
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|
} else {
|
|
return i;
|
|
}
|
|
}
|
|
mp_event_handle_nowait();
|
|
}
|
|
*dest++ = ringbuf_get(&(self->read_buffer));
|
|
start = mp_hal_ticks_ms();
|
|
timeout = self->timeout_char;
|
|
}
|
|
return size;
|
|
}
|
|
|
|
static mp_uint_t mp_machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
|
|
machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
|
mp_uint_t start = mp_hal_ticks_ms();
|
|
mp_uint_t timeout = self->timeout;
|
|
const uint8_t *src = buf_in;
|
|
size_t i = 0;
|
|
while (i < size && ringbuf_free(&(self->write_buffer)) > 0) {
|
|
ringbuf_put(&(self->write_buffer), *src++);
|
|
++i;
|
|
}
|
|
uart_fill_tx_fifo(self);
|
|
while (i < size) {
|
|
while (ringbuf_free(&(self->write_buffer)) == 0) {
|
|
mp_uint_t elapsed = mp_hal_ticks_ms() - start;
|
|
if (elapsed > timeout) {
|
|
if (i <= 0) {
|
|
*errcode = MP_EAGAIN;
|
|
return MP_STREAM_ERROR;
|
|
} else {
|
|
return i;
|
|
}
|
|
}
|
|
mp_event_wait_ms(timeout - elapsed);
|
|
}
|
|
ringbuf_put(&(self->write_buffer), *src++);
|
|
++i;
|
|
start = mp_hal_ticks_ms();
|
|
timeout = self->timeout_char;
|
|
uart_fill_tx_fifo(self);
|
|
}
|
|
return size;
|
|
}
|
|
|
|
static bool mp_machine_uart_txdone(machine_uart_obj_t *self) {
|
|
return ringbuf_avail(&self->write_buffer) == 0
|
|
&& (uart_get_hw(self->uart)->fr & (UART_UARTFR_TXFE_BITS | UART_UARTFR_BUSY_BITS)) == UART_UARTFR_TXFE_BITS;
|
|
}
|
|
|
|
static mp_uint_t mp_machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, int *errcode) {
|
|
machine_uart_obj_t *self = self_in;
|
|
if (request == MP_STREAM_POLL) {
|
|
uintptr_t flags = arg;
|
|
mp_uint_t ret = 0;
|
|
if ((flags & MP_STREAM_POLL_RD) && (uart_is_readable(self->uart) || ringbuf_avail(&self->read_buffer) > 0)) {
|
|
ret |= MP_STREAM_POLL_RD;
|
|
}
|
|
if ((flags & MP_STREAM_POLL_WR) && ringbuf_free(&self->write_buffer) > 0) {
|
|
ret |= MP_STREAM_POLL_WR;
|
|
}
|
|
return ret;
|
|
} else if (request == MP_STREAM_FLUSH) {
|
|
uint64_t timeout = time_us_64() + (uint64_t)(33 + self->write_buffer.size) * 13000000ll * 2 / self->baudrate;
|
|
while (1) {
|
|
if (mp_machine_uart_txdone(self)) {
|
|
return 0;
|
|
}
|
|
uint64_t now = time_us_64();
|
|
if (now >= timeout) {
|
|
break;
|
|
}
|
|
mp_event_handle_nowait();
|
|
}
|
|
*errcode = MP_ETIMEDOUT;
|
|
return MP_STREAM_ERROR;
|
|
} else {
|
|
*errcode = MP_EINVAL;
|
|
return MP_STREAM_ERROR;
|
|
}
|
|
}
|
|
|
|
static const mp_stream_p_t uart_stream_p = {
|
|
.read = mp_machine_uart_read,
|
|
.write = mp_machine_uart_write,
|
|
.ioctl = mp_machine_uart_ioctl,
|
|
.is_text = false,
|
|
};
|
|
|
|
static const mp_rom_map_elem_t machine_uart_locals_dict_table[] = {
|
|
{ MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) },
|
|
{ MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) },
|
|
};
|
|
static MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table);
|
|
|
|
MP_DEFINE_CONST_OBJ_TYPE(
|
|
machine_uart_type,
|
|
MP_QSTR_UART,
|
|
MP_TYPE_FLAG_ITER_IS_STREAM,
|
|
make_new, mp_machine_uart_make_new,
|
|
print, mp_machine_uart_print,
|
|
protocol, &uart_stream_p,
|
|
locals_dict, &machine_uart_locals_dict
|
|
);
|
|
|
|
// Export a reference to ensure the type is linked
|
|
const mp_obj_type_t *jl_uart_type_export = &machine_uart_type;
|
|
|
|
// No dynamic root pointers needed; using static buffers.
|
|
|
|
//#endif // MICROPY_PY_MACHINE_UART
|
|
|
|
|