AllSpiceMirrors/kicad
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Fix layer ordering issue in net inspector

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B_Cu is always the last layer, so if we are incrementing, we need to
check for matches, not index comparison

Fixes https://gitlab.com/kicad/code/kicad/-/issues/18933
This commit is contained in:
Seth Hillbrand 2024-10-18 11:44:20 -07:00
parent 4077c57d7a
commit 10e1ba9c6b
2 changed files with 12 additions and 8 deletions
pcbnew
board_stackup_manager
board_stackup.cpp
widgets
pcb_net_inspector_panel.cpp

9
pcbnew/board_stackup_manager/board_stackup.cpp
View File

@ -820,7 +820,8 @@ int BOARD_STACKUP::GetLayerDistance( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSec
if( aFirstLayer == aSecondLayer )
return 0;
if( aSecondLayer < aFirstLayer )
// B_Cu is always the last copper layer but doesn't have the last numerical value
if( aSecondLayer != B_Cu && ( aSecondLayer < aFirstLayer || aFirstLayer == B_Cu ) )
std::swap( aFirstLayer, aSecondLayer );
int total = 0;
@ -836,7 +837,7 @@ int BOARD_STACKUP::GetLayerDistance( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSec
continue; // Silk/mask layer
// Reached the start copper layer? Start counting the next dielectric after it
if( !start && ( layer != UNDEFINED_LAYER && layer >= aFirstLayer ) )
if( !start && ( layer != UNDEFINED_LAYER && layer == aFirstLayer ) )
{
start = true;
half = true;
@ -845,7 +846,7 @@ int BOARD_STACKUP::GetLayerDistance( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSec
continue;
// Reached the stop copper layer? we're done
if( start && ( layer != UNDEFINED_LAYER && layer >= aSecondLayer ) )
if( start && ( layer != UNDEFINED_LAYER && layer == aSecondLayer ) )
half = true;
for( int sublayer = 0; sublayer < item->GetSublayersCount(); sublayer++ )
@ -856,7 +857,7 @@ int BOARD_STACKUP::GetLayerDistance( PCB_LAYER_ID aFirstLayer, PCB_LAYER_ID aSec
half = false;
if( layer != UNDEFINED_LAYER && layer >= aSecondLayer )
if( layer != UNDEFINED_LAYER && layer == aSecondLayer )
break;
}

11
pcbnew/widgets/pcb_net_inspector_panel.cpp
View File

@ -705,15 +705,18 @@ unsigned int PCB_NET_INSPECTOR_PANEL::calculateViaLength( const PCB_TRACK* aTrac
{
PCB_LAYER_ID top_layer = UNDEFINED_LAYER;
PCB_LAYER_ID bottom_layer = UNDEFINED_LAYER;
LSET layers = bds.GetEnabledLayers();
for( int layer = via->TopLayer(); layer <= via->BottomLayer(); ++layer )
for( auto layer_it = layers.copper_layers_begin();
layer_it != layers.copper_layers_end();
++layer_it )
{
if( m_brd->GetConnectivity()->IsConnectedOnLayer( via, layer, traceAndPadTypes ) )
if( m_brd->GetConnectivity()->IsConnectedOnLayer( via, *layer_it, traceAndPadTypes ) )
{
if( top_layer == UNDEFINED_LAYER )
top_layer = PCB_LAYER_ID( layer );
top_layer = PCB_LAYER_ID( *layer_it );
else
bottom_layer = PCB_LAYER_ID( layer );
bottom_layer = PCB_LAYER_ID( *layer_it );
}
}