mirror of
https://gitlab.com/kicad/code/kicad.git
synced 2025-04-11 12:40:12 +00:00
Demos update
This commit is contained in:
jean-pierre charras
parent
0474ae86ea
commit
11a96252db
demos
flat_hierarchy
flat_hierarchy.kicad_pcbflat_hierarchy.kicad_proflat_hierarchy.kicad_sch
libs/pic_programmer_fp.pretty
D_DO-35_SOD27_P7.62mm_Horizontal.kicad_modMountingHole_4.3mm_M4_DIN965.kicad_modRV2X4.kicad_modR_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal.kicad_modTO-220-3_Horizontal_TabDown.kicad_modTO-92.kicad_mod
pic_programmer.kicad_schpic_sockets.kicad_schsonde xilinx
stickhub
test_xil_95108
LOADING design file
@ -1,5 +1,6 @@
|
||||
{
|
||||
"board": {
|
||||
"3dviewports": [],
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.049999999999999996,
|
||||
@ -48,7 +49,13 @@
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 2
|
||||
@ -56,31 +63,45 @@
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
"clearance": "error",
|
||||
"connection_width": "ignore",
|
||||
"copper_edge_clearance": "error",
|
||||
"copper_sliver": "warning",
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"footprint": "error",
|
||||
"footprint_type_mismatch": "warning",
|
||||
"hole_clearance": "error",
|
||||
"hole_near_hole": "error",
|
||||
"invalid_outline": "error",
|
||||
"isolated_copper": "warning",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"length_out_of_range": "error",
|
||||
"lib_footprint_issues": "warning",
|
||||
"lib_footprint_mismatch": "warning",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
"npth_inside_courtyard": "ignore",
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||||
"overlapping_pads": "warning",
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||||
"padstack": "error",
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||||
"pth_inside_courtyard": "ignore",
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||||
"shorting_items": "error",
|
||||
"silk_edge_clearance": "warning",
|
||||
"silk_over_copper": "error",
|
||||
"silk_overlap": "error",
|
||||
"skew_out_of_range": "error",
|
||||
"solder_mask_bridge": "error",
|
||||
"starved_thermal": "error",
|
||||
"text_height": "warning",
|
||||
"text_thickness": "warning",
|
||||
"through_hole_pad_without_hole": "error",
|
||||
"too_many_vias": "error",
|
||||
"track_dangling": "warning",
|
||||
"track_width": "error",
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||||
@ -88,7 +109,6 @@
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
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||||
},
|
||||
"rules": {
|
||||
@ -96,23 +116,77 @@
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||||
"allow_microvias": false,
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||||
"max_error": 0.005,
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||||
"min_clearance": 0.0,
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||||
"min_connection": 0.0,
|
||||
"min_copper_edge_clearance": 0.01,
|
||||
"min_hole_clearance": 0.0,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
"min_resolved_spokes": 1,
|
||||
"min_silk_clearance": 0.0,
|
||||
"min_text_height": 0.7999999999999999,
|
||||
"min_text_thickness": 0.12,
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"solder_mask_to_copper_clearance": 0.0,
|
||||
"use_height_for_length_calcs": true
|
||||
},
|
||||
"track_widths": [],
|
||||
"via_dimensions": [],
|
||||
"teardrop_options": [
|
||||
{
|
||||
"td_allow_use_two_tracks": true,
|
||||
"td_curve_segcount": 5,
|
||||
"td_on_pad_in_zone": false,
|
||||
"td_onpadsmd": true,
|
||||
"td_onroundshapesonly": false,
|
||||
"td_ontrackend": false,
|
||||
"td_onviapad": true
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||||
}
|
||||
],
|
||||
"teardrop_parameters": [
|
||||
{
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_target_name": "td_round_shape",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_target_name": "td_rect_shape",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
},
|
||||
{
|
||||
"td_curve_segcount": 0,
|
||||
"td_height_ratio": 1.0,
|
||||
"td_length_ratio": 0.5,
|
||||
"td_maxheight": 2.0,
|
||||
"td_maxlen": 1.0,
|
||||
"td_target_name": "td_track_end",
|
||||
"td_width_to_size_filter_ratio": 0.9
|
||||
}
|
||||
],
|
||||
"track_widths": [
|
||||
0.0
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": true,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
"layer_presets": [],
|
||||
"viewports": []
|
||||
},
|
||||
"boards": [],
|
||||
"cvpcb": {
|
||||
@ -357,9 +431,11 @@
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
|
||||
"version": 3
|
||||
},
|
||||
"net_colors": null
|
||||
"net_colors": null,
|
||||
"netclass_assignments": null,
|
||||
"netclass_patterns": []
|
||||
},
|
||||
"pcbnew": {
|
||||
"last_paths": {
|
||||
@ -375,6 +451,8 @@
|
||||
"schematic": {
|
||||
"annotate_start_num": 0,
|
||||
"drawing": {
|
||||
"dashed_lines_dash_length_ratio": 12.0,
|
||||
"dashed_lines_gap_length_ratio": 3.0,
|
||||
"default_bus_thickness": 12.0,
|
||||
"default_junction_size": 40.0,
|
||||
"default_line_thickness": 6.0,
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||||
@ -410,6 +488,8 @@
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||||
"plot_directory": "",
|
||||
"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
||||
"spice_save_all_currents": false,
|
||||
"spice_save_all_voltages": false,
|
||||
"subpart_first_id": 65,
|
||||
"subpart_id_separator": 0
|
||||
},
|
||||
|
||||
LOADING design file
@ -0,0 +1,71 @@
|
||||
(footprint "D_DO-35_SOD27_P7.62mm_Horizontal" (version 20220818) (generator pcbnew)
|
||||
(layer "F.Cu")
|
||||
(descr "Diode, DO-35_SOD27 series, Axial, Horizontal, pin pitch=7.62mm, , length*diameter=4*2mm^2, , http://www.diodes.com/_files/packages/DO-35.pdf")
|
||||
(tags "Diode DO-35_SOD27 series Axial Horizontal pin pitch 7.62mm length 4mm diameter 2mm")
|
||||
(property "Sheetfile" "Fichier: pic_programmer.kicad_sch")
|
||||
(property "Sheetname" "pic_programmer")
|
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(attr through_hole)
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)
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(pad "2" thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask) (tstamp 9cc9f4e7-1690-4d82-ad10-4ba947084727))
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(model "${KICAD6_3DMODEL_DIR}/Diode_THT.3dshapes/D_DO-35_SOD27_P7.62mm_Horizontal.wrl"
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)
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)
|
||||
@ -0,0 +1,23 @@
|
||||
(footprint "MountingHole_4.3mm_M4_DIN965" (version 20220818) (generator pcbnew)
|
||||
locked (layer "F.Cu")
|
||||
(descr "Mounting Hole 4.3mm, no annular, M4, DIN965")
|
||||
(tags "mounting hole 4.3mm no annular m4 din965")
|
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(layer "F.Cu")
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(descr "TO-92 leads molded, narrow, drill 0.75mm (see NXP sot054_po.pdf)")
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(tags "to-92 sc-43 sc-43a sot54 PA33 transistor")
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(attr through_hole)
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(tstamp 510ceadc-8acf-48ae-9bfb-d5ce0510ffb8)
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)
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(fp_text value "TO-92" (at 1.27 2.79) (layer "F.Fab")
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(effects (font (size 1 1) (thickness 0.15)))
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(tstamp 578cee08-75e2-44ae-a8d1-5b6f932a521b)
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(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 5c428ebe-084c-4465-91c7-5d7afe7fab2d))
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|
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(pad "2" thru_hole circle (at 1.27 -1.27) (size 1.3 1.3) (drill 0.75) (layers *.Cu *.Mask) (tstamp 14c03013-7df3-4cea-a6cc-8967297d8168))
|
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(pad "3" thru_hole circle (at 2.54 0) (size 1.3 1.3) (drill 0.75) (layers *.Cu *.Mask) (tstamp a2e20a5a-84f3-453a-a749-88b94720b57e))
|
||||
(model "${KICAD6_3DMODEL_DIR}/Package_TO_SOT_THT.3dshapes/TO-92.wrl"
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(offset (xyz 0 0 0))
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||||
(scale (xyz 1 1 1))
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(rotate (xyz 0 0 0))
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)
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)
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||||
LOADING design file
LOADING design file
LOADING design file
@ -429,9 +429,11 @@
|
||||
}
|
||||
],
|
||||
"meta": {
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||||
"version": 2
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"version": 3
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||||
},
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"netclass_patterns": []
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},
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"pcbnew": {
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||||
"last_paths": {
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||||
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||||
LOADING design file
LOADING design file
LOADING design file
LOADING design file
@ -441,9 +441,11 @@
|
||||
}
|
||||
],
|
||||
"meta": {
|
||||
"version": 2
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"version": 3
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},
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},
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"pcbnew": {
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"last_paths": {
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||||
LOADING design file
LOADING design file
@ -1,5 +1,6 @@
|
||||
{
|
||||
"board": {
|
||||
"3dviewports": [],
|
||||
"design_settings": {
|
||||
"defaults": {
|
||||
"board_outline_line_width": 0.09999999999999999,
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@ -389,7 +390,7 @@
|
||||
"no_connect_dangling": "warning",
|
||||
"pin_not_connected": "error",
|
||||
"pin_not_driven": "error",
|
||||
"pin_to_pin": "warning",
|
||||
"pin_to_pin": "error",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
@ -427,34 +428,53 @@
|
||||
},
|
||||
{
|
||||
"bus_width": 12.0,
|
||||
"clearance": 0.25,
|
||||
"clearance": 0.2,
|
||||
"diff_pair_gap": 0.25,
|
||||
"diff_pair_via_gap": 0.25,
|
||||
"diff_pair_width": 0.4,
|
||||
"diff_pair_width": 0.2,
|
||||
"line_style": 0,
|
||||
"microvia_diameter": 0.508,
|
||||
"microvia_drill": 0.127,
|
||||
"microvia_diameter": 0.3,
|
||||
"microvia_drill": 0.1,
|
||||
"name": "pwr",
|
||||
"nets": [
|
||||
"+12V",
|
||||
"-12V",
|
||||
"/+12BATT",
|
||||
"/-12BATT",
|
||||
"GND",
|
||||
"VCC"
|
||||
],
|
||||
"pcb_color": "rgba(0, 0, 0, 0.000)",
|
||||
"schematic_color": "rgba(0, 0, 0, 0.000)",
|
||||
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|
||||
"via_diameter": 1.2,
|
||||
"via_drill": 0.6,
|
||||
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|
||||
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|
||||
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|
||||
"wire_width": 6.0
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||||
}
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||||
],
|
||||
"meta": {
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{
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||||
},
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{
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||||
"netclass": "pwr",
|
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"pattern": "-12V"
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},
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{
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"netclass": "pwr",
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||||
"pattern": "/+12BATT"
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||||
},
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||||
{
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||||
"netclass": "pwr",
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"pattern": "/-12BATT"
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},
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{
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||||
"netclass": "pwr",
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"pattern": "GND"
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},
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{
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"netclass": "pwr",
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}
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},
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@ -487,7 +507,7 @@
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"junction_size_choice": 3,
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"label_size_ratio": 0.3,
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"pin_symbol_size": 25.0,
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"text_offset_ratio": 0.3
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"text_offset_ratio": 0.0
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},
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"legacy_lib_dir": "",
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"legacy_lib_list": [],
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||||
@ -508,6 +528,8 @@
|
||||
"plot_directory": "",
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"spice_adjust_passive_values": false,
|
||||
"spice_external_command": "spice \"%I\"",
|
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"spice_save_all_currents": false,
|
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"spice_save_all_voltages": false,
|
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"subpart_first_id": 65,
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"subpart_id_separator": 0
|
||||
},
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||||
|
||||
LOADING design file
Loading…
Reference in New Issue
Block a user