AllSpiceMirrors/kicad
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Allow bus elements to connect

Browse Source 
Previously, bus elements that were not instantiated as individual nets
could not connect to each other.  This caused issues for complex
schematics where busses needed to connect to other busses with elements
that resolved to the same net names.  Functionally, this means mixing
bus elements, which we will replace with first-class elements in version
8 but currently can only be accomplished either by using bus aliases and
  this patch or by individually instantiating each bus element as a
local label

Fixes https://gitlab.com/kicad/code/kicad/issues/14300
This commit is contained in:
Seth Hillbrand 2023-04-04 12:17:17 -07:00
parent c3e6825d62
commit 16b4ec3c7e
11 changed files with 1177 additions and 15 deletions

109
eeschema/connection_graph.cpp
View File

@ -195,7 +195,7 @@ bool CONNECTION_SUBGRAPH::ResolveDrivers( bool aCheckMultipleDrivers )
m_driver_connection->SetDriver( m_driver );
m_driver_connection->ClearDirty();
}
else
else if( !m_is_bus_member )
{
m_driver_connection = nullptr;
}
@ -246,7 +246,36 @@ wxString CONNECTION_SUBGRAPH::GetNetName() const
}
std::vector<SCH_ITEM*> CONNECTION_SUBGRAPH::GetBusLabels() const
std::vector<SCH_ITEM*> CONNECTION_SUBGRAPH::GetAllBusLabels() const
{
std::vector<SCH_ITEM*> labels;
for( SCH_ITEM* item : m_drivers )
{
switch( item->Type() )
{
case SCH_LABEL_T:
case SCH_GLOBAL_LABEL_T:
{
CONNECTION_TYPE type = item->Connection( &m_sheet )->Type();
// Only consider bus vectors
if( type == CONNECTION_TYPE::BUS || type == CONNECTION_TYPE::BUS_GROUP )
labels.push_back( item );
break;
}
default:
break;
}
}
return labels;
}
std::vector<SCH_ITEM*> CONNECTION_SUBGRAPH::GetVectorBusLabels() const
{
std::vector<SCH_ITEM*> labels;
@ -973,6 +1002,57 @@ void CONNECTION_GRAPH::collectAllDriverValues()
}
void CONNECTION_GRAPH::generateBusAliasMembers()
{
std::vector<CONNECTION_SUBGRAPH*> new_subgraphs;
SCH_CONNECTION dummy( this );
for( auto&& subgraph : m_driver_subgraphs )
{
auto vec = subgraph->GetAllBusLabels();
for( auto& item : vec )
{
SCH_LABEL_BASE* label = static_cast<SCH_LABEL_BASE*>( item );
dummy.ConfigureFromLabel( label->GetText() );
wxLogTrace( ConnTrace, wxS( "new bus label (%s)" ), label->GetText() );
for( auto& conn : dummy.Members() )
{
wxString name = conn->FullLocalName();
CONNECTION_SUBGRAPH* new_sg = new CONNECTION_SUBGRAPH( this );
SCH_CONNECTION* new_conn = new SCH_CONNECTION( this );
new_conn->SetName( name );
new_conn->SetType( CONNECTION_TYPE::NET );
int code = assignNewNetCode( *new_conn );
wxLogTrace( ConnTrace, wxS( "SG(%ld), Adding full local name (%s) with sg (%d)" ), subgraph->m_code,
name, code );
new_sg->m_driver_connection = new_conn;
new_sg->m_code = m_last_subgraph_code++;
new_sg->m_sheet = subgraph->GetSheet();
new_sg->m_is_bus_member = true;
new_sg->m_strong_driver = true;
/// Need to figure out why these sgs are not getting connected to their bus parents
NET_NAME_CODE_CACHE_KEY key = { new_sg->GetNetName(), code };
m_net_code_to_subgraphs_map[ key ].push_back( new_sg );
m_net_name_to_subgraphs_map[ name ].push_back( new_sg );
m_subgraphs.push_back( new_sg );
new_subgraphs.push_back( new_sg );
}
}
}
std::copy( new_subgraphs.begin(), new_subgraphs.end(), std::back_inserter( m_driver_subgraphs ) );
}
void CONNECTION_GRAPH::generateGlobalPowerPinSubGraphs()
{
// Generate subgraphs for global power pins. These will be merged with other subgraphs
@ -1125,7 +1205,7 @@ void CONNECTION_GRAPH::processSubGraphs()
name = new_name;
}
else
else if( subgraph->m_driver )
{
// If there is no conflict, promote sheet pins to be strong drivers so that they
// will be considered below for propagation/merging.
@ -1366,7 +1446,8 @@ void CONNECTION_GRAPH::processSubGraphs()
if( subgraph->m_absorbed )
continue;
subgraph->ResolveDrivers();
if( !subgraph->ResolveDrivers() )
continue;
if( subgraph->m_driver_connection->IsBus() )
assignNetCodesToBus( subgraph->m_driver_connection );
@ -1423,6 +1504,8 @@ void CONNECTION_GRAPH::buildConnectionGraph( std::function<void( SCH_ITEM* )>* a
generateGlobalPowerPinSubGraphs();
generateBusAliasMembers();
PROF_TIMER proc_sub_graph( "ProcessSubGraphs" );
processSubGraphs();
@ -1621,7 +1704,7 @@ void CONNECTION_GRAPH::buildConnectionGraph( std::function<void( SCH_ITEM* )>* a
// As a visual aid, we can check sheet pins that are driven by themselves to see
// if they should be promoted to buses
if( subgraph->m_driver->Type() == SCH_SHEET_PIN_T )
if( subgraph->m_driver && subgraph->m_driver->Type() == SCH_SHEET_PIN_T )
{
SCH_SHEET_PIN* pin = static_cast<SCH_SHEET_PIN*>( subgraph->m_driver );
@ -1746,22 +1829,30 @@ void CONNECTION_GRAPH::buildConnectionGraph( std::function<void( SCH_ITEM* )>* a
}
int CONNECTION_GRAPH::assignNewNetCode( SCH_CONNECTION& aConnection )
int CONNECTION_GRAPH::getOrCreateNetCode( const wxString& aNetName )
{
int code;
auto it = m_net_name_to_code_map.find( aConnection.Name() );
auto it = m_net_name_to_code_map.find( aNetName );
if( it == m_net_name_to_code_map.end() )
{
code = m_last_net_code++;
m_net_name_to_code_map[ aConnection.Name() ] = code;
m_net_name_to_code_map[ aNetName ] = code;
}
else
{
code = it->second;
}
return code;
}
int CONNECTION_GRAPH::assignNewNetCode( SCH_CONNECTION& aConnection )
{
int code = getOrCreateNetCode( aConnection.Name() );
aConnection.SetNetCode( code );
return code;
@ -2241,7 +2332,7 @@ std::vector<const CONNECTION_SUBGRAPH*> CONNECTION_GRAPH::GetBusesNeedingMigrati
if( !connection->IsBus() )
continue;
auto labels = subgraph->GetBusLabels();
auto labels = subgraph->GetVectorBusLabels();
if( labels.size() > 1 )
{

26
eeschema/connection_graph.h
View File

@ -76,6 +76,7 @@ public:
m_graph( aGraph ),
m_dirty( false ),
m_absorbed( false ),
m_is_bus_member( false ),
m_absorbed_by( nullptr ),
m_code( -1 ),
m_multiple_drivers( false ),
@ -110,8 +111,11 @@ public:
*/
wxString GetNetName() const;
/// Returns all the bus labels attached to this subgraph (if any)
std::vector<SCH_ITEM*> GetBusLabels() const;
/// Returns all the vector-based bus labels attached to this subgraph (if any)
std::vector<SCH_ITEM*> GetVectorBusLabels() const;
/// Returns all the all bus labels attached to this subgraph (if any)
std::vector<SCH_ITEM*> GetAllBusLabels() const;
/// Returns the candidate net name for a driver
const wxString& GetNameForDriver( SCH_ITEM* aItem ) const;
@ -197,6 +201,12 @@ private:
/// True if this subgraph has been absorbed into another. No pointers here are safe if so!
bool m_absorbed;
/**
* True if the subgraph is not actually part of a net. These are created for bus members
* to ensure that bus-to-bus connection happens but they don't have any valid data
*/
bool m_is_bus_member;
/// If this subgraph is absorbed, points to the absorbing (and valid) subgraph
CONNECTION_SUBGRAPH* m_absorbed_by;
@ -461,6 +471,11 @@ private:
*/
void generateGlobalPowerPinSubGraphs();
/**
* Iterate through labels to create placeholders for bus elements
*/
void generateBusAliasMembers();
/**
* Process all subgraphs to assign netcodes and merge subgraphs based on labels
*/
@ -473,6 +488,13 @@ private:
*/
int assignNewNetCode( SCH_CONNECTION& aConnection );
/**
*
* @param aNetName string with the netname for coding
* @return existing netcode (if it exists) or newly created one
*/
int getOrCreateNetCode( const wxString& aNetName );
/**
* Ensures all members of the bus connection have a valid net code assigned
* @param aConnection is a bus connection

4
eeschema/dialogs/dialog_migrate_buses.cpp
View File

@ -84,7 +84,7 @@ void DIALOG_MIGRATE_BUSES::loadGraphData()
status.subgraph = subgraph;
status.approved = false;
std::vector<SCH_ITEM*> labels = subgraph->GetBusLabels();
std::vector<SCH_ITEM*> labels = subgraph->GetVectorBusLabels();
wxASSERT( labels.size() > 1 );
for( SCH_ITEM* label : labels )
@ -205,7 +205,7 @@ void DIALOG_MIGRATE_BUSES::onAcceptClicked( wxCommandEvent& aEvent )
m_items[sel].approved_label = m_cb_new_name->GetStringSelection();
m_items[sel].approved = true;
std::vector<SCH_ITEM*> labels = m_items[sel].subgraph->GetBusLabels();
std::vector<SCH_ITEM*> labels = m_items[sel].subgraph->GetVectorBusLabels();
for( SCH_ITEM* label : labels )
static_cast<SCH_LABEL_BASE*>( label )->SetText( m_items[sel].approved_label );

qa/data/eeschema/netlists/bus_connection/a.kicad_sch
Normal file
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LOADING design file

qa/data/eeschema/netlists/bus_connection/a2.kicad_sch
Normal file
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LOADING design file

qa/data/eeschema/netlists/bus_connection/b.kicad_sch
Normal file
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LOADING design file

411
qa/data/eeschema/netlists/bus_connection/bus_connection.kicad_pro Normal file
View File

@ -0,0 +1,411 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"other_line_width": 0.15,
"silk_line_width": 0.15,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"rules": {
"min_copper_edge_clearance": 0.0,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
},
"track_widths": [],
"via_dimensions": []
},
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "error",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "bus_connection.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6
}
],
"meta": {
"version": 3
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
"bom_settings": {
"exclude_dnp": false,
"fields_ordered": [
{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
},
{
"group_by": false,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Qty",
"name": "Quantity",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"name": "Grouped By Value",
"sort_asc": true,
"sort_field": "Reference"
},
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "KiCad",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "",
"plot_directory": ".",
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"3082b26f-b83d-4458-bb0e-9c16987db84d",
""
],
[
"409e30f5-e026-4121-aa4f-ead0fa3cc75d",
"a"
],
[
"8e047953-57e8-499d-89c7-aaeb7ad61c51",
"a2"
],
[
"2866a517-6cac-46c4-af83-6d16fab5045c",
"b"
]
],
"text_variables": {}
}

qa/data/eeschema/netlists/bus_connection/bus_connection.kicad_sch
Normal file
View File

LOADING design file

113
qa/data/eeschema/netlists/bus_connection/bus_connection.net Normal file
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@ -0,0 +1,113 @@
(export (version "E")
(design
(source "/tmp/bus_connection/bus_connection.kicad_sch")
(date "Tue 04 Apr 2023 03:12:09 PM PDT")
(tool "Eeschema 7.99.0-693-ge4714b9abf-dirty")
(sheet (number "1") (name "/") (tstamps "/")
(title_block
(title)
(company)
(rev)
(date)
(source "bus_connection.kicad_sch")
(comment (number "1") (value ""))
(comment (number "2") (value ""))
(comment (number "3") (value ""))
(comment (number "4") (value ""))
(comment (number "5") (value ""))
(comment (number "6") (value ""))
(comment (number "7") (value ""))
(comment (number "8") (value ""))
(comment (number "9") (value ""))))
(sheet (number "2") (name "/a/") (tstamps "/409e30f5-e026-4121-aa4f-ead0fa3cc75d/")
(title_block
(title)
(company)
(rev)
(date)
(source "a.kicad_sch")
(comment (number "1") (value ""))
(comment (number "2") (value ""))
(comment (number "3") (value ""))
(comment (number "4") (value ""))
(comment (number "5") (value ""))
(comment (number "6") (value ""))
(comment (number "7") (value ""))
(comment (number "8") (value ""))
(comment (number "9") (value ""))))
(sheet (number "3") (name "/a2/") (tstamps "/8e047953-57e8-499d-89c7-aaeb7ad61c51/")
(title_block
(title)
(company)
(rev)
(date)
(source "a2.kicad_sch")
(comment (number "1") (value ""))
(comment (number "2") (value ""))
(comment (number "3") (value ""))
(comment (number "4") (value ""))
(comment (number "5") (value ""))
(comment (number "6") (value ""))
(comment (number "7") (value ""))
(comment (number "8") (value ""))
(comment (number "9") (value ""))))
(sheet (number "4") (name "/a2/b/") (tstamps "/8e047953-57e8-499d-89c7-aaeb7ad61c51/2866a517-6cac-46c4-af83-6d16fab5045c/")
(title_block
(title)
(company)
(rev)
(date)
(source "b.kicad_sch")
(comment (number "1") (value ""))
(comment (number "2") (value ""))
(comment (number "3") (value ""))
(comment (number "4") (value ""))
(comment (number "5") (value ""))
(comment (number "6") (value ""))
(comment (number "7") (value ""))
(comment (number "8") (value ""))
(comment (number "9") (value "")))))
(components
(comp (ref "J1")
(value "Conn_01x03")
(libsource (lib "~ Connector_Generic") (part "Conn_01x03") (description "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(property (name "Sheetname") (value "a"))
(property (name "Sheetfile") (value "a.kicad_sch"))
(property (name "ki_description") (value "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(property (name "ki_keywords") (value "connector"))
(sheetpath (names "/a/") (tstamps "/409e30f5-e026-4121-aa4f-ead0fa3cc75d/"))
(tstamps "b606574e-10df-4dfe-9667-bc4a052fb03b"))
(comp (ref "J2")
(value "Conn_01x03")
(libsource (lib "~ Connector_Generic") (part "Conn_01x03") (description "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(property (name "Sheetname") (value "b"))
(property (name "Sheetfile") (value "b.kicad_sch"))
(property (name "ki_description") (value "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(property (name "ki_keywords") (value "connector"))
(sheetpath (names "/a2/b/") (tstamps "/8e047953-57e8-499d-89c7-aaeb7ad61c51/2866a517-6cac-46c4-af83-6d16fab5045c/"))
(tstamps "7237f2f6-7a70-470a-83e2-356d7d23087b")))
(libparts
(libpart (lib "~ Connector_Generic") (part "Conn_01x03")
(description "Generic connector, single row, 01x03, script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs "~")
(footprints
(fp "Connector*:*_1x??_*"))
(fields
(field (name "Reference") "J")
(field (name "Value") "Conn_01x03")
(field (name "Datasheet") "~"))
(pins
(pin (num "1") (name "Pin_1") (type "passive"))
(pin (num "2") (name "Pin_2") (type "passive"))
(pin (num "3") (name "Pin_3") (type "passive")))))
(libraries)
(nets
(net (code "8") (name "/test.x")
(node (ref "J1") (pin "1") (pinfunction "Pin_1") (pintype "passive"))
(node (ref "J2") (pin "1") (pinfunction "Pin_1") (pintype "passive")))
(net (code "9") (name "/test.z")
(node (ref "J1") (pin "3") (pinfunction "Pin_3") (pintype "passive"))
(node (ref "J2") (pin "3") (pinfunction "Pin_3") (pintype "passive")))
(net (code "10") (name "/top.y")
(node (ref "J1") (pin "2") (pinfunction "Pin_2") (pintype "passive"))
(node (ref "J2") (pin "2") (pinfunction "Pin_2") (pintype "passive")))))

6
qa/unittests/eeschema/test_netlist_exporter_kicad.cpp
View File

@ -179,4 +179,10 @@ BOOST_AUTO_TEST_CASE( HierNoConnect )
}
BOOST_AUTO_TEST_CASE( BusConnection )
{
TestNetlist( "bus_connection" );
}
BOOST_AUTO_TEST_SUITE_END()

8
qa/unittests/eeschema/test_netlists.cpp
View File

@ -20,8 +20,7 @@
#include <qa_utils/wx_utils/unit_test_utils.h>
#include "eeschema_test_utils.h"
class TEST_NETLIST_EXPORTER_KICAD_FIXTURE : publc TEST_NETLIST_EXPORTER_FIXTURE<NETLIST_EXPORTER_KICAD>
class TEST_NETLIST_EXPORTER_KICAD_FIXTURE : public TEST_NETLIST_EXPORTER_FIXTURE<NETLIST_EXPORTER_KICAD>
{
public:
void CompareNetlists() override
@ -181,4 +180,9 @@ BOOST_AUTO_TEST_CASE( LegacyPower4 )
doNetlistTest( "legacy_power4" );
}
BOOST_AUTO_TEST_CASE( BusConnections )
{
doNetlistTest( "bus_connection" );
}
BOOST_AUTO_TEST_SUITE_END()