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https://gitlab.com/kicad/code/kicad.git
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Demos update
This commit is contained in:
jean-pierre charras
parent
38455c25ef
commit
2d282b8b19
demos
custom_pads_test
flat_hierarchy
flat_hierarchy.kicad_pcbflat_hierarchy.kicad_proflat_hierarchy.kicad_schflat_hierarchy.proflat_hierarchy.schpic_programmer.kicad_schpic_sockets.kicad_sch
kit-dev-coldfire-xilinx_5213
test_pads_inside_pads
LOADING design file
@ -48,7 +48,13 @@
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"min_clearance": 0.508
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}
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},
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"diff_pair_dimensions": [],
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"diff_pair_dimensions": [
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{
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"gap": 0.0,
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"via_gap": 0.0,
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"width": 0.0
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}
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],
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"drc_exclusions": [],
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"meta": {
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"version": 1
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@ -60,7 +66,7 @@
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_too_small": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"hole_clearance": "error",
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@ -68,10 +74,9 @@
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"keepout": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_too_small": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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@ -89,7 +94,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"via_hole_larger_than_pad": "error",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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@ -99,6 +103,7 @@
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.01,
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"min_hole_clearance": 0.0,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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@ -110,10 +115,17 @@
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"solder_paste_clearance": 0.0,
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"solder_paste_margin_ratio": 0.0
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"solder_paste_margin_ratio": -0.0
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},
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"track_widths": [],
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"via_dimensions": [],
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"track_widths": [
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0.0
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],
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"via_dimensions": [
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{
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"diameter": 0.0,
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"drill": 0.0
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}
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],
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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},
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LOADING design file
@ -60,7 +60,7 @@
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_too_small": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"hole_clearance": "error",
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@ -68,10 +68,9 @@
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"keepout": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_too_small": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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@ -89,7 +88,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"via_hole_larger_than_pad": "error",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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@ -99,6 +97,7 @@
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.01,
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"min_hole_clearance": 0.0,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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@ -124,6 +123,7 @@
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"equivalence_files": []
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},
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"erc": {
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"erc_exclusions": [],
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"meta": {
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"version": 0
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},
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@ -377,7 +377,7 @@
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},
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"sheets": [
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[
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"98534e61-3bfa-407b-930d-dbcb716b8f23",
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"00000000-0000-0000-0000-000048553e53",
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""
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],
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[
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LOADING design file
@ -1,79 +0,0 @@
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update=21/11/2017 21:18:56
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last_client=kicad
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[general]
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version=1
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RootSch=pic_programmer.sch
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BoardNm=pic_programmer.brd
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[common]
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NetDir=
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[pcbnew]
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version=1
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PadDril=400
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PadDimH=700
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PadDimV=700
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PadForm=1
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PadMask=14745599
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ViaDiam=650
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ViaDril=250
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Isol=100
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Countlayer=2
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Lpiste=250
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RouteTo=15
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RouteBo=0
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TypeVia=3
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Segm45=1
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Racc45=1
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Unite=0
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SegFill=1
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SegAffG=0
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NewAffG=1
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PadFill=1
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PadAffG=1
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PadSNum=1
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ModAffC=1
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ModAffT=1
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PcbAffT=1
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SgPcb45=1
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TxtPcbV=800
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TxtPcbH=600
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TxtModV=600
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TxtModH=600
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TxtModW=120
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HPGLnum=1
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HPGdiam=15
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HPGLSpd=20
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HPGLrec=2
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HPGLorg=0
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GERBmin=15
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VEgarde=100
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DrawLar=150
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EdgeLar=150
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TxtLar=120
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MSegLar=150
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ForPlot=1
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WpenSer=10
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UserGrX=0,01
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UserGrY=0,01
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UserGrU=1
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DivGrPc=1
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TimeOut=600
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MaxLnkS=3
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ShowRat=0
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ShowMRa=1
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[pcbnew/libraries]
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LibName1=connect
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LibName2=discret
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LibName3=pin_array
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LibName4=divers
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LibName5=libcms
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LibName6=display
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LibName7=dip_sockets
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LibDir=
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[cvpcb]
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version=1
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NetIExt=.net
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[cvpcb/libraries]
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EquName1=devcms
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[eeschema]
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version=1
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LibDir=
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@ -1,29 +0,0 @@
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EESchema Schematic File Version 4
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LIBS:flat_hierarchy-cache
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EELAYER 26 0
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EELAYER END
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$Descr A4 11693 8268
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encoding utf-8
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Sheet 1 3
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Title ""
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Date "Sun 22 Mar 2015"
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Rev "1"
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Comp ""
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Comment1 ""
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Comment2 ""
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Comment3 ""
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Comment4 ""
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$EndDescr
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$Sheet
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S 5600 2600 2100 1700
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U 48553E7C
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F0 "sockets" 60
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F1 "pic_sockets.sch" 60
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$EndSheet
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$Sheet
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S 3200 2600 1650 1700
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U 48553E53
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F0 "pic_programmer" 60
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F1 "pic_programmer.sch" 60
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$EndSheet
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$EndSCHEMATC
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LOADING design file
LOADING design file
LOADING design file
@ -66,7 +66,7 @@
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_too_small": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"hole_clearance": "error",
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@ -74,10 +74,9 @@
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"keepout": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_too_small": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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@ -95,7 +94,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"via_hole_larger_than_pad": "error",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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@ -107,6 +105,7 @@
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.01,
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"min_hole_clearance": 0.0,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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@ -115,20 +114,20 @@
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"min_track_width": 0.19812,
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"min_via_annular_width": 0.049999999999999996,
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"min_via_diameter": 0.5,
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"solder_mask_clearance": 0.19999999999999998,
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"solder_mask_clearance": 0.08,
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"solder_mask_min_width": 0.0,
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"solder_paste_clearance": 0.0,
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"solder_paste_margin_ratio": -0.0
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},
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"track_widths": [
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0.2,
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0.0,
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0.3,
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0.4
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],
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"via_dimensions": [
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{
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"diameter": 0.6,
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"drill": 0.4
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"diameter": 0.0,
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"drill": 0.0
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}
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],
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"zones_allow_external_fillets": false,
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@ -141,6 +140,7 @@
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"equivalence_files": []
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},
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"erc": {
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"erc_exclusions": [],
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"meta": {
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"version": 0
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},
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LOADING design file
@ -60,7 +60,7 @@
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_too_small": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"hole_clearance": "error",
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@ -68,10 +68,9 @@
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"keepout": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_too_small": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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@ -89,7 +88,6 @@
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"via_hole_larger_than_pad": "error",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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@ -99,6 +97,7 @@
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.01,
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"min_hole_clearance": 0.0,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.508,
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"min_microvia_drill": 0.127,
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