diff --git a/common/drc_rules.keywords b/common/drc_rules.keywords index ecb7d71bd0..25b112fe70 100644 --- a/common/drc_rules.keywords +++ b/common/drc_rules.keywords @@ -15,6 +15,7 @@ error exclusion footprint graphic +group_matched hole hole_clearance hole_size @@ -55,5 +56,6 @@ via via_count via_diameter warning +within_diff_pairs zone zone_connection diff --git a/pcbnew/dialogs/panel_setup_rules.cpp b/pcbnew/dialogs/panel_setup_rules.cpp index a1fccabf66..67247c9049 100644 --- a/pcbnew/dialogs/panel_setup_rules.cpp +++ b/pcbnew/dialogs/panel_setup_rules.cpp @@ -237,10 +237,42 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent ) || token == wxT( "via" ) || token == wxT( "zone" ); }; + + auto isConstraintTypeToken = + []( const wxString& token ) -> bool + { + return token == wxT( "annular_width" ) + || token == wxT( "assertion" ) + || token == wxT( "clearance" ) + || token == wxT( "connection_width" ) + || token == wxT( "courtyard_clearance" ) + || token == wxT( "diff_pair_gap" ) + || token == wxT( "diff_pair_uncoupled" ) + || token == wxT( "disallow" ) + || token == wxT( "edge_clearance" ) + || token == wxT( "length" ) + || token == wxT( "hole_clearance" ) + || token == wxT( "hole_size" ) + || token == wxT( "hole_to_hole" ) + || token == wxT( "min_resolved_spokes" ) + || token == wxT( "physical_clearance" ) + || token == wxT( "physical_hole_clearance" ) + || token == wxT( "silk_clearance" ) + || token == wxT( "skew" ) + || token == wxT( "text_height" ) + || token == wxT( "text_thickness" ) + || token == wxT( "thermal_relief_gap" ) + || token == wxT( "thermal_spoke_width" ) + || token == wxT( "track_width" ) + || token == wxT( "via_count" ) + || token == wxT( "via_diameter" ) + || token == wxT( "zone_connection" ); + }; std::stack<wxString> sexprs; wxString partial; wxString last; + wxString constraintType; int context = NONE; int expr_context = NONE; @@ -313,7 +345,18 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent ) } if( !sexprs.empty() ) - sexprs.pop(); + { + // Ignore argument-less tokens + if( partial != wxT( "group_matched" ) && partial != wxT( "within_diff_pairs" ) ) + { + if( sexprs.top() == wxT( "constraint" ) ) + { + constraintType = wxEmptyString; + } + + sexprs.pop(); + } + } context = NONE; } @@ -364,6 +407,10 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent ) context = SEXPR_STRING; continue; } + else if( isConstraintTypeToken( partial ) ) + { + constraintType = partial; + } context = NONE; } @@ -391,7 +438,10 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent ) } else if( sexprs.top() == wxT( "constraint" ) ) { - tokens = wxT( "max|min|opt" ); + if( constraintType == wxT( "skew" ) ) + tokens = wxT( "max|min|opt|group_matched|within_diff_pairs" ); + else + tokens = wxT( "max|min|opt" ); } } else if( context == SEXPR_TOKEN ) diff --git a/pcbnew/drc/drc_length_report.h b/pcbnew/drc/drc_length_report.h index 1e8654cf64..33e4325f29 100644 --- a/pcbnew/drc/drc_length_report.h +++ b/pcbnew/drc/drc_length_report.h @@ -31,6 +31,7 @@ public: { int netcode; wxString netname; + NETINFO_ITEM* netinfo; BOARD_CONNECTED_ITEM* fromItem; BOARD_CONNECTED_ITEM* toItem; DRC_RULE* matchingRule; diff --git a/pcbnew/drc/drc_rule.h b/pcbnew/drc/drc_rule.h index d38c1a9ce5..04d937fec0 100644 --- a/pcbnew/drc/drc_rule.h +++ b/pcbnew/drc/drc_rule.h @@ -24,6 +24,7 @@ #ifndef DRC_RULE_H #define DRC_RULE_H +#include <bitset> #include <kiid.h> #include <core/typeinfo.h> #include <optional> @@ -134,6 +135,12 @@ class DRC_CONSTRAINT { } + enum class OPTIONS : std::size_t + { + SKEW_GROUP_MATCHED = 0, + SKEW_WITHIN_DIFF_PAIRS = 1 + }; + bool IsNull() const { return m_Type == NULL_CONSTRAINT; @@ -168,6 +175,13 @@ class DRC_CONSTRAINT return RPT_SEVERITY_UNDEFINED; } + void SetOption( OPTIONS option ) { m_options.set( static_cast<std::size_t>( option ), true ); } + + bool GetOption( OPTIONS option ) const + { + return m_options.test( static_cast<std::size_t>( option ) ); + } + public: DRC_CONSTRAINT_T m_Type; MINOPTMAX<int> m_Value; @@ -178,6 +192,7 @@ public: private: wxString m_name; // For just-in-time constraints DRC_RULE* m_parentRule; // For constraints found in rules + std::bitset<2> m_options; // Constraint-specific option bits }; diff --git a/pcbnew/drc/drc_rule_parser.cpp b/pcbnew/drc/drc_rule_parser.cpp index 601c79f271..c65c1310f8 100644 --- a/pcbnew/drc/drc_rule_parser.cpp +++ b/pcbnew/drc/drc_rule_parser.cpp @@ -482,6 +482,50 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule ) switch( token ) { + case T_group_matched: + if( c.m_Type != SKEW_CONSTRAINT ) + { + reportError( _( "group_matched option invalid for constraint type." ) ); + break; + } + + if( c.GetOption( DRC_CONSTRAINT::OPTIONS::SKEW_WITHIN_DIFF_PAIRS ) ) + { + reportError( _( "within_diff_pairs argument already set for skew constraint." ) ); + break; + } + + c.SetOption( DRC_CONSTRAINT::OPTIONS::SKEW_GROUP_MATCHED ); + + if( (int) NextTok() != DSN_RIGHT ) + { + reportError( wxString::Format( _( "Unrecognized item '%s'." ), FromUTF8() ) ); + parseUnknown(); + } + + break; + case T_within_diff_pairs: + if( c.m_Type != SKEW_CONSTRAINT ) + { + reportError( _( "within_diff_pairs option invalid for constraint type." ) ); + break; + } + + if( c.GetOption( DRC_CONSTRAINT::OPTIONS::SKEW_GROUP_MATCHED ) ) + { + reportError( _( "group_matched argument already set for skew constraint." ) ); + break; + } + + c.SetOption( DRC_CONSTRAINT::OPTIONS::SKEW_WITHIN_DIFF_PAIRS ); + + if( (int) NextTok() != DSN_RIGHT ) + { + reportError( wxString::Format( _( "Unrecognized item '%s'." ), FromUTF8() ) ); + parseUnknown(); + } + + break; case T_min: token = NextTok(); diff --git a/pcbnew/drc/drc_test_provider_matched_length.cpp b/pcbnew/drc/drc_test_provider_matched_length.cpp index da276a0179..39a63a6d7b 100644 --- a/pcbnew/drc/drc_test_provider_matched_length.cpp +++ b/pcbnew/drc/drc_test_provider_matched_length.cpp @@ -140,58 +140,103 @@ void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkLengths( const DRC_CONSTRAINT& aCons void DRC_TEST_PROVIDER_MATCHED_LENGTH::checkSkews( const DRC_CONSTRAINT& aConstraint, const std::vector<CONNECTION>& aMatchedConnections ) { - double avgLength = 0; - - for( const DRC_LENGTH_REPORT::ENTRY& ent : aMatchedConnections ) - avgLength += ent.total; - - avgLength /= (double) aMatchedConnections.size(); - - for( const auto& ent : aMatchedConnections ) + auto checkSkewsImpl = [this, &aConstraint]( const std::vector<CONNECTION>& connections ) { - int skew = KiROUND( ent.total - avgLength ); - bool fail_min = false; - bool fail_max = false; + double maxLength = 0; + wxString maxNetname; - if( aConstraint.GetValue().HasMax() && abs( skew ) > aConstraint.GetValue().Max() ) - fail_max = true; - else if( aConstraint.GetValue().HasMin() && abs( skew ) < aConstraint.GetValue().Min() ) - fail_min = true; - - if( fail_min || fail_max ) + for( const DRC_LENGTH_REPORT::ENTRY& ent : connections ) { - std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SKEW_OUT_OF_RANGE ); - wxString msg; - - if( fail_min ) + if( ent.total > maxLength ) { - msg.Printf( _( "(%s min skew %s; actual %s; average net length %s; actual %s)" ), - aConstraint.GetName(), - MessageTextFromValue( aConstraint.GetValue().Min() ), - MessageTextFromValue( skew ), - MessageTextFromValue( avgLength ), - MessageTextFromValue( ent.total ) ); + maxLength = ent.total; + maxNetname = ent.netname; } - else - { - msg.Printf( _( "(%s max skew %s; actual %s; average net length %s; actual %s)" ), - aConstraint.GetName(), - MessageTextFromValue( aConstraint.GetValue().Max() ), - MessageTextFromValue( skew ), - MessageTextFromValue( avgLength ), - MessageTextFromValue( ent.total ) ); - } - - drcItem->SetErrorMessage( drcItem->GetErrorText() + " " + msg ); - - for( BOARD_CONNECTED_ITEM* offendingTrack : ent.items ) - drcItem->SetItems( offendingTrack ); - - drcItem->SetViolatingRule( aConstraint.GetParentRule() ); - - reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(), - ( *ent.items.begin() )->GetLayer() ); } + + for( const auto& ent : connections ) + { + int skew = KiROUND( ent.total - maxLength ); + bool fail_min = false; + bool fail_max = false; + + if( aConstraint.GetValue().HasMax() && abs( skew ) > aConstraint.GetValue().Max() ) + fail_max = true; + else if( aConstraint.GetValue().HasMin() && abs( skew ) < aConstraint.GetValue().Min() ) + fail_min = true; + + if( fail_min || fail_max ) + { + std::shared_ptr<DRC_ITEM> drcItem = DRC_ITEM::Create( DRCE_SKEW_OUT_OF_RANGE ); + wxString msg; + + if( fail_min ) + { + msg.Printf( _( "(%s min skew %s; actual %s; target net length %s (from %s); " + "actual %s)" ), + aConstraint.GetName(), + MessageTextFromValue( aConstraint.GetValue().Min() ), + MessageTextFromValue( skew ), MessageTextFromValue( maxLength ), + maxNetname, MessageTextFromValue( ent.total ) ); + } + else + { + msg.Printf( _( "(%s max skew %s; actual %s; target net length %s (from %s); " + "actual %s)" ), + aConstraint.GetName(), + MessageTextFromValue( aConstraint.GetValue().Max() ), + MessageTextFromValue( skew ), MessageTextFromValue( maxLength ), + maxNetname, MessageTextFromValue( ent.total ) ); + } + + drcItem->SetErrorMessage( drcItem->GetErrorText() + " " + msg ); + + for( BOARD_CONNECTED_ITEM* offendingTrack : ent.items ) + drcItem->SetItems( offendingTrack ); + + drcItem->SetViolatingRule( aConstraint.GetParentRule() ); + + reportViolation( drcItem, ( *ent.items.begin() )->GetPosition(), + ( *ent.items.begin() )->GetLayer() ); + } + } + }; + + if( aConstraint.GetOption( DRC_CONSTRAINT::OPTIONS::SKEW_WITHIN_DIFF_PAIRS ) ) + { + // Find all pairs of nets in the matched connections + std::map<int, CONNECTION> netcodeMap; + + for( const DRC_LENGTH_REPORT::ENTRY& ent : aMatchedConnections ) + netcodeMap[ent.netcode] = ent; + + std::vector<std::vector<CONNECTION>> matchedDiffPairs; + + for( auto& [netcode, connection] : netcodeMap ) + { + NETINFO_ITEM* matchedNet = m_board->DpCoupledNet( connection.netinfo ); + + if( matchedNet ) + { + int matchedNetcode = matchedNet->GetNetCode(); + + if( netcodeMap.count( matchedNetcode ) ) + { + std::vector<CONNECTION> pair{ connection, netcodeMap[matchedNetcode] }; + matchedDiffPairs.emplace_back( std::move( pair ) ); + netcodeMap.erase( matchedNetcode ); + } + } + } + + // Test all found pairs of nets + for( const std::vector<CONNECTION>& matchedDiffPair : matchedDiffPairs ) + checkSkewsImpl( matchedDiffPair ); + } + else + { + // Test all matched nets as a group + checkSkewsImpl( aMatchedConnections ); } } @@ -315,6 +360,7 @@ bool DRC_TEST_PROVIDER_MATCHED_LENGTH::runInternal( bool aDelayReportMode ) ent.items = nitem.second; ent.netcode = nitem.first; ent.netname = m_board->GetNetInfo().GetNetItem( ent.netcode )->GetNetname(); + ent.netinfo = m_board->GetNetInfo().GetNetItem( ent.netcode ); ent.viaCount = 0; ent.totalRoute = 0; diff --git a/qa/data/pcbnew/skew_group_matched_drc.kicad_dru b/qa/data/pcbnew/skew_group_matched_drc.kicad_dru new file mode 100644 index 0000000000..0e745c9ba2 --- /dev/null +++ b/qa/data/pcbnew/skew_group_matched_drc.kicad_dru @@ -0,0 +1,6 @@ +(version 1) + +(rule diff_skew + (constraint skew (max 3mil) (group_matched)) + (condition "A.hasNetclass('DIFF_PAIR')") +) diff --git a/qa/data/pcbnew/skew_group_matched_drc.kicad_pcb b/qa/data/pcbnew/skew_group_matched_drc.kicad_pcb new file mode 100644 index 0000000000..e9915aab00 --- /dev/null +++ b/qa/data/pcbnew/skew_group_matched_drc.kicad_pcb @@ -0,0 +1,2803 @@ +(kicad_pcb + (version 20240706) + (generator "pcbnew") + (generator_version "8.99") + (general + (thickness 1.6) + (legacy_teardrops no) + ) + (paper "A4") + (layers + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user 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}, + "bom_presets": [], + "bom_settings": { + "exclude_dnp": false, + "fields_ordered": [ + { + "group_by": false, + "label": "Reference", + "name": "Reference", + "show": true + }, + { + "group_by": false, + "label": "Qty", + "name": "${QUANTITY}", + "show": true + }, + { + "group_by": true, + "label": "Value", + "name": "Value", + "show": true + }, + { + "group_by": true, + "label": "DNP", + "name": "${DNP}", + "show": true + }, + { + "group_by": true, + "label": "Exclude from BOM", + "name": "${EXCLUDE_FROM_BOM}", + "show": true + }, + { + "group_by": true, + "label": "Exclude from Board", + "name": "${EXCLUDE_FROM_BOARD}", + "show": true + }, + { + "group_by": true, + "label": "Footprint", + "name": "Footprint", + "show": true + }, + { + "group_by": false, + "label": "Datasheet", + "name": "Datasheet", + "show": true + }, + { + "group_by": false, + "label": "Description", + "name": "Description", + "show": false + }, + { + "group_by": false, + "label": "#", + "name": "${ITEM_NUMBER}", + "show": false + } + ], + "filter_string": "", + "group_symbols": true, + "include_excluded_from_bom": true, + "name": "", + "sort_asc": true, + "sort_field": "Reference" + }, + "connection_grid_size": 50.0, + "drawing": { + "dashed_lines_dash_length_ratio": 12.0, + "dashed_lines_gap_length_ratio": 3.0, + "default_line_thickness": 6.0, + "default_text_size": 50.0, + "field_names": [], + "intersheets_ref_own_page": false, + "intersheets_ref_prefix": "", + "intersheets_ref_short": false, + "intersheets_ref_show": false, + "intersheets_ref_suffix": "", + "junction_size_choice": 3, + "label_size_ratio": 0.375, + "operating_point_overlay_i_precision": 3, + "operating_point_overlay_i_range": "~A", + "operating_point_overlay_v_precision": 3, + "operating_point_overlay_v_range": "~V", + "overbar_offset_ratio": 1.23, + "pin_symbol_size": 25.0, + "text_offset_ratio": 0.15 + }, + "legacy_lib_dir": "", + "legacy_lib_list": [], + "meta": { + "version": 1 + }, + "net_format_name": "", + "page_layout_descr_file": "", + "plot_directory": "", + "space_save_all_events": true, + "spice_current_sheet_as_root": false, + "spice_external_command": "spice \"%I\"", + "spice_model_current_sheet_as_root": true, + "spice_save_all_currents": false, + "spice_save_all_dissipations": false, + "spice_save_all_voltages": false, + "subpart_first_id": 65, + "subpart_id_separator": 0 + }, + "sheets": [ + [ + "9bf9fc31-f3c1-4c56-8687-162359204658", + "Root" + ] + ], + "text_variables": {} +} diff --git a/qa/tests/pcbnew/CMakeLists.txt b/qa/tests/pcbnew/CMakeLists.txt index 9c0afc7008..f3ad8fcaa8 100644 --- a/qa/tests/pcbnew/CMakeLists.txt +++ b/qa/tests/pcbnew/CMakeLists.txt @@ -58,6 +58,7 @@ set( QA_PCBNEW_SRCS drc/test_drc_copper_sliver.cpp drc/test_solder_mask_bridging.cpp drc/test_drc_multi_netclasses.cpp + drc/test_drc_skew.cpp pcb_io/altium/test_altium_rule_transformer.cpp pcb_io/altium/test_altium_pcblib_import.cpp diff --git a/qa/tests/pcbnew/drc/test_drc_skew.cpp b/qa/tests/pcbnew/drc/test_drc_skew.cpp new file mode 100644 index 0000000000..441078bfa1 --- /dev/null +++ b/qa/tests/pcbnew/drc/test_drc_skew.cpp @@ -0,0 +1,111 @@ +/* + * This program source code file is part of KiCad, a free EDA CAD application. + * + * Copyright (C) 2024 KiCad Developers, see AUTHORS.txt for contributors. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, you may find one here: + * http://www.gnu.org/licenses/old-licenses/gpl-2.0.html + * or you may search the http://www.gnu.org website for the version 2 license, + * or you may write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + */ + +#include <qa_utils/wx_utils/unit_test_utils.h> +#include <pcbnew_utils/board_test_utils.h> +#include <board.h> +#include <board_design_settings.h> +#include <pad.h> +#include <pcb_track.h> +#include <pcb_marker.h> +#include <footprint.h> +#include <drc/drc_item.h> +#include <settings/settings_manager.h> + + +struct DRC_REGRESSION_TEST_FIXTURE +{ + DRC_REGRESSION_TEST_FIXTURE() : + m_settingsManager( true /* headless */ ) + { } + + SETTINGS_MANAGER m_settingsManager; + std::unique_ptr<BOARD> m_board; +}; + + +BOOST_FIXTURE_TEST_CASE( DRCSkew, DRC_REGRESSION_TEST_FIXTURE ) +{ + // Check for minimum copper connection errors + + std::vector<std::pair<wxString, int>> tests = + { + { "skew_within_diff_pairs_drc", 2 }, + { "skew_group_matched_drc", 5 } + }; + + for( const std::pair<wxString, int>& test : tests ) + { + KI_TEST::LoadBoard( m_settingsManager, test.first, m_board ); + KI_TEST::FillZones( m_board.get() ); + + std::vector<DRC_ITEM> violations; + BOARD_DESIGN_SETTINGS& bds = m_board->GetDesignSettings(); + + // Disable DRC tests not useful or not handled in this testcase + bds.m_DRCSeverities[ DRCE_INVALID_OUTLINE ] = SEVERITY::RPT_SEVERITY_IGNORE; + bds.m_DRCSeverities[ DRCE_UNCONNECTED_ITEMS ] = SEVERITY::RPT_SEVERITY_IGNORE; + bds.m_DRCSeverities[ DRCE_COPPER_SLIVER ] = SEVERITY::RPT_SEVERITY_IGNORE; + bds.m_DRCSeverities[ DRCE_STARVED_THERMAL ] = SEVERITY::RPT_SEVERITY_IGNORE; + bds.m_DRCSeverities[ DRCE_DRILL_OUT_OF_RANGE ] = SEVERITY::RPT_SEVERITY_IGNORE; + bds.m_DRCSeverities[ DRCE_VIA_DIAMETER ] = SEVERITY::RPT_SEVERITY_IGNORE; + // These DRC tests are not useful and do not work because they need a footprint library + // associated to the board + bds.m_DRCSeverities[ DRCE_LIB_FOOTPRINT_ISSUES ] = SEVERITY::RPT_SEVERITY_IGNORE; + bds.m_DRCSeverities[ DRCE_LIB_FOOTPRINT_MISMATCH ] = SEVERITY::RPT_SEVERITY_IGNORE; + + // Ensure that our desired error is fired + bds.m_DRCSeverities[ DRCE_SKEW_OUT_OF_RANGE ] = SEVERITY::RPT_SEVERITY_ERROR; + + bds.m_DRCEngine->SetViolationHandler( + [&]( const std::shared_ptr<DRC_ITEM>& aItem, VECTOR2I aPos, int aLayer ) + { + if( bds.GetSeverity( aItem->GetErrorCode() ) == SEVERITY::RPT_SEVERITY_ERROR ) + violations.push_back( *aItem ); + } ); + + bds.m_DRCEngine->RunTests( EDA_UNITS::MILLIMETRES, true, false ); + + if( violations.size() == test.second ) + { + BOOST_CHECK_EQUAL( 1, 1 ); // quiet "did not check any assertions" warning + BOOST_TEST_MESSAGE( wxString::Format( "DRC skew: %s, passed", test.first ) ); + } + else + { + UNITS_PROVIDER unitsProvider( pcbIUScale, EDA_UNITS::INCHES ); + + std::map<KIID, EDA_ITEM*> itemMap; + m_board->FillItemMap( itemMap ); + + for( const DRC_ITEM& item : violations ) + { + BOOST_TEST_MESSAGE( item.ShowReport( &unitsProvider, RPT_SEVERITY_ERROR, + itemMap ) ); + } + + BOOST_ERROR( wxString::Format( "DRC skew: %s, failed (violations found %d expected %d)", + test.first, (int)violations.size(), test.second ) ); + } + } +}