diff --git a/bitmaps_png/CMakeLists.txt b/bitmaps_png/CMakeLists.txt
index 64f4d86279..9311a9b552 100644
--- a/bitmaps_png/CMakeLists.txt
+++ b/bitmaps_png/CMakeLists.txt
@@ -502,6 +502,7 @@ set( BMAPS_MID
update_pcb_from_sch
use_3D_copper_thickness
via
+ via_annulus
via_buried
via_microvia
via_sketch
diff --git a/bitmaps_png/include/bitmaps_png/bitmaps_list.h b/bitmaps_png/include/bitmaps_png/bitmaps_list.h
index b8133efe14..4db62f9e7e 100644
--- a/bitmaps_png/include/bitmaps_png/bitmaps_list.h
+++ b/bitmaps_png/include/bitmaps_png/bitmaps_list.h
@@ -477,6 +477,7 @@ EXTERN_BITMAP( via_xpm )
EXTERN_BITMAP( via_microvia_xpm )
EXTERN_BITMAP( via_buried_xpm )
EXTERN_BITMAP( via_sketch_xpm )
+EXTERN_BITMAP( via_annulus_xpm )
EXTERN_BITMAP( via_diameter_xpm )
EXTERN_BITMAP( via_hole_diameter_xpm )
EXTERN_BITMAP( viewlibs_icon_xpm )
diff --git a/common/pcb.keywords b/common/pcb.keywords
index 0a97df2d48..033e8d8986 100644
--- a/common/pcb.keywords
+++ b/common/pcb.keywords
@@ -255,6 +255,7 @@ via
vias
via_dia
via_drill
+via_min_annulus
via_min_drill
via_min_size
via_size
diff --git a/include/board_design_settings.h b/include/board_design_settings.h
index 14acfe85a0..ddf19606ff 100644
--- a/include/board_design_settings.h
+++ b/include/board_design_settings.h
@@ -216,8 +216,9 @@ public:
bool m_UseConnectedTrackWidth; // use width of existing track when creating a new,
// connected track
int m_MinClearance; // overall min clearance
- int m_TrackMinWidth; // track min value for width ((min copper size value
- int m_ViasMinSize; // vias (not micro vias) min diameter
+ int m_TrackMinWidth; // overall min track width
+ int m_ViasMinAnnulus; // overall minimum width of the via copper ring
+ int m_ViasMinSize; // overall vias (not micro vias) min diameter
int m_MinThroughDrill; // through hole (not micro vias) min drill diameter
int m_MicroViasMinSize; // micro vias min diameter
int m_MicroViasMinDrill; // micro vias min drill diameter
diff --git a/pcbnew/board_design_settings.cpp b/pcbnew/board_design_settings.cpp
index 91485be8ca..0ddcc4166f 100644
--- a/pcbnew/board_design_settings.cpp
+++ b/pcbnew/board_design_settings.cpp
@@ -617,6 +617,7 @@ BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS() :
m_MinClearance = Millimeter2iu( DEFAULT_MINCLEARANCE );
m_TrackMinWidth = Millimeter2iu( DEFAULT_TRACKMINWIDTH );
+ m_ViasMinAnnulus = Millimeter2iu( DEFAULT_VIASMINSIZE - DEFAULT_MINTHROUGHDRILL ) / 2;
m_ViasMinSize = Millimeter2iu( DEFAULT_VIASMINSIZE );
m_MinThroughDrill = Millimeter2iu( DEFAULT_MINTHROUGHDRILL );
m_MicroViasMinSize = Millimeter2iu( DEFAULT_MICROVIASMINSIZE );
@@ -673,6 +674,11 @@ void BOARD_DESIGN_SETTINGS::AppendConfigs( BOARD* aBoard, std::vector<PARAM_CFG*
Millimeter2iu( DEFAULT_TRACKMINWIDTH ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
nullptr, MM_PER_IU ) );
+ aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaAnnulus" ),
+ &m_ViasMinAnnulus,
+ Millimeter2iu( DEFAULT_VIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
+ nullptr, MM_PER_IU ) );
+
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "MinViaDiameter" ),
&m_ViasMinSize,
Millimeter2iu( DEFAULT_VIASMINSIZE ), Millimeter2iu( 0.01 ), Millimeter2iu( 25.0 ),
diff --git a/pcbnew/dialogs/panel_setup_feature_constraints.cpp b/pcbnew/dialogs/panel_setup_feature_constraints.cpp
index 309fb564e3..b7f3d4f542 100644
--- a/pcbnew/dialogs/panel_setup_feature_constraints.cpp
+++ b/pcbnew/dialogs/panel_setup_feature_constraints.cpp
@@ -38,6 +38,7 @@ PANEL_SETUP_FEATURE_CONSTRAINTS::PANEL_SETUP_FEATURE_CONSTRAINTS( PAGED_DIALOG*
PANEL_SETUP_FEATURE_CONSTRAINTS_BASE( aParent->GetTreebook() ),
m_minClearance( aFrame, m_clearanceTitle, m_clearanceCtrl, m_clearanceUnits, true ),
m_trackMinWidth( aFrame, m_TrackMinWidthTitle, m_TrackMinWidthCtrl, m_TrackMinWidthUnits, true ),
+ m_viaMinAnnulus( aFrame, m_ViaMinAnnulusTitle, m_ViaMinAnnulusCtrl, m_ViaMinAnnulusUnits, true ),
m_viaMinSize( aFrame, m_ViaMinTitle, m_SetViasMinSizeCtrl, m_ViaMinUnits, true ),
m_throughHoleMin( aFrame, m_MinDrillTitle, m_MinDrillCtrl, m_MinDrillUnits, true ),
m_uviaMinSize( aFrame, m_uviaMinSizeLabel, m_uviaMinSizeCtrl, m_uviaMinSizeUnits, true ),
@@ -63,6 +64,7 @@ bool PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataToWindow()
m_minClearance.SetValue( m_BrdSettings->m_MinClearance );
m_trackMinWidth.SetValue( m_BrdSettings->m_TrackMinWidth );
+ m_viaMinAnnulus.SetValue( m_BrdSettings->m_ViasMinAnnulus );
m_viaMinSize.SetValue(m_BrdSettings->m_ViasMinSize );
m_edgeClearance.SetValue( m_BrdSettings->m_CopperEdgeClearance );
@@ -84,6 +86,9 @@ bool PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow()
if( !m_trackMinWidth.Validate( 0, Mils2iu( 10000 ) ) ) // 0 to 10 inches
return false;
+ if( !m_viaMinAnnulus.Validate( 0, Mils2iu( 10000 ) ) ) // 0 to 10 inches
+ return false;
+
if( !m_viaMinSize.Validate( 0, Mils2iu( 10000 ) ) ) // 0 to 10 inches
return false;
@@ -106,6 +111,7 @@ bool PANEL_SETUP_FEATURE_CONSTRAINTS::TransferDataFromWindow()
m_BrdSettings->m_MinClearance = m_minClearance.GetValue();
m_BrdSettings->m_TrackMinWidth = m_trackMinWidth.GetValue();
+ m_BrdSettings->m_ViasMinAnnulus = m_viaMinAnnulus.GetValue();
m_BrdSettings->m_ViasMinSize = m_viaMinSize.GetValue();
m_BrdSettings->SetCopperEdgeClearance( m_edgeClearance.GetValue() );
@@ -131,6 +137,7 @@ bool PANEL_SETUP_FEATURE_CONSTRAINTS::Show( bool aShow )
m_bitmapZoneFillOpt->SetBitmap( KiBitmap( show_zone_xpm ) );
m_bitmapClearance->SetBitmap( KiBitmap( ps_diff_pair_gap_xpm ) );
m_bitmapMinTrackWidth->SetBitmap( KiBitmap( width_track_xpm ) );
+ m_bitmapMinViaAnnulus->SetBitmap( KiBitmap( via_annulus_xpm ) );
m_bitmapMinViaDiameter->SetBitmap( KiBitmap( via_diameter_xpm ) );
m_bitmapMinViaDrill->SetBitmap( KiBitmap( via_hole_diameter_xpm ) );
m_bitmapMinuViaDiameter->SetBitmap( KiBitmap( via_diameter_xpm ) );
diff --git a/pcbnew/dialogs/panel_setup_feature_constraints.h b/pcbnew/dialogs/panel_setup_feature_constraints.h
index 68a7929e7b..c3dccbdc57 100644
--- a/pcbnew/dialogs/panel_setup_feature_constraints.h
+++ b/pcbnew/dialogs/panel_setup_feature_constraints.h
@@ -44,6 +44,7 @@ private:
public:
UNIT_BINDER m_minClearance;
UNIT_BINDER m_trackMinWidth;
+ UNIT_BINDER m_viaMinAnnulus;
UNIT_BINDER m_viaMinSize;
UNIT_BINDER m_throughHoleMin;
UNIT_BINDER m_uviaMinSize;
diff --git a/pcbnew/dialogs/panel_setup_feature_constraints_base.cpp b/pcbnew/dialogs/panel_setup_feature_constraints_base.cpp
index cd1b92359b..234c18717d 100644
--- a/pcbnew/dialogs/panel_setup_feature_constraints_base.cpp
+++ b/pcbnew/dialogs/panel_setup_feature_constraints_base.cpp
@@ -177,6 +177,20 @@ PANEL_SETUP_FEATURE_CONSTRAINTS_BASE::PANEL_SETUP_FEATURE_CONSTRAINTS_BASE( wxWi
m_TrackMinWidthUnits->Wrap( -1 );
fgFeatureConstraints->Add( m_TrackMinWidthUnits, 0, wxALIGN_CENTER_VERTICAL|wxALIGN_LEFT, 5 );
+ m_bitmapMinViaAnnulus = new wxStaticBitmap( this, wxID_ANY, wxNullBitmap, wxDefaultPosition, wxDefaultSize, 0 );
+ fgFeatureConstraints->Add( m_bitmapMinViaAnnulus, 0, wxALL|wxALIGN_CENTER_HORIZONTAL, 5 );
+
+ m_ViaMinAnnulusTitle = new wxStaticText( this, wxID_ANY, _("Minimum via annulus:"), wxDefaultPosition, wxDefaultSize, 0 );
+ m_ViaMinAnnulusTitle->Wrap( -1 );
+ fgFeatureConstraints->Add( m_ViaMinAnnulusTitle, 0, wxALIGN_CENTER_VERTICAL, 5 );
+
+ m_ViaMinAnnulusCtrl = new wxTextCtrl( this, wxID_ANY, wxEmptyString, wxDefaultPosition, wxDefaultSize, 0 );
+ fgFeatureConstraints->Add( m_ViaMinAnnulusCtrl, 0, wxALL|wxALIGN_CENTER_VERTICAL|wxEXPAND, 5 );
+
+ m_ViaMinAnnulusUnits = new wxStaticText( this, wxID_ANY, _("mm"), wxDefaultPosition, wxDefaultSize, 0 );
+ m_ViaMinAnnulusUnits->Wrap( -1 );
+ fgFeatureConstraints->Add( m_ViaMinAnnulusUnits, 0, wxALIGN_CENTER_VERTICAL, 5 );
+
m_bitmapMinViaDiameter = new wxStaticBitmap( this, wxID_ANY, wxNullBitmap, wxDefaultPosition, wxDefaultSize, 0 );
fgFeatureConstraints->Add( m_bitmapMinViaDiameter, 0, wxALL|wxALIGN_CENTER_HORIZONTAL, 5 );
diff --git a/pcbnew/dialogs/panel_setup_feature_constraints_base.fbp b/pcbnew/dialogs/panel_setup_feature_constraints_base.fbp
index 236fac7114..9f21d69a00 100644
--- a/pcbnew/dialogs/panel_setup_feature_constraints_base.fbp
+++ b/pcbnew/dialogs/panel_setup_feature_constraints_base.fbp
@@ -1696,6 +1696,250 @@
<property name="wrap">-1</property>
</object>
</object>
+ <object class="sizeritem" expanded="1">
+ <property name="border">5</property>
+ <property name="flag">wxALL|wxALIGN_CENTER_HORIZONTAL</property>
+ <property name="proportion">0</property>
+ <object class="wxStaticBitmap" expanded="1">
+ <property name="BottomDockable">1</property>
+ <property name="LeftDockable">1</property>
+ <property name="RightDockable">1</property>
+ <property name="TopDockable">1</property>
+ <property name="aui_layer"></property>
+ <property name="aui_name"></property>
+ <property name="aui_position"></property>
+ <property name="aui_row"></property>
+ <property name="best_size"></property>
+ <property name="bg"></property>
+ <property name="bitmap"></property>
+ <property name="caption"></property>
+ <property name="caption_visible">1</property>
+ <property name="center_pane">0</property>
+ <property name="close_button">1</property>
+ <property name="context_help"></property>
+ <property name="context_menu">1</property>
+ <property name="default_pane">0</property>
+ <property name="dock">Dock</property>
+ <property name="dock_fixed">0</property>
+ <property name="docking">Left</property>
+ <property name="enabled">1</property>
+ <property name="fg"></property>
+ <property name="floatable">1</property>
+ <property name="font"></property>
+ <property name="gripper">0</property>
+ <property name="hidden">0</property>
+ <property name="id">wxID_ANY</property>
+ <property name="max_size"></property>
+ <property name="maximize_button">0</property>
+ <property name="maximum_size"></property>
+ <property name="min_size"></property>
+ <property name="minimize_button">0</property>
+ <property name="minimum_size"></property>
+ <property name="moveable">1</property>
+ <property name="name">m_bitmapMinViaAnnulus</property>
+ <property name="pane_border">1</property>
+ <property name="pane_position"></property>
+ <property name="pane_size"></property>
+ <property name="permission">protected</property>
+ <property name="pin_button">1</property>
+ <property name="pos"></property>
+ <property name="resize">Resizable</property>
+ <property name="show">1</property>
+ <property name="size"></property>
+ <property name="subclass">; ; forward_declare</property>
+ <property name="toolbar_pane">0</property>
+ <property name="tooltip"></property>
+ <property name="window_extra_style"></property>
+ <property name="window_name"></property>
+ <property name="window_style"></property>
+ </object>
+ </object>
+ <object class="sizeritem" expanded="1">
+ <property name="border">5</property>
+ <property name="flag">wxALIGN_CENTER_VERTICAL</property>
+ <property name="proportion">0</property>
+ <object class="wxStaticText" expanded="1">
+ <property name="BottomDockable">1</property>
+ <property name="LeftDockable">1</property>
+ <property name="RightDockable">1</property>
+ <property name="TopDockable">1</property>
+ <property name="aui_layer"></property>
+ <property name="aui_name"></property>
+ <property name="aui_position"></property>
+ <property name="aui_row"></property>
+ <property name="best_size"></property>
+ <property name="bg"></property>
+ <property name="caption"></property>
+ <property name="caption_visible">1</property>
+ <property name="center_pane">0</property>
+ <property name="close_button">1</property>
+ <property name="context_help"></property>
+ <property name="context_menu">1</property>
+ <property name="default_pane">0</property>
+ <property name="dock">Dock</property>
+ <property name="dock_fixed">0</property>
+ <property name="docking">Left</property>
+ <property name="enabled">1</property>
+ <property name="fg"></property>
+ <property name="floatable">1</property>
+ <property name="font"></property>
+ <property name="gripper">0</property>
+ <property name="hidden">0</property>
+ <property name="id">wxID_ANY</property>
+ <property name="label">Minimum via annulus:</property>
+ <property name="markup">0</property>
+ <property name="max_size"></property>
+ <property name="maximize_button">0</property>
+ <property name="maximum_size"></property>
+ <property name="min_size"></property>
+ <property name="minimize_button">0</property>
+ <property name="minimum_size"></property>
+ <property name="moveable">1</property>
+ <property name="name">m_ViaMinAnnulusTitle</property>
+ <property name="pane_border">1</property>
+ <property name="pane_position"></property>
+ <property name="pane_size"></property>
+ <property name="permission">protected</property>
+ <property name="pin_button">1</property>
+ <property name="pos"></property>
+ <property name="resize">Resizable</property>
+ <property name="show">1</property>
+ <property name="size"></property>
+ <property name="style"></property>
+ <property name="subclass">; ; forward_declare</property>
+ <property name="toolbar_pane">0</property>
+ <property name="tooltip"></property>
+ <property name="window_extra_style"></property>
+ <property name="window_name"></property>
+ <property name="window_style"></property>
+ <property name="wrap">-1</property>
+ </object>
+ </object>
+ <object class="sizeritem" expanded="1">
+ <property name="border">5</property>
+ <property name="flag">wxALL|wxALIGN_CENTER_VERTICAL|wxEXPAND</property>
+ <property name="proportion">0</property>
+ <object class="wxTextCtrl" expanded="1">
+ <property name="BottomDockable">1</property>
+ <property name="LeftDockable">1</property>
+ <property name="RightDockable">1</property>
+ <property name="TopDockable">1</property>
+ <property name="aui_layer"></property>
+ <property name="aui_name"></property>
+ <property name="aui_position"></property>
+ <property name="aui_row"></property>
+ <property name="best_size"></property>
+ <property name="bg"></property>
+ <property name="caption"></property>
+ <property name="caption_visible">1</property>
+ <property name="center_pane">0</property>
+ <property name="close_button">1</property>
+ <property name="context_help"></property>
+ <property name="context_menu">1</property>
+ <property name="default_pane">0</property>
+ <property name="dock">Dock</property>
+ <property name="dock_fixed">0</property>
+ <property name="docking">Left</property>
+ <property name="enabled">1</property>
+ <property name="fg"></property>
+ <property name="floatable">1</property>
+ <property name="font"></property>
+ <property name="gripper">0</property>
+ <property name="hidden">0</property>
+ <property name="id">wxID_ANY</property>
+ <property name="max_size"></property>
+ <property name="maximize_button">0</property>
+ <property name="maximum_size"></property>
+ <property name="maxlength"></property>
+ <property name="min_size"></property>
+ <property name="minimize_button">0</property>
+ <property name="minimum_size"></property>
+ <property name="moveable">1</property>
+ <property name="name">m_ViaMinAnnulusCtrl</property>
+ <property name="pane_border">1</property>
+ <property name="pane_position"></property>
+ <property name="pane_size"></property>
+ <property name="permission">protected</property>
+ <property name="pin_button">1</property>
+ <property name="pos"></property>
+ <property name="resize">Resizable</property>
+ <property name="show">1</property>
+ <property name="size"></property>
+ <property name="style"></property>
+ <property name="subclass">; ; forward_declare</property>
+ <property name="toolbar_pane">0</property>
+ <property name="tooltip"></property>
+ <property name="validator_data_type"></property>
+ <property name="validator_style">wxFILTER_NONE</property>
+ <property name="validator_type">wxDefaultValidator</property>
+ <property name="validator_variable"></property>
+ <property name="value"></property>
+ <property name="window_extra_style"></property>
+ <property name="window_name"></property>
+ <property name="window_style"></property>
+ </object>
+ </object>
+ <object class="sizeritem" expanded="1">
+ <property name="border">5</property>
+ <property name="flag">wxALIGN_CENTER_VERTICAL</property>
+ <property name="proportion">0</property>
+ <object class="wxStaticText" expanded="1">
+ <property name="BottomDockable">1</property>
+ <property name="LeftDockable">1</property>
+ <property name="RightDockable">1</property>
+ <property name="TopDockable">1</property>
+ <property name="aui_layer"></property>
+ <property name="aui_name"></property>
+ <property name="aui_position"></property>
+ <property name="aui_row"></property>
+ <property name="best_size"></property>
+ <property name="bg"></property>
+ <property name="caption"></property>
+ <property name="caption_visible">1</property>
+ <property name="center_pane">0</property>
+ <property name="close_button">1</property>
+ <property name="context_help"></property>
+ <property name="context_menu">1</property>
+ <property name="default_pane">0</property>
+ <property name="dock">Dock</property>
+ <property name="dock_fixed">0</property>
+ <property name="docking">Left</property>
+ <property name="enabled">1</property>
+ <property name="fg"></property>
+ <property name="floatable">1</property>
+ <property name="font"></property>
+ <property name="gripper">0</property>
+ <property name="hidden">0</property>
+ <property name="id">wxID_ANY</property>
+ <property name="label">mm</property>
+ <property name="markup">0</property>
+ <property name="max_size"></property>
+ <property name="maximize_button">0</property>
+ <property name="maximum_size"></property>
+ <property name="min_size"></property>
+ <property name="minimize_button">0</property>
+ <property name="minimum_size"></property>
+ <property name="moveable">1</property>
+ <property name="name">m_ViaMinAnnulusUnits</property>
+ <property name="pane_border">1</property>
+ <property name="pane_position"></property>
+ <property name="pane_size"></property>
+ <property name="permission">protected</property>
+ <property name="pin_button">1</property>
+ <property name="pos"></property>
+ <property name="resize">Resizable</property>
+ <property name="show">1</property>
+ <property name="size"></property>
+ <property name="style"></property>
+ <property name="subclass">; ; forward_declare</property>
+ <property name="toolbar_pane">0</property>
+ <property name="tooltip"></property>
+ <property name="window_extra_style"></property>
+ <property name="window_name"></property>
+ <property name="window_style"></property>
+ <property name="wrap">-1</property>
+ </object>
+ </object>
<object class="sizeritem" expanded="1">
<property name="border">5</property>
<property name="flag">wxALL|wxALIGN_CENTER_HORIZONTAL</property>
diff --git a/pcbnew/dialogs/panel_setup_feature_constraints_base.h b/pcbnew/dialogs/panel_setup_feature_constraints_base.h
index 4d6714e253..777d339849 100644
--- a/pcbnew/dialogs/panel_setup_feature_constraints_base.h
+++ b/pcbnew/dialogs/panel_setup_feature_constraints_base.h
@@ -62,6 +62,10 @@ class PANEL_SETUP_FEATURE_CONSTRAINTS_BASE : public wxPanel
wxStaticText* m_TrackMinWidthTitle;
wxTextCtrl* m_TrackMinWidthCtrl;
wxStaticText* m_TrackMinWidthUnits;
+ wxStaticBitmap* m_bitmapMinViaAnnulus;
+ wxStaticText* m_ViaMinAnnulusTitle;
+ wxTextCtrl* m_ViaMinAnnulusCtrl;
+ wxStaticText* m_ViaMinAnnulusUnits;
wxStaticBitmap* m_bitmapMinViaDiameter;
wxStaticText* m_ViaMinTitle;
wxTextCtrl* m_SetViasMinSizeCtrl;
diff --git a/pcbnew/dialogs/panel_setup_netclasses.cpp b/pcbnew/dialogs/panel_setup_netclasses.cpp
index 6d8e983890..fe6c014fbd 100644
--- a/pcbnew/dialogs/panel_setup_netclasses.cpp
+++ b/pcbnew/dialogs/panel_setup_netclasses.cpp
@@ -515,6 +515,7 @@ bool PANEL_SETUP_NETCLASSES::validateData()
return false;
wxString msg;
+ int minViaAnnulus = m_ConstraintsPanel->m_viaMinAnnulus.GetValue();
int minViaDia = m_ConstraintsPanel->m_viaMinSize.GetValue();
int minThroughHole = m_ConstraintsPanel->m_throughHoleMin.GetValue();
int minUViaDia = m_ConstraintsPanel->m_uviaMinSize.GetValue();
@@ -572,6 +573,15 @@ bool PANEL_SETUP_NETCLASSES::validateData()
return false;
}
+ if( ( getNetclassValue( row, GRID_VIASIZE )
+ - getNetclassValue( row, GRID_VIADRILL ) ) / 2 < minViaAnnulus )
+ {
+ msg.Printf( _( "Via diameter and drill leave via annulus less than minimum (%s)." ),
+ StringFromValue( m_Frame->GetUserUnits(), minViaAnnulus, true, true ) );
+ m_Parent->SetError( msg, this, m_netclassGrid, row, GRID_VIASIZE );
+ return false;
+ }
+
if( getNetclassValue( row, GRID_VIADRILL ) < minThroughHole )
{
msg.Printf( _( "Via drill less than minimum via drill (%s)." ),
@@ -603,6 +613,8 @@ bool PANEL_SETUP_NETCLASSES::validateData()
m_Parent->SetError( msg, this, m_netclassGrid, row, GRID_uVIADRILL );
return false;
}
+
+ // JEY TODO: test microvias agains via min annulus?
}
return true;
diff --git a/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp b/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp
index 991e772a76..6be4c09126 100644
--- a/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp
+++ b/pcbnew/dialogs/panel_setup_tracks_and_vias.cpp
@@ -221,6 +221,7 @@ bool PANEL_SETUP_TRACKS_AND_VIAS::validateData()
}
wxString msg;
+ int minViaAnnulus = m_ConstraintsPanel->m_viaMinAnnulus.GetValue();
int minViaDia = m_ConstraintsPanel->m_viaMinSize.GetValue();
int minThroughHole = m_ConstraintsPanel->m_throughHoleMin.GetValue();
int minTrackWidth = m_ConstraintsPanel->m_trackMinWidth.GetValue();
@@ -283,6 +284,15 @@ bool PANEL_SETUP_TRACKS_AND_VIAS::validateData()
m_Parent->SetError( msg, this, m_viaSizesGrid, row, VIA_DRILL_COL );
return false;
}
+
+ if( ( ValueFromString( m_Frame->GetUserUnits(), viaDia )
+ - ValueFromString( m_Frame->GetUserUnits(), viaDrill ) ) / 2 < minViaAnnulus )
+ {
+ msg.Printf( _( "Diameter and drill leave via annulus less than minimum (%s)." ),
+ StringFromValue( m_Frame->GetUserUnits(), minViaAnnulus, true, true ) );
+ m_Parent->SetError( msg, this, m_viaSizesGrid, row, VIA_SIZE_COL );
+ return false;
+ }
}
// Test diff pairs
diff --git a/pcbnew/drc/drc.cpp b/pcbnew/drc/drc.cpp
index cebb5172b0..4aa379ed0a 100644
--- a/pcbnew/drc/drc.cpp
+++ b/pcbnew/drc/drc.cpp
@@ -620,6 +620,22 @@ bool DRC::doNetClass( const NETCLASSPTR& nc, wxString& msg )
ret = false;
}
+ int ncViaAnnulus = ( nc->GetViaDiameter() - nc->GetViaDrill() ) / 2;
+
+ if( ncViaAnnulus < g.m_ViasMinAnnulus )
+ {
+ DRC_ITEM* drcItem = new DRC_ITEM( DRCE_NETCLASS_VIAANNULUS );
+
+ msg.Printf( drcItem->GetErrorText() + _( " (board minimum %s; %s netclass %s)" ),
+ MessageTextFromValue( userUnits(), g.m_ViasMinAnnulus, true ),
+ nc->GetName(),
+ MessageTextFromValue( userUnits(), ncViaAnnulus, true ) );
+
+ drcItem->SetErrorMessage( msg );
+ addMarkerToPcb( new MARKER_PCB( drcItem, wxPoint() ) );
+ ret = false;
+ }
+
if( nc->GetuViaDiameter() < g.m_MicroViasMinSize )
{
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_NETCLASS_uVIASIZE );
diff --git a/pcbnew/drc/drc.h b/pcbnew/drc/drc.h
index 963424934d..dd2a88c15c 100644
--- a/pcbnew/drc/drc.h
+++ b/pcbnew/drc/drc.h
@@ -61,6 +61,7 @@ enum PCB_DRC_CODE {
DRCE_DRILLED_HOLES_TOO_CLOSE, ///< overlapping drilled holes break drill bits
DRCE_TOO_SMALL_TRACK_WIDTH, ///< Too small track width
DRCE_TOO_SMALL_VIA, ///< Too small via size
+ DRCE_TOO_SMALL_VIA_ANNULUS, ///< Via size and drill leave annulus too small
DRCE_TOO_SMALL_VIA_DRILL, ///< Too small via drill
DRCE_TOO_SMALL_PAD_DRILL, ///< Too small via drill
DRCE_VIA_HOLE_BIGGER, ///< via's hole is bigger than its diameter
@@ -71,6 +72,7 @@ enum PCB_DRC_CODE {
DRCE_BURIED_VIA_NOT_ALLOWED, ///< buried vias are not allowed
DRCE_NETCLASS_TRACKWIDTH, ///< netclass has TrackWidth < board.m_designSettings->m_TrackMinWidth
DRCE_NETCLASS_CLEARANCE, ///< netclass has Clearance < board.m_designSettings->m_TrackClearance
+ DRCE_NETCLASS_VIAANNULUS, ///< netclass ViaSize & ViaDrill leave annulus < board.m_designSettings->m_ViasMinAnnulus
DRCE_NETCLASS_VIASIZE, ///< netclass has ViaSize < board.m_designSettings->m_ViasMinSize
DRCE_NETCLASS_VIADRILLSIZE, ///< netclass has ViaDrillSize < board.m_designSettings->m_MinThroughDrill
DRCE_NETCLASS_uVIASIZE, ///< netclass has ViaSize < board.m_designSettings->m_MicroViasMinSize
diff --git a/pcbnew/drc/drc_clearance_test_functions.cpp b/pcbnew/drc/drc_clearance_test_functions.cpp
index 70b922a907..fff413b768 100644
--- a/pcbnew/drc/drc_clearance_test_functions.cpp
+++ b/pcbnew/drc/drc_clearance_test_functions.cpp
@@ -176,6 +176,23 @@ void DRC::doTrackDrc( TRACK* aRefSeg, TRACKS::iterator aStartIt, TRACKS::iterato
}
else
{
+ int viaAnnulus = ( refvia->GetWidth() - refvia->GetDrill() ) / 2;
+
+ if( viaAnnulus < dsnSettings.m_ViasMinAnnulus )
+ {
+ DRC_ITEM* drcItem = new DRC_ITEM( DRCE_TOO_SMALL_VIA_ANNULUS );
+
+ msg.Printf( drcItem->GetErrorText() + _( " (board minimum %s; actual %s)" ),
+ MessageTextFromValue( userUnits(), dsnSettings.m_ViasMinSize, true ),
+ MessageTextFromValue( userUnits(), viaAnnulus, true ) );
+
+ drcItem->SetErrorMessage( msg );
+ drcItem->SetItems( refvia );
+
+ MARKER_PCB* marker = new MARKER_PCB( drcItem, refvia->GetPosition() );
+ addMarkerToPcb( marker );
+ }
+
if( refvia->GetWidth() < dsnSettings.m_ViasMinSize )
{
DRC_ITEM* drcItem = new DRC_ITEM( DRCE_TOO_SMALL_VIA );
diff --git a/pcbnew/drc/drc_item.cpp b/pcbnew/drc/drc_item.cpp
index 5ea665bbde..11572857ed 100644
--- a/pcbnew/drc/drc_item.cpp
+++ b/pcbnew/drc/drc_item.cpp
@@ -85,6 +85,7 @@ wxString DRC_ITEM::GetErrorText( int aCode, bool aTranslate ) const
case DRCE_HOLE_NEAR_TRACK: msg = _HKI( "Hole too close to track" ); break;
case DRCE_TOO_SMALL_TRACK_WIDTH: msg = _HKI( "Track width too small" ); break;
case DRCE_TOO_SMALL_VIA: msg = _HKI( "Via size too small" ); break;
+ case DRCE_TOO_SMALL_VIA_ANNULUS: msg = _HKI( "Via annulus too small" ); break;
case DRCE_TOO_SMALL_MICROVIA: msg = _HKI( "Micro via size too small" ); break;
case DRCE_TOO_SMALL_VIA_DRILL: msg = _HKI( "Via drill too small" ); break;
case DRCE_TOO_SMALL_PAD_DRILL: msg = _HKI( "Pad drill too small" ); break;
@@ -96,6 +97,7 @@ wxString DRC_ITEM::GetErrorText( int aCode, bool aTranslate ) const
// use < since this is text ultimately embedded in HTML
case DRCE_NETCLASS_TRACKWIDTH: msg = _HKI( "NetClass Track Width too small" ); break;
case DRCE_NETCLASS_CLEARANCE: msg = _HKI( "NetClass Clearance too small" ); break;
+ case DRCE_NETCLASS_VIAANNULUS: msg = _HKI( "NetClass via annulus too small" ); break;
case DRCE_NETCLASS_VIASIZE: msg = _HKI( "NetClass Via Dia too small" ); break;
case DRCE_NETCLASS_VIADRILLSIZE: msg = _HKI( "NetClass Via Drill too small" ); break;
case DRCE_NETCLASS_uVIASIZE: msg = _HKI( "NetClass uVia Dia too small" ); break;
diff --git a/pcbnew/eagle_plugin.cpp b/pcbnew/eagle_plugin.cpp
index d8002b18a7..debab64530 100644
--- a/pcbnew/eagle_plugin.cpp
+++ b/pcbnew/eagle_plugin.cpp
@@ -249,6 +249,7 @@ BOARD* EAGLE_PLUGIN::Load( const wxString& aFileName, BOARD* aAppendToMe, const
m_min_trace = INT_MAX;
m_min_hole = INT_MAX;
m_min_via = INT_MAX;
+ m_min_annulus = INT_MAX;
loadAllSections( doc );
@@ -263,6 +264,9 @@ BOARD* EAGLE_PLUGIN::Load( const wxString& aFileName, BOARD* aAppendToMe, const
if( m_min_hole < designSettings.m_MinThroughDrill )
designSettings.m_MinThroughDrill = m_min_hole;
+ if( m_min_annulus < designSettings.m_ViasMinAnnulus )
+ designSettings.m_ViasMinAnnulus = m_min_annulus;
+
if( m_rules->mdWireWire )
{
NETCLASSPTR defaultNetclass = designSettings.GetDefault();
@@ -308,10 +312,11 @@ BOARD* EAGLE_PLUGIN::Load( const wxString& aFileName, BOARD* aAppendToMe, const
void EAGLE_PLUGIN::init( const PROPERTIES* aProperties )
{
- m_hole_count = 0;
- m_min_trace = 0;
- m_min_hole = 0;
- m_min_via = 0;
+ m_hole_count = 0;
+ m_min_trace = 0;
+ m_min_hole = 0;
+ m_min_via = 0;
+ m_min_annulus = 0;
m_xpath->clear();
m_pads_to_nets.clear();
@@ -2182,6 +2187,9 @@ void EAGLE_PLUGIN::loadSignals( wxXmlNode* aSignals )
if( drillz < m_min_hole )
m_min_hole = drillz;
+ if( ( kidiam - drillz ) / 2 < m_min_annulus )
+ m_min_annulus = ( kidiam - drillz ) / 2;
+
if( layer_front_most == F_Cu && layer_back_most == B_Cu )
via->SetViaType( VIATYPE::THROUGH );
else if( layer_front_most == F_Cu || layer_back_most == B_Cu )
diff --git a/pcbnew/eagle_plugin.h b/pcbnew/eagle_plugin.h
index b20000f42b..6a8790dd39 100644
--- a/pcbnew/eagle_plugin.h
+++ b/pcbnew/eagle_plugin.h
@@ -190,6 +190,7 @@ private:
int m_min_trace; ///< smallest trace we find on Load(), in BIU.
int m_min_hole; ///< smallest diameter hole we find on Load(), in BIU.
int m_min_via; ///< smallest via we find on Load(), in BIU.
+ int m_min_annulus; ///< smallest via annulus we find on Load(), in BIU.
wxString m_lib_path;
wxDateTime m_mod_time;
diff --git a/pcbnew/kicad_plugin.cpp b/pcbnew/kicad_plugin.cpp
index adf9ce77c5..c6d6892a23 100644
--- a/pcbnew/kicad_plugin.cpp
+++ b/pcbnew/kicad_plugin.cpp
@@ -509,6 +509,8 @@ void PCB_IO::formatSetup( BOARD* aBoard, int aNestLevel ) const
FormatInternalUnits( dsnSettings.m_TrackMinWidth ).c_str() );
m_out->Print( aNestLevel+1, "(clearance_min %s)\n",
FormatInternalUnits( dsnSettings.m_MinClearance ).c_str() );
+ m_out->Print( aNestLevel+1, "(via_min_annulus %s)\n",
+ FormatInternalUnits( dsnSettings.m_ViasMinAnnulus ).c_str() );
m_out->Print( aNestLevel+1, "(via_min_size %s)\n",
FormatInternalUnits( dsnSettings.m_ViasMinSize ).c_str() );
m_out->Print( aNestLevel+1, "(through_hole_min %s)\n",
diff --git a/pcbnew/pcb_parser.cpp b/pcbnew/pcb_parser.cpp
index 22fe21b0e7..67099029d1 100644
--- a/pcbnew/pcb_parser.cpp
+++ b/pcbnew/pcb_parser.cpp
@@ -1495,6 +1495,11 @@ void PCB_PARSER::parseSetup()
NeedRIGHT();
break;
+ case T_via_min_annulus:
+ designSettings.m_ViasMinAnnulus = parseBoardUnits( T_via_min_annulus );
+ NeedRIGHT();
+ break;
+
case T_via_min_size:
designSettings.m_ViasMinSize = parseBoardUnits( T_via_min_size );
NeedRIGHT();