diff --git a/common/base_struct.cpp b/common/base_struct.cpp
index a42543e68b..d2baafb57b 100644
--- a/common/base_struct.cpp
+++ b/common/base_struct.cpp
@@ -259,6 +259,7 @@ SEARCH_RESULT EDA_BaseStruct::IterateForward( EDA_BaseStruct* listStart,
// see base_struct.h
+// many classes inherit this method, be careful:
SEARCH_RESULT EDA_BaseStruct::Visit( INSPECTOR* inspector, const void* testData,
const KICAD_T scanTypes[] )
{
diff --git a/pcbnew/class_board.cpp b/pcbnew/class_board.cpp
index ddd45bd911..7800203b7a 100644
--- a/pcbnew/class_board.cpp
+++ b/pcbnew/class_board.cpp
@@ -267,22 +267,52 @@ bool BOARD::ComputeBoundaryBox( void )
*/
void BOARD::Show( int nestLevel, std::ostream& os )
{
+ EDA_BaseStruct* p;
+
// for now, make it look like XML:
NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() << ">\n";
// specialization of the output:
- EDA_BaseStruct* p = m_Modules;
+ NestedSpace( nestLevel+1, os ) << "<modules>\n";
+ p = m_Modules;
for( ; p; p = p->Pnext )
- p->Show( nestLevel+1, os );
+ p->Show( nestLevel+2, os );
+ NestedSpace( nestLevel+1, os ) << "</modules>\n";
+ NestedSpace( nestLevel+1, os ) << "<pdrawings>\n";
p = m_Drawings;
for( ; p; p = p->Pnext )
- p->Show( nestLevel+1, os );
+ p->Show( nestLevel+2, os );
+ NestedSpace( nestLevel+1, os ) << "</pdrawings>\n";
- EDA_BaseStruct* kid = m_Son;
- for( ; kid; kid = kid->Pnext )
+ NestedSpace( nestLevel+1, os ) << "<nets>\n";
+ p = m_Equipots;
+ for( ; p; p = p->Pnext )
+ p->Show( nestLevel+2, os );
+ NestedSpace( nestLevel+1, os ) << "</nets>\n";
+
+ NestedSpace( nestLevel+1, os ) << "<tracks>\n";
+ p = m_Track;
+ for( ; p; p = p->Pnext )
+ p->Show( nestLevel+2, os );
+ NestedSpace( nestLevel+1, os ) << "</tracks>\n";
+
+ NestedSpace( nestLevel+1, os ) << "<zones>\n";
+ p = m_Zone;
+ for( ; p; p = p->Pnext )
+ p->Show( nestLevel+2, os );
+ NestedSpace( nestLevel+1, os ) << "</zones>\n";
+
+ NestedSpace( nestLevel+1, os ) << "<edgezones>\n";
+ p = m_CurrentLimitZone;
+ for( ; p; p = p->Pnext )
+ p->Show( nestLevel+2, os );
+ NestedSpace( nestLevel+1, os ) << "</edgezones>\n";
+
+ p = m_Son;
+ for( ; p; p = p->Pnext )
{
- kid->Show( nestLevel+1, os );
+ p->Show( nestLevel+1, os );
}
NestedSpace( nestLevel, os ) << "</" << GetClass().Lower().mb_str() << ">\n";
@@ -299,10 +329,8 @@ EDA_BaseStruct* BOARD::FindPadOrModule( const wxPoint& refPos, int layer )
int layer;
PadOrModule( int alayer ) :
- found(0), // found is NULL
- layer(alayer)
- {
- }
+ found(0), layer(alayer)
+ {}
SEARCH_RESULT Inspect( EDA_BaseStruct* testItem, const void* testData )
{
@@ -326,13 +354,16 @@ EDA_BaseStruct* BOARD::FindPadOrModule( const wxPoint& refPos, int layer )
{
if( testItem->HitTest( refPos ) )
{
- // save regardless of layer test, but only quit if
- // layer matches, otherwise use this item if no future
- // layer match.
- found = testItem;
-
if( layer == mlayer )
+ {
+ found = testItem;
return SEARCH_QUIT;
+ }
+
+ // layer mismatch, save in case we don't find a
+ // future layer match hit.
+ if( !found )
+ found = testItem;
}
}
}
diff --git a/pcbnew/class_edge_mod.cpp b/pcbnew/class_edge_mod.cpp
index 0ab755eb33..0aeec4d8ac 100644
--- a/pcbnew/class_edge_mod.cpp
+++ b/pcbnew/class_edge_mod.cpp
@@ -515,7 +515,7 @@ bool EDGE_MODULE::HitTest( const wxPoint& ref_pos )
*/
void EDGE_MODULE::Show( int nestLevel, std::ostream& os )
{
- const char* cp = "???";
+ const char* cp;
switch( m_Shape )
{
@@ -528,16 +528,17 @@ void EDGE_MODULE::Show( int nestLevel, std::ostream& os )
case S_SPOT_CIRCLE: cp = "spot_circle"; break;
case S_SPOT_RECT: cp = "spot_rect"; break;
case S_POLYGON: cp = "polygon"; break;
+ default: cp = "??EDGE??"; break;
}
// for now, make it look like XML:
NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() <<
- " type=\"" << cp << "\">\n";
+ " type=\"" << cp << "\">";
- NestedSpace( nestLevel+1, os ) << "<start" << m_Start0 << "/>\n";
- NestedSpace( nestLevel+1, os ) << "<end" << m_End0 << "/>\n";
-
- NestedSpace( nestLevel, os ) << "</" << GetClass().Lower().mb_str() << ">\n";
+ os << " <start" << m_Start0 << "/>";
+ os << " <end" << m_End0 << "/>";
+
+ os << " </" << GetClass().Lower().mb_str() << ">\n";
}
#endif
diff --git a/pcbnew/class_equipot.cpp b/pcbnew/class_equipot.cpp
index 07d607b5ee..a7395d9319 100644
--- a/pcbnew/class_equipot.cpp
+++ b/pcbnew/class_equipot.cpp
@@ -146,3 +146,20 @@ int EQUIPOT:: WriteEquipotDescr( FILE* File )
fprintf( File, "$EndEQUIPOT\n" );
return 1;
}
+
+#if defined(DEBUG)
+/**
+ * Function Show
+ * is used to output the object tree, currently for debugging only.
+ * @param nestLevel An aid to prettier tree indenting, and is the level
+ * of nesting of this object within the overall tree.
+ * @param os The ostream& to output to.
+ */
+void EQUIPOT::Show( int nestLevel, std::ostream& os )
+{
+ // for now, make it look like XML:
+ NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() <<
+ " name=\"" << m_Netname.mb_str() << '"' <<
+ " netcode=\"" << m_NetCode << "\"/>\n";
+}
+#endif
diff --git a/pcbnew/class_equipot.h b/pcbnew/class_equipot.h
index fb3e812518..da4b3b940d 100644
--- a/pcbnew/class_equipot.h
+++ b/pcbnew/class_equipot.h
@@ -1,36 +1,58 @@
- /*************************************************************************/
- /* classe EQUIPOT: definition des elements relatifs aux equipotentielles */
- /*************************************************************************/
+/*************************************************************************/
+/* classe EQUIPOT: definition des elements relatifs aux equipotentielles */
+/*************************************************************************/
/* Representation des descriptions des equipotentielles */
-class EQUIPOT: public EDA_BaseStruct
+class EQUIPOT : public EDA_BaseStruct
{
public:
- wxString m_Netname; // nom du net
- int status; // no route, hight light...
- int m_NetCode; // numero de code interne du net
- int m_NbNodes; // nombre de pads appartenant au net
- int m_NbLink; // nombre de chevelus
- int m_NbNoconn; // nombre de chevelus actifs
- int m_Masque_Layer; // couches interdites (bit 0 = layer 0...)
- int m_Masque_Plan; // couches mises en plan de cuivre
- int m_ForceWidth; // specific width (O = default width)
- LISTE_PAD * m_PadzoneStart;// pointeur sur debut de liste pads du net
- LISTE_PAD * m_PadzoneEnd; // pointeur sur fin de liste pads du net
- CHEVELU * m_RatsnestStart; // pointeur sur debut de liste ratsnests du net
- CHEVELU * m_RatsnestEnd; // pointeur sur fin de liste ratsnests du net
+ wxString m_Netname; // nom du net
+ int status; // no route, hight light...
+ int m_NetCode; // numero de code interne du net
+ int m_NbNodes; // nombre de pads appartenant au net
+ int m_NbLink; // nombre de chevelus
+ int m_NbNoconn; // nombre de chevelus actifs
+ int m_Masque_Layer; // couches interdites (bit 0 = layer 0...)
+ int m_Masque_Plan; // couches mises en plan de cuivre
+ int m_ForceWidth; // specific width (O = default width)
+ LISTE_PAD* m_PadzoneStart; // pointeur sur debut de liste pads du net
+ LISTE_PAD* m_PadzoneEnd; // pointeur sur fin de liste pads du net
+ CHEVELU* m_RatsnestStart; // pointeur sur debut de liste ratsnests du net
+ CHEVELU* m_RatsnestEnd; // pointeur sur fin de liste ratsnests du net
- EQUIPOT(EDA_BaseStruct * StructFather);
- ~EQUIPOT(void);
+ EQUIPOT( EDA_BaseStruct* StructFather );
+ ~EQUIPOT( void );
- /* Effacement memoire de la structure */
- void UnLink( void );
+ /* Effacement memoire de la structure */
+ void UnLink( void );
- /* Readind and writing data on files */
- int ReadEquipotDescr(FILE * File, int * LineNum);
- int WriteEquipotDescr(FILE * File);
+ /* Readind and writing data on files */
+ int ReadEquipotDescr( FILE* File, int* LineNum );
+ int WriteEquipotDescr( FILE* File );
+
+
+#if defined(DEBUG)
+ /**
+ * Function GetClass
+ * returns the class name.
+ * @return wxString
+ */
+ wxString GetClass() const
+ {
+ return wxT("NET");
+ }
+
+
+ /**
+ * Function Show
+ * is used to output the object tree, currently for debugging only.
+ * @param nestLevel An aid to prettier tree indenting, and is the level
+ * of nesting of this object within the overall tree.
+ * @param os The ostream& to output to.
+ */
+ virtual void Show( int nestLevel, std::ostream& os );
+#endif
+
};
-
-
diff --git a/pcbnew/class_module.cpp b/pcbnew/class_module.cpp
index e9189a60d4..8c268efa8c 100644
--- a/pcbnew/class_module.cpp
+++ b/pcbnew/class_module.cpp
@@ -1192,17 +1192,17 @@ void MODULE::Show( int nestLevel, std::ostream& os )
EDA_BaseStruct* p;
- NestedSpace( nestLevel+1, os ) << "<pads>\n";
+ NestedSpace( nestLevel+1, os ) << "<mpads>\n";
p = m_Pads;
for( ; p; p = p->Pnext )
p->Show( nestLevel+2, os );
- NestedSpace( nestLevel+1, os ) << "</pads>\n";
+ NestedSpace( nestLevel+1, os ) << "</mpads>\n";
- NestedSpace( nestLevel+1, os ) << "<drawings>\n";
+ NestedSpace( nestLevel+1, os ) << "<mdrawings>\n";
p = m_Drawings;
for( ; p; p = p->Pnext )
p->Show( nestLevel+2, os );
- NestedSpace( nestLevel+1, os ) << "</drawings>\n";
+ NestedSpace( nestLevel+1, os ) << "</mdrawings>\n";
p = m_Son;
for( ; p; p = p->Pnext )
@@ -1228,6 +1228,12 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
if( SEARCH_QUIT == inspector->Inspect( this, testData ) )
return SEARCH_QUIT;
}
+ else if( stype == TYPEPAD )
+ {
+ if( SEARCH_QUIT == IterateForward( m_Pads, inspector,
+ testData, scanTypes ) )
+ return SEARCH_QUIT;
+ }
else if( stype == TYPETEXTEMODULE )
{
if( SEARCH_QUIT == inspector->Inspect( m_Reference, testData ) )
@@ -1241,12 +1247,6 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
testData, scanTypes ) )
return SEARCH_QUIT;
}
- else if( stype == TYPEPAD )
- {
- if( SEARCH_QUIT == IterateForward( m_Pads, inspector,
- testData, scanTypes ) )
- return SEARCH_QUIT;
- }
else if( stype == TYPEEDGEMODULE )
{
// iterate over m_Drawings
diff --git a/pcbnew/class_pad.cpp b/pcbnew/class_pad.cpp
index 8bf310e638..977b94c560 100644
--- a/pcbnew/class_pad.cpp
+++ b/pcbnew/class_pad.cpp
@@ -1019,16 +1019,13 @@ void D_PAD::Show( int nestLevel, std::ostream& os )
char padname[5] = { m_Padname[0], m_Padname[1], m_Padname[2], m_Padname[3], 0 };
char layerMask[16];
-
- sprintf( layerMask, "%08X", m_Masque_Layer );
+ sprintf( layerMask, "0x%08X", m_Masque_Layer );
// for now, make it look like XML:
NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() <<
" num=\"" << padname << '"' <<
" net=\"" << m_Netname.mb_str() << '"' <<
- " layerMask=\"" << layerMask << '"' <<
- " pos=\"(" << m_Pos.x << ',' << m_Pos.y << ")\"" <<
- "/>\n";
+ " layerMask=\"" << layerMask << '"' << m_Pos << "/>\n";
// NestedSpace( nestLevel+1, os ) << m_Text.mb_str() << '\n';
diff --git a/pcbnew/class_track.cpp b/pcbnew/class_track.cpp
index 93bbc3db70..3d2ba0b30c 100644
--- a/pcbnew/class_track.cpp
+++ b/pcbnew/class_track.cpp
@@ -33,6 +33,7 @@ TRACK::TRACK( EDA_BaseStruct* StructFather, DrawStructureType idtype ) :
}
+
SEGZONE::SEGZONE( EDA_BaseStruct* StructFather ) :
TRACK( StructFather, TYPEZONE )
{
@@ -459,9 +460,8 @@ TRACK* TRACK:: Copy( int NbSegm )
bool TRACK::WriteTrackDescr( FILE* File )
/********************************************/
{
- int type;
-
- type = 0;
+ int type = 0;
+
if( m_StructType == TYPEVIA )
type = 1;
@@ -474,6 +474,7 @@ bool TRACK::WriteTrackDescr( FILE* File )
fprintf( File, "De %d %d %d %lX %X\n",
m_Layer, type, m_NetCode,
m_TimeStamp, ReturnStatus() );
+
return TRUE;
}
@@ -674,3 +675,29 @@ bool TRACK::HitTest( const wxPoint& ref_pos )
return false;
}
+
+#if defined(DEBUG)
+/**
+ * Function Show
+ * is used to output the object tree, currently for debugging only.
+ * @param nestLevel An aid to prettier tree indenting, and is the level
+ * of nesting of this object within the overall tree.
+ * @param os The ostream& to output to.
+ */
+void TRACK::Show( int nestLevel, std::ostream& os )
+{
+ NestedSpace( nestLevel, os ) << '<' << GetClass().Lower().mb_str() <<
+ " shape=\"" << m_Shape << '"' <<
+ " layer=\"" << m_Layer << '"' <<
+ " width=\"" << m_Width << '"' <<
+ " drill=\"" << m_Drill << '"' <<
+ " netcode=\"" << m_NetCode << "\">" <<
+ "<start" << m_Start << "/>" <<
+ "<end" << m_End << "/>";
+
+ os << "</" << GetClass().Lower().mb_str() << ">\n";
+}
+
+#endif
+
+
diff --git a/pcbnew/class_track.h b/pcbnew/class_track.h
index 3562dfe32b..5ee4e84246 100644
--- a/pcbnew/class_track.h
+++ b/pcbnew/class_track.h
@@ -95,6 +95,15 @@ public:
return wxT("TRACK");
}
+ /**
+ * Function Show
+ * is used to output the object tree, currently for debugging only.
+ * @param nestLevel An aid to prettier tree indenting, and is the level
+ * of nesting of this object within the overall tree.
+ * @param os The ostream& to output to.
+ */
+ void Show( int nestLevel, std::ostream& os );
+
#endif
};