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IPC-D-356 export improvements for padstacks
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@ -119,14 +119,15 @@ static void build_pad_testpoints( BOARD *aPcb, std::vector <D356_RECORD>& aRecor
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rk.mechanical = ( pad->GetAttribute() == PAD_ATTRIB::NPTH );
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rk.x_location = pad->GetPosition().x - origin.x;
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rk.y_location = origin.y - pad->GetPosition().y;
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// TODO(JE) padstacks
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rk.x_size = pad->GetSize( PADSTACK::ALL_LAYERS ).x;
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PCB_LAYER_ID accessLayer = footprint->IsFlipped() ? B_Cu : F_Cu;
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rk.x_size = pad->GetSize( accessLayer ).x;
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// Rule: round pads have y = 0
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if( pad->GetShape( PADSTACK::ALL_LAYERS ) == PAD_SHAPE::CIRCLE )
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if( pad->GetShape( accessLayer ) == PAD_SHAPE::CIRCLE )
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rk.y_size = 0;
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else
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rk.y_size = pad->GetSize( PADSTACK::ALL_LAYERS ).y;
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rk.y_size = pad->GetSize( accessLayer ).y;
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rk.rotation = - pad->GetOrientation().AsDegrees();
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@ -204,11 +205,20 @@ static void build_via_testpoints( BOARD *aPcb, std::vector <D356_RECORD>& aRecor
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rk.access = via_access_code( aPcb, top_layer, bottom_layer );
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rk.x_location = via->GetPosition().x - origin.x;
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rk.y_location = origin.y - via->GetPosition().y;
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// TODO(JE) padstacks
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rk.x_size = via->GetWidth( PADSTACK::ALL_LAYERS );
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// The record has a single size for vias, so take the smaller of the front and back
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if( via->Padstack().Mode() != PADSTACK::MODE::NORMAL )
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rk.x_size = std::min( via->GetWidth( F_Cu ), via->GetWidth( B_Cu ) );
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else
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rk.x_size = via->GetWidth( PADSTACK::ALL_LAYERS );
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rk.y_size = 0; // Round so height = 0
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rk.rotation = 0;
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rk.soldermask = 3; // XXX always tented?
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if( via->IsTented( F_Mask ) )
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rk.soldermask |= 1;
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if( via->IsTented( B_Mask ) )
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rk.soldermask |= 2;
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aRecords.push_back( rk );
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}
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