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pcbnew: More about work on color selection and items visibility:

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removed global variables and a lot of redundancies
This commit is contained in:
charras 2010-01-31 20:01:46 +00:00
parent f8215b34fb
commit a46cd46d9d
86 changed files with 647 additions and 543 deletions
3d-viewer
3d_draw.cpp3d_viewer.h
CHANGELOG.txt
common
class_colors_design_settings.cpppcbcommon.cpp
gerbview
deltrack.cppdialog_print_using_printer.cppexport_to_pcbnew.cppgerbview.cppgerbview_config.hlay2plot.cppprotos.hselect_layers_to_pcb.cppset_color.cppset_color.htracepcb.cpp
include
class_board_design_settings.hclass_colors_design_settings.hclass_pcb_screen.hpcbcommon.hwxPcbStruct.h
pcbnew
autorout.cppbasepcbframe.cppclass_board.cppclass_board.hclass_board_design_settings.cppclass_dimension.cppclass_dimension.hclass_drawsegment.cppclass_edge_mod.cppclass_mire.cppclass_module.cppclass_module.hclass_netclass.cppclass_netclass.hclass_netinfo.hclass_pad.cppclass_pad_draw_functions.cppclass_pcb_text.cppclass_text_mod.cppclass_track.cppclass_zone.cppclasspcb.cppcollectors.hdialog_design_rules.cppdialog_design_rules.hdialog_drc.cppdialog_drc.hdialog_edit_module_for_BoardEditor.cppdialog_graphic_item_properties.cppdialog_graphic_items_options.cppdialog_graphic_items_options.hdialog_mask_clearance.cppdialog_mask_clearance.hdialog_pad_properties.cppdialog_print_using_printer.cppdimension.cppdrc.cppdrc_stuff.hedit.cppedit_pcb_text.cppeditedge.cppeditrack-part2.cppeditrack.cppevent_handlers_tracks_vias_sizes.cppgen_drill_report_files.cppgendrill.cpphotkeys.cppioascii.cpplocate.cppmagnetic_tracks_functions.cppmirepcb.cppmoduleframe.cppmove_or_drag_track.cpponrightclick.cpppcbframe.cpppcbnew.hpcbnew_config.hpcbplot.cppplot_rtn.cppprotos.hsel_layer.cppsolve.cpptool_pcb.cpptoolbars_update_user_interface.cpptracepcb.cpp

6
3d-viewer/3d_draw.cpp
View File

@ -114,11 +114,11 @@ GLuint Pcb3D_GLCanvas::CreateDrawGL_List()
m_gllist = glGenLists( 1 );
pcb->ComputeBoundaryBox();
g_Parm_3D_Visu.m_BoardSettings = pcb->m_BoardSettings;
g_Parm_3D_Visu.m_BoardSettings = pcb->GetBoardDesignSettings();
g_Parm_3D_Visu.m_BoardSize = pcb->m_BoundaryBox.GetSize();
g_Parm_3D_Visu.m_BoardPos = pcb->m_BoundaryBox.Centre();
g_Parm_3D_Visu.m_BoardPos.y = -g_Parm_3D_Visu.m_BoardPos.y;
g_Parm_3D_Visu.m_Layers = pcb->m_BoardSettings->GetCopperLayerCount();
g_Parm_3D_Visu.m_Layers = pcb->GetCopperLayerCount();
// Ensure the board has 2 sides for 3D views, because it is hard to find
// a *really* single side board in the true life...
@ -132,7 +132,7 @@ GLuint Pcb3D_GLCanvas::CreateDrawGL_List()
// because all boards thickness no not match with this setup:
// double epoxy_width = 1.6; // epoxy width in mm
g_Parm_3D_Visu.m_Epoxy_Width = pcb->m_BoardSettings->m_LayerThickness
g_Parm_3D_Visu.m_Epoxy_Width = pcb->GetBoardDesignSettings()->m_BoardThickness
* g_Parm_3D_Visu.m_BoardScale;
/* calculate z position for each layer */

2
3d-viewer/3d_viewer.h
View File

@ -115,7 +115,7 @@ public:
wxPoint m_BoardPos;
wxSize m_BoardSize;
int m_Layers;
EDA_BoardDesignSettings* m_BoardSettings; // Link to current board design
BOARD_DESIGN_SETTINGS* m_BoardSettings; // Link to current board design
// settings
double m_Epoxy_Width; /* Epoxy thickness (normalized)
**/

10
CHANGELOG.txt
View File

@ -4,6 +4,16 @@ KiCad ChangeLog 2010
Please add newer entries at the top, list the date and your name with
email address.
2010-Jan-31 UPDATE Jean-Pierre Charras <jean-pierre.charras@gipsa-lab.inpg.fr>
================================================================================
++ pcbnew:
More about work on color selection and items visibility:
removed global variables and a lot of redundancies
Now Modedit does not uses the visiblity options of the board editor
(That can create a problem id hide modules is activated)
work in progress but almost finished
2010-Jan-30 UPDATE Jean-Pierre Charras <jean-pierre.charras@gipsa-lab.inpg.fr>
================================================================================
++ pcbnew:

21
common/class_colors_design_settings.cpp
View File

@ -93,7 +93,7 @@ int COLORS_DESIGN_SETTINGS::GetLayerColor( int aLayer )
* sets the color for aLayer which is one of the layer indices given
* in pcbstruct.h or in schematic
*/
void COLORS_DESIGN_SETTINGS:: SetLayerColor( int aLayer, int aColor )
void COLORS_DESIGN_SETTINGS::SetLayerColor( int aLayer, int aColor )
{
if( (unsigned) aLayer < DIM(m_LayersColors) )
{
@ -107,7 +107,7 @@ void COLORS_DESIGN_SETTINGS:: SetLayerColor( int aLayer, int aColor )
* @return the color for an item which is one of the item indices given
* in pcbstruct.h, enum PCB_VISIBLE or in schematic
*/
int COLORS_DESIGN_SETTINGS:: GetItemColor( int aItemIdx )
int COLORS_DESIGN_SETTINGS::GetItemColor( int aItemIdx )
{
if( (unsigned) aItemIdx < DIM(m_ItemsColors) )
{
@ -122,10 +122,25 @@ int COLORS_DESIGN_SETTINGS:: GetItemColor( int aItemIdx )
* sets the color for an item which is one of the item indices given
* in pcbstruct.h, enum PCB_VISIBLE or in schematic
*/
void COLORS_DESIGN_SETTINGS:: SetItemColor( int aItemIdx, int aColor )
void COLORS_DESIGN_SETTINGS::SetItemColor( int aItemIdx, int aColor )
{
if( (unsigned) aItemIdx < DIM(m_ItemsColors) )
{
m_ItemsColors[aItemIdx] = aColor;
}
}
/**
* Function SetAllColorsAs
* sets alls colors to aColor
* Usefull to create a monochrome color selection for printing purpose
*/
void COLORS_DESIGN_SETTINGS::SetAllColorsAs( int aColor)
{
for( unsigned ii = 0; ii < DIM(m_LayersColors); ii++ )
m_LayersColors[ii] = aColor;
for( unsigned ii = 0; ii < DIM(m_ItemsColors); ii++ )
m_ItemsColors[ii] = aColor;
}

2
common/pcbcommon.cpp
View File

@ -100,7 +100,7 @@ int g_PadCMPColor = RED;
// Current design settings:
class EDA_BoardDesignSettings g_DesignSettings;
class BOARD_DESIGN_SETTINGS g_DesignSettings;
/**
* Used in track creation, a list of track segments currently being created,

2
gerbview/deltrack.cpp
View File

@ -79,7 +79,7 @@ TRACK* WinEDA_GerberFrame::Delete_Segment( wxDC* DC, TRACK* Track )
return NULL;
}
Trace_Segment( DrawPanel, DC, Track, GR_XOR );
Trace_Segment( GetBoard(), DrawPanel, DC, Track, GR_XOR );
DLIST<TRACK>* container = (DLIST<TRACK>*)Track->GetList();
wxASSERT( container );

2
gerbview/dialog_print_using_printer.cpp
View File

@ -191,7 +191,7 @@ void DIALOG_PRINT_USING_PRINTER::InitValues( )
BOARD* board = ((WinEDA_BasePcbFrame*)m_Parent)->GetBoard();
for( int layer = 0; layer<NB_LAYERS; layer++, mask <<= 1 )
{
if( ! board->m_BoardSettings->IsLayerEnabled( layer ) )
if( ! board->IsLayerEnabled( layer ) )
{
m_BoxSelectLayer[layer]->Enable( false );
m_BoxSelectLayer[layer]->SetValue( false );

6
gerbview/export_to_pcbnew.cpp
View File

@ -90,9 +90,7 @@ static int WriteSetup( FILE* File, BOARD* Pcb )
sprintf( text, "InternalUnit %f INCH\n", 1.0 / PCB_INTERNAL_UNIT );
fprintf( File, "%s", text );
Pcb->m_BoardSettings->SetCopperLayerCount(
g_DesignSettings.GetCopperLayerCount() );
fprintf( File, "Layers %d\n", g_DesignSettings.GetCopperLayerCount() );
fprintf( File, "Layers %d\n", Pcb->GetCopperLayerCount() );
fprintf( File, "$EndSETUP\n\n" );
return 1;
@ -104,7 +102,7 @@ static bool WriteGeneralDescrPcb( BOARD* Pcb, FILE* File )
int NbLayers;
/* Print the copper layer count */
NbLayers = Pcb->m_BoardSettings->GetCopperLayerCount();
NbLayers = Pcb->GetCopperLayerCount();
fprintf( File, "$GENERAL\n" );
fprintf( File, "LayerCount %d\n", NbLayers );

6
gerbview/gerbview.cpp
View File

@ -57,7 +57,7 @@ Ki_PageDescr* g_GerberPageSizeList[] =
IMPLEMENT_APP( WinEDA_App )
/* MacOSX: Needed for file association
/* MacOSX: Needed for file association
* http://wiki.wxwidgets.org/WxMac-specific_topics
*/
void WinEDA_App::MacOpenFile(const wxString &fileName) {
@ -76,8 +76,6 @@ bool WinEDA_App::OnInit()
ScreenPcb = new PCB_SCREEN();
ScreenPcb->m_CurrentSheetDesc = &g_Sheet_GERBER;
g_DesignSettings.SetEnabledLayers( FULL_LAYERS ); // All 32 layers enabled at first.
ActiveScreen = ScreenPcb;
// read current setup and reopen last directory if no filename to open in
@ -108,6 +106,8 @@ bool WinEDA_App::OnInit()
/* Gerbview mainframe title */
frame->SetTitle( GetTitle() + wxT( " " ) + GetBuildVersion() );
frame->SetBoard( new BOARD( NULL, frame ) );
frame->GetBoard()->SetEnabledLayers( FULL_LAYERS ); // All 32 layers enabled at first.
// Initialize some display options
DisplayOpt.DisplayPadIsol = false; // Pad clearance has no meaning

23
gerbview/gerbview_config.h
View File

@ -13,7 +13,7 @@
/* Useful macro : */
#define LOC_COLOR(numlayer) &g_ColorsSettings.m_LayersColors[numlayer]
/* Liste des parametres */
/* Config parameters list */
static PARAM_CFG_WXSTRING PhotoExtBufCfg
(
@ -342,8 +342,7 @@ static PARAM_CFG_SETCOLOR ColorpcbGrilleCfg
(
INSETUP,
wxT("CoPcbGr"),
//@@IMB: Wrong object &g_DesignSettings.m_PcbGridColor, /* Adresse du parametre */
&g_GridColor, //@@IMB: This is the real variable.
&g_GridColor,
DARKGRAY
);
@ -363,22 +362,6 @@ static PARAM_CFG_INT GERBERSpotMiniCfg
2,0xFFFF
);
static PARAM_CFG_INT DrawSegmLargeurCfg
(
wxT("DrawLar"),
&g_DesignSettings.m_DrawSegmentWidth,
120,
0,10000
);
static PARAM_CFG_INT EdgeSegmLargeurCfg
(
wxT("EdgeLar"),
&g_DesignSettings.m_EdgeSegmentWidth,
120,
0,10000
);
static PARAM_CFG_INT TimeOutCfg
(
wxT("TimeOut"),
@ -441,8 +424,6 @@ PARAM_CFG_BASE * ParamCfgList[] =
& ColorpcbGrilleCfg,
& ColorDCodesCfg,
& GERBERSpotMiniCfg,
& DrawSegmLargeurCfg,
& EdgeSegmLargeurCfg,
& TimeOutCfg,
& DisplPolairCfg,
NULL

2
gerbview/lay2plot.cpp
View File

@ -30,7 +30,7 @@ void Print_PcbItems(BOARD * Pcb, wxDC *DC, int drawmode, int printmasklayer)
for( ; pt_piste != NULL ; pt_piste = pt_piste->Next() )
{
// if( (printmasklayer & ReturnMaskLayer(pt_piste) ) == 0 ) continue;
Trace_Segment(NULL, DC, pt_piste, drawmode);
Trace_Segment(Pcb, NULL, DC, pt_piste, drawmode);
}
DisplayOpt = save_opt;

22
gerbview/protos.h
View File

@ -1,33 +1,17 @@
/* declarations prototype */
/***************************/
/* select_layers_to_pcb.cpp*/
/***************************/
int* InstallDialogLayerPairChoice( WinEDA_GerberFrame* parent );
/***********************/
/* gerbview_config.cpp */
/***********************/
bool Read_Config();
bool Read_Hotkey_Config( WinEDA_DrawFrame* frame, bool verbose );
/****************/
/* lay2plot.cpp */
void Print_PcbItems( BOARD* Pcb, wxDC* DC, int drawmode, int printmasklayer );
/*****************/
/* set_color.cpp */
/*****************/
void DisplayColorSetupFrame( WinEDA_DrawFrame* parent, const wxPoint& framepos );
/***************/
/* trpiste.cpp */
/***************/
void Trace_Segment( WinEDA_DrawPanel* panel,
void DisplayColorSetupFrame( WinEDA_GerberFrame* parent, const wxPoint& framepos );
void Trace_Segment( BOARD* aBrd, WinEDA_DrawPanel* panel,
wxDC* DC,
TRACK* pt_piste,
int draw_mode );

8
gerbview/select_layers_to_pcb.cpp
View File

@ -129,7 +129,7 @@ WinEDA_SwapLayerFrame::WinEDA_SwapLayerFrame( WinEDA_GerberFrame* parent ) :
ButtonTable[ii] = -1;
LayerLookUpTable[ii] = LAYER_UNSELECTED;
}
g_DesignSettings.SetCopperLayerCount(pcb_layer_number);
m_Parent->GetBoard()->SetCopperLayerCount(pcb_layer_number);
pcb_layer_number = 0;
for( nb_items = 0, ii = 0; ii < 32; ii++ )
@ -137,8 +137,8 @@ WinEDA_SwapLayerFrame::WinEDA_SwapLayerFrame( WinEDA_GerberFrame* parent ) :
if( g_GERBER_List[ii] == NULL )
continue;
if( (pcb_layer_number == g_DesignSettings.GetCopperLayerCount() - 1)
&& (g_DesignSettings.GetCopperLayerCount() > 1) )
if( (pcb_layer_number == m_Parent->GetBoard()->GetCopperLayerCount() - 1)
&& (m_Parent->GetBoard()->GetCopperLayerCount() > 1) )
pcb_layer_number = LAYER_N_FRONT;
ButtonTable[nb_items] = ii;
@ -399,7 +399,7 @@ void WinEDA_SwapLayerFrame::OnOkClick( wxCommandEvent& event )
if( layers_count > NB_COPPER_LAYERS ) // should not occur.
layers_count = NB_COPPER_LAYERS;
g_DesignSettings.SetCopperLayerCount( layers_count );
m_Parent->GetBoard()->SetCopperLayerCount( layers_count );
EndModal( 1 );
}

8
gerbview/set_color.cpp
View File

@ -41,7 +41,7 @@ END_EVENT_TABLE()
/*****************************************************/
void DisplayColorSetupFrame( WinEDA_DrawFrame* parent,
void DisplayColorSetupFrame( WinEDA_GerberFrame* parent,
const wxPoint& framepos )
/*****************************************************/
{
@ -62,7 +62,7 @@ WinEDA_SetColorsFrame::WinEDA_SetColorsFrame()
// Standard Constructor
WinEDA_SetColorsFrame::WinEDA_SetColorsFrame( WinEDA_DrawFrame* parent,
WinEDA_SetColorsFrame::WinEDA_SetColorsFrame( WinEDA_GerberFrame* parent,
const wxPoint& framepos )
{
m_Parent = parent;
@ -210,7 +210,7 @@ void WinEDA_SetColorsFrame::CreateControls()
if( laytool_list[lyr]->m_NoDisplayIsColor )
{
if( g_DesignSettings.IsLayerVisible( lyr ))
if( m_Parent->GetBoard()->IsLayerVisible( lyr ))
CheckBox->SetValue( TRUE );
else
CheckBox->SetValue( FALSE );
@ -426,7 +426,7 @@ void WinEDA_SetColorsFrame::UpdateLayerSettings()
{
for( int lyr = 0; lyr < NB_BUTT - 2; lyr++ )
{
g_DesignSettings.SetLayerVisibility( lyr, laytool_list[lyr]->m_CheckBox->GetValue() );
m_Parent->GetBoard()->GetBoardDesignSettings()->SetLayerVisibility( lyr, laytool_list[lyr]->m_CheckBox->GetValue() );
*laytool_list[lyr]->m_Color = CurrentColor[lyr];
}

4
gerbview/set_color.h
View File

@ -390,7 +390,7 @@ private:
DECLARE_DYNAMIC_CLASS( WinEDA_SetColorsFrame )
DECLARE_EVENT_TABLE()
WinEDA_DrawFrame* m_Parent;
WinEDA_GerberFrame* m_Parent;
wxBoxSizer* OuterBoxSizer;
wxBoxSizer* MainBoxSizer;
wxFlexGridSizer* FlexColumnBoxSizer;
@ -430,7 +430,7 @@ private:
public:
// Constructors and destructor
WinEDA_SetColorsFrame();
WinEDA_SetColorsFrame( WinEDA_DrawFrame* parent, const wxPoint& framepos );
WinEDA_SetColorsFrame( WinEDA_GerberFrame* parent, const wxPoint& framepos );
~WinEDA_SetColorsFrame();
};

20
gerbview/tracepcb.cpp
View File

@ -18,6 +18,10 @@
#include "class_board_design_settings.h"
#include "colors_selection.h"
/***************/
/* tracepcb.cpp */
/***************/
static void Draw_Track_Buffer( WinEDA_DrawPanel* panel,
wxDC* DC,
BOARD* Pcb,
@ -127,7 +131,7 @@ void WinEDA_GerberFrame::Trace_Gerber( wxDC* DC, int draw_mode, int printmasklay
{
if( !(track->ReturnMaskLayer() & printmasklayer) )
continue;
if( g_DesignSettings.IsLayerVisible( track->GetLayer() ) == false )
if( GetBoard()->IsLayerVisible( track->GetLayer() ) == false )
continue;
// D(printf("D:%p\n", track );)
@ -219,9 +223,9 @@ void Draw_Track_Buffer( WinEDA_DrawPanel* panel, wxDC* DC, BOARD* Pcb, int draw_
// D(printf("D:%p\n", track );)
if( dcode_hightlight == track->GetNet() && track->GetLayer()==layer )
Trace_Segment( panel, DC, track, draw_mode | GR_SURBRILL );
Trace_Segment( Pcb, panel, DC, track, draw_mode | GR_SURBRILL );
else
Trace_Segment( panel, DC, track, draw_mode );
Trace_Segment( Pcb, panel, DC, track, draw_mode );
}
}
@ -229,7 +233,7 @@ void Draw_Track_Buffer( WinEDA_DrawPanel* panel, wxDC* DC, BOARD* Pcb, int draw_
#if 1
/***********************************************************************************/
void Trace_Segment( WinEDA_DrawPanel* panel, wxDC* DC, TRACK* track, int draw_mode )
void Trace_Segment( BOARD* aBrd, WinEDA_DrawPanel* panel, wxDC* DC, TRACK* track, int draw_mode )
/***********************************************************************************/
/* Trace 1 segment of track (segment, spot...).
@ -251,10 +255,10 @@ void Trace_Segment( WinEDA_DrawPanel* panel, wxDC* DC, TRACK* track, int draw_mo
}
else
{
if( g_DesignSettings.IsLayerVisible( track->GetLayer() ) == false )
if( aBrd->IsLayerVisible( track->GetLayer() ) == false )
return;
color = g_ColorsSettings.GetLayerColor( track->GetLayer() );
color = aBrd->GetLayerColor( track->GetLayer() );
if( draw_mode & GR_SURBRILL )
{
@ -420,7 +424,7 @@ void Affiche_DCodes_Pistes( WinEDA_DrawPanel* panel, wxDC* DC, BOARD* Pcb, int d
track = Pcb->m_Track;
for( ; track != NULL; track = track->Next() )
{
if( g_DesignSettings.IsLayerVisible( track->GetLayer() ) == false )
if( Pcb->IsLayerVisible( track->GetLayer() ) == false )
continue;
if( (track->m_Shape == S_ARC)
@ -453,7 +457,7 @@ void Affiche_DCodes_Pistes( WinEDA_DrawPanel* panel, wxDC* DC, BOARD* Pcb, int d
orient = TEXT_ORIENT_VERT;
width /= 2;
}
int color = g_ColorsSettings.GetItemColor(DCODES_VISIBLE);
DrawGraphicText( panel, DC,

8
include/class_board_design_settings.h
View File

@ -8,7 +8,7 @@
#include "pcbstruct.h" // NB_COLORS
// Class for handle current printed board design settings
class EDA_BoardDesignSettings
class BOARD_DESIGN_SETTINGS
{
protected:
int m_CopperLayerCount; // Number of copper layers for this design
@ -30,7 +30,7 @@ public:
int m_SolderPasteMargin; // Solder paste margin absolute value
double m_SolderPasteMarginRatio; // Solder pask margin ratio value of pad size
// The final margin is the sum of these 2 values
int m_LayerThickness; // Layer Thickness for 3D viewer
int m_BoardThickness; // Board Thickness for 3D viewer
protected:
int m_EnabledLayers; // Bit-mask for layer enabling
@ -38,7 +38,7 @@ protected:
int m_VisibleElements; // Bit-mask for element category visibility
public:
EDA_BoardDesignSettings();
BOARD_DESIGN_SETTINGS();
/**
* Function GetVisibleLayers
@ -150,7 +150,7 @@ public:
* @param aLayerIndex = The index of the layer to be tested
* @return bool - true if the layer is enabled
*/
bool IsLayerEnabled( int aLayerIndex )
bool IsLayerEnabled( int aLayerIndex ) const
{
return bool( m_EnabledLayers & (1 << aLayerIndex) );
}

7
include/class_colors_design_settings.h
View File

@ -53,6 +53,13 @@ public:
* in pcbstruct.h, enum PCB_VISIBLE or in schematic
*/
void SetItemColor( int aItemIdx, int aColor );
/**
* Function SetAllColorsAs
* sets alls colors to aColor
* Usefull to create a monochrome color selection for printing purpose
*/
void SetAllColorsAs( int aColor);
};
#endif // _COLORS_DESIGN_SETTING_H

8
include/class_pcb_screen.h
View File

@ -44,14 +44,6 @@ public:
void SetCurItem( BOARD_ITEM* aItem ) { BASE_SCREEN::SetCurItem( aItem ); }
/* Return true if a microvia can be put on board
* A microvia is a small via restricted to 2 near neighbor layers
* because its is hole is made by laser which can penetrate only one layer
* It is mainly used to connect BGA to the first inner layer
* And it is allowed from an external layer to the first inner layer
*/
bool IsMicroViaAcceptable( void );
/* full undo redo management : */
// use BASE_SCREEN::ClearUndoRedoList()

4
include/pcbcommon.h
View File

@ -11,7 +11,6 @@ class DPAD;
class BOARD_ITEM;
class PCB_SCREEN;
class DISPLAY_OPTIONS;
class EDA_BoardDesignSettings;
/* Look up Table for conversion one layer number -> one bit layer mask: */
extern int g_TabOneLayerMask[LAYER_COUNT];
@ -41,9 +40,6 @@ extern int g_CurrentVersionPCB;
extern int g_TimeOut; // Timer for automatic saving
extern int g_SaveTime; // Time for next saving
// Current design settings:
extern class EDA_BoardDesignSettings g_DesignSettings;
extern DLIST<TRACK> g_CurrentTrackList;
#define g_CurrentTrackSegment \

10
include/wxPcbStruct.h
View File

@ -538,6 +538,14 @@ public:
// Track and via edition:
void Via_Edit_Control( wxCommandEvent& event );
/* Return true if a microvia can be put on board
* A microvia is a small via restricted to 2 near neighbor layers
* because its is hole is made by laser which can penetrate only one layer
* It is mainly used to connect BGA to the first inner layer
* And it is allowed from an external layer to the first inner layer
*/
bool IsMicroViaAcceptable( void );
/**
* Function Other_Layer_Route
* operates in one of two ways. If argument track is NULL, then swap the
@ -630,7 +638,7 @@ public:
* @param aItemsListPicker = the list picker to use for an undo command
* (can be NULL)
* @param aUseNetclassValue = true to use NetClass value, false to use
* g_DesignSettings value
* current designSettings value
* @return true if done, false if no not change (because DRC error)
*/
bool SetTrackSegmentWidth( TRACK* aTrackItem,

2
pcbnew/autorout.cpp
View File

@ -39,7 +39,7 @@ void WinEDA_PcbFrame::Autoroute( wxDC* DC, int mode )
int autoroute_net_code = -1;
wxString msg;
if( g_DesignSettings.GetCopperLayerCount() > 1 )
if( GetBoard()->GetCopperLayerCount() > 1 )
{
Route_Layer_TOP = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_TOP;
Route_Layer_BOTTOM = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_BOTTOM;

16
pcbnew/basepcbframe.cpp
View File

@ -178,7 +178,7 @@ void WinEDA_BasePcbFrame::SwitchLayer( wxDC* DC, int layer )
// If only one copper layer is enabled, the only such layer
// that can be selected to is the "Copper" layer (so the
// selection of any other copper layer is disregarded).
if( m_Pcb->m_BoardSettings->GetCopperLayerCount() < 2 )
if( m_Pcb->GetCopperLayerCount() < 2 )
{
if( layer != LAYER_N_BACK )
{
@ -193,7 +193,7 @@ void WinEDA_BasePcbFrame::SwitchLayer( wxDC* DC, int layer )
else
{
if( ( layer != LAYER_N_BACK ) && ( layer != LAYER_N_FRONT )
&& ( layer >= m_Pcb->m_BoardSettings->GetCopperLayerCount() - 1 ) )
&& ( layer >= m_Pcb->GetCopperLayerCount() - 1 ) )
{
return;
}
@ -273,15 +273,15 @@ BOARD_ITEM* WinEDA_BasePcbFrame::GetCurItem()
GENERAL_COLLECTORS_GUIDE WinEDA_BasePcbFrame::GetCollectorsGuide()
{
GENERAL_COLLECTORS_GUIDE guide( m_Pcb->m_BoardSettings->GetVisibleLayers(),
GENERAL_COLLECTORS_GUIDE guide( m_Pcb->GetVisibleLayers(),
( (PCB_SCREEN*)GetScreen())->m_Active_Layer );
// account for the globals
guide.SetIgnoreMTextsMarkedNoShow( ! g_DesignSettings.IsElementVisible( MOD_TEXT_INVISIBLE ));
guide.SetIgnoreMTextsOnCopper( ! g_DesignSettings.IsElementVisible( MOD_TEXT_BK_VISIBLE ));
guide.SetIgnoreMTextsOnCmp( ! g_DesignSettings.IsElementVisible( MOD_TEXT_FR_VISIBLE ));
guide.SetIgnoreModulesOnCu( !g_DesignSettings.IsElementVisible( MOD_BK_VISIBLE ) );
guide.SetIgnoreModulesOnCmp( !g_DesignSettings.IsElementVisible( MOD_FR_VISIBLE ) );
guide.SetIgnoreMTextsMarkedNoShow( ! m_Pcb->IsElementVisible( MOD_TEXT_INVISIBLE ));
guide.SetIgnoreMTextsOnCopper( ! m_Pcb->IsElementVisible( MOD_TEXT_BK_VISIBLE ));
guide.SetIgnoreMTextsOnCmp( ! m_Pcb->IsElementVisible( MOD_TEXT_FR_VISIBLE ));
guide.SetIgnoreModulesOnCu( ! m_Pcb->IsElementVisible( MOD_BK_VISIBLE ) );
guide.SetIgnoreModulesOnCmp( ! m_Pcb->IsElementVisible( MOD_FR_VISIBLE ) );
return guide;
}

81
pcbnew/class_board.cpp
View File

@ -14,6 +14,9 @@
*/
wxPoint BOARD_ITEM::ZeroOffset( 0, 0 );
// Current design settings (used also to read configs):
BOARD_DESIGN_SETTINGS boardDesignSettings;
/*****************/
/* Class BOARD: */
@ -25,7 +28,8 @@ BOARD::BOARD( EDA_BaseStruct* parent, WinEDA_BasePcbFrame* frame ) :
{
m_PcbFrame = frame;
m_Status_Pcb = 0; // Status word: bit 1 = calculate.
m_BoardSettings = &g_DesignSettings;
SetBoardDesignSettings(&boardDesignSettings);
SetColorsSettings(&g_ColorsSettings);
m_NbNodes = 0; // Number of connected pads.
m_NbNoconnect = 0; // Number of unconnected nets.
@ -181,15 +185,13 @@ int BOARD::GetCurrentMicroViaDrill()
}
wxString BOARD::GetLayerName( int aLayerIndex ) const
{
if( !IsValidLayerIndex( aLayerIndex ) )
return wxEmptyString;
// copper layer names are stored in the BOARD.
if( IsValidCopperLayerIndex( aLayerIndex )
&& m_BoardSettings->IsLayerEnabled( aLayerIndex ) )
if( IsValidCopperLayerIndex( aLayerIndex ) && IsLayerEnabled( aLayerIndex ) )
{
// default names were set in BOARD::BOARD() but they may be
// over-ridden by BOARD::SetLayerName()
@ -263,11 +265,11 @@ bool BOARD::SetLayerName( int aLayerIndex, const wxString& aLayerName )
// replace any spaces with underscores before we do any comparing
NameTemp.Replace( wxT( " " ), wxT( "_" ) );
if( m_BoardSettings->IsLayerEnabled( aLayerIndex ) )
if( IsLayerEnabled( aLayerIndex ) )
{
for( int i = 0; i < NB_COPPER_LAYERS; i++ )
{
if( i != aLayerIndex && m_BoardSettings->IsLayerEnabled( i )
if( i != aLayerIndex && IsLayerEnabled( i )
&& NameTemp == m_Layer[i].m_Name )
return false;
}
@ -288,7 +290,7 @@ LAYER_T BOARD::GetLayerType( int aLayerIndex ) const
//@@IMB: The original test was broken due to the discontinuity
// in the layer sequence.
if( m_BoardSettings->IsLayerEnabled( aLayerIndex ) )
if( IsLayerEnabled( aLayerIndex ) )
return m_Layer[aLayerIndex].m_Type;
return LT_SIGNAL;
}
@ -301,7 +303,7 @@ bool BOARD::SetLayerType( int aLayerIndex, LAYER_T aLayerType )
//@@IMB: The original test was broken due to the discontinuity
// in the layer sequence.
if( m_BoardSettings->IsLayerEnabled( aLayerIndex ) )
if( IsLayerEnabled( aLayerIndex ) )
{
m_Layer[aLayerIndex].m_Type = aLayerType;
return true;
@ -354,35 +356,36 @@ LAYER_T LAYER::ParseType( const char* aType )
int BOARD::GetCopperLayerCount() const
{
return m_BoardSettings->GetCopperLayerCount();
return GetBoardDesignSettings()->GetCopperLayerCount();
}
void BOARD::SetCopperLayerCount( int aCount )
{
m_BoardSettings->SetCopperLayerCount( aCount );
GetBoardDesignSettings()->SetCopperLayerCount( aCount );
}
int BOARD::GetEnabledLayers() const
{
return m_BoardSettings->GetEnabledLayers();
return GetBoardDesignSettings()->GetEnabledLayers();
}
int BOARD::GetVisibleLayers() const
{
return m_BoardSettings->GetVisibleLayers();
return GetBoardDesignSettings()->GetVisibleLayers();
}
void BOARD::SetEnabledLayers( int aLayerMask )
{
m_BoardSettings->SetEnabledLayers( aLayerMask );
GetBoardDesignSettings()->SetEnabledLayers( aLayerMask );
}
void BOARD::SetVisibleLayers( int aLayerMask )
{
m_BoardSettings->SetVisibleLayers( aLayerMask );
GetBoardDesignSettings()->SetVisibleLayers( aLayerMask );
}
@ -415,23 +418,13 @@ void BOARD::SetVisibleAlls( )
int BOARD::GetVisibleElements() const
{
return m_BoardSettings->GetVisibleElements();
return GetBoardDesignSettings()->GetVisibleElements();
}
bool BOARD::IsElementVisible( int aPCB_VISIBLE ) const
{
// @todo move these special cases into default, by moving globals into the board.
switch( aPCB_VISIBLE )
{
/*
case GRID_VISIBLE:
myframe->m_Draw_Grid = isEnabled;
break;
*/
default:
return m_BoardSettings->IsElementVisible( aPCB_VISIBLE );
}
return GetBoardDesignSettings()->IsElementVisible( aPCB_VISIBLE );
}
@ -441,12 +434,12 @@ void BOARD::SetElementVisibility( int aPCB_VISIBLE, bool isEnabled )
{
case GRID_VISIBLE:
m_PcbFrame->m_Draw_Grid = isEnabled;
m_BoardSettings->SetElementVisibility( aPCB_VISIBLE, isEnabled );
GetBoardDesignSettings()->SetElementVisibility( aPCB_VISIBLE, isEnabled );
break;
case RATSNEST_VISIBLE:
m_BoardSettings->SetElementVisibility( aPCB_VISIBLE, isEnabled );
GetBoardDesignSettings()->SetElementVisibility( aPCB_VISIBLE, isEnabled );
// we must clear or set the CH_VISIBLE flags to hide/show ratsnet
// because we have a tool to show hide ratsnest relative to a pad or a module
// so the hide/show option is a per item selection
@ -464,7 +457,7 @@ void BOARD::SetElementVisibility( int aPCB_VISIBLE, bool isEnabled )
default:
m_BoardSettings->SetElementVisibility( aPCB_VISIBLE, isEnabled );
GetBoardDesignSettings()->SetElementVisibility( aPCB_VISIBLE, isEnabled );
}
}
@ -485,7 +478,7 @@ int BOARD::GetVisibleElementColor( int aPCB_VISIBLE )
case PAD_FR_VISIBLE:
case PAD_BK_VISIBLE:
case RATSNEST_VISIBLE:
color = g_ColorsSettings.GetItemColor( aPCB_VISIBLE );
color = GetColorsSettings()->GetItemColor( aPCB_VISIBLE );
break;
case GRID_VISIBLE:
color = g_GridColor;
@ -512,10 +505,10 @@ void BOARD::SetVisibleElementColor( int aPCB_VISIBLE, int aColor )
case ANCHOR_VISIBLE:
case PAD_FR_VISIBLE:
case PAD_BK_VISIBLE:
g_ColorsSettings.SetItemColor( aPCB_VISIBLE, aColor );
GetColorsSettings()->SetItemColor( aPCB_VISIBLE, aColor );
break;
case RATSNEST_VISIBLE:
g_ColorsSettings.SetItemColor( aPCB_VISIBLE, aColor );
GetColorsSettings()->SetItemColor( aPCB_VISIBLE, aColor );
break;
case GRID_VISIBLE:
@ -530,15 +523,35 @@ void BOARD::SetVisibleElementColor( int aPCB_VISIBLE, int aColor )
void BOARD::SetLayerColor( int aLayer, int aColor )
{
g_ColorsSettings.SetLayerColor( aLayer, aColor );
GetColorsSettings()->SetLayerColor( aLayer, aColor );
}
int BOARD::GetLayerColor( int aLayer )
{
return g_ColorsSettings.GetLayerColor( aLayer );
return GetColorsSettings()->GetLayerColor( aLayer );
}
/**
* Function IsModuleLayerVisible
* expects either of the two layers on which a module can reside, and returns
* whether that layer is visible.
* @param layer One of the two allowed layers for modules: LAYER_N_FRONT or LAYER_N_BACK
* @return bool - true if the layer is visible, else false.
*/
bool BOARD::IsModuleLayerVisible( int layer )
{
if( layer==LAYER_N_FRONT )
return IsElementVisible( PCB_VISIBLE(MOD_FR_VISIBLE) );
else if( layer==LAYER_N_BACK )
return IsElementVisible( PCB_VISIBLE(MOD_BK_VISIBLE) );
else
return true;
}
wxPoint& BOARD::GetPosition()
{

143
pcbnew/class_board.h
View File

@ -7,10 +7,11 @@
#include "dlist.h"
#include "class_netinfo.h"
#include "class_colors_design_settings.h"
#include "class_board_design_settings.h"
class ZONE_CONTAINER;
class EDA_BoardDesignSettings;
/**
@ -62,7 +63,7 @@ struct LAYER
/** a small helper class to handle a stock of specific vias diameter and drill pair
* in the BOARD class
*/
*/
class VIA_DIMENSION
{
public:
@ -74,15 +75,18 @@ public:
m_Diameter = 0; m_Drill = 0;
}
bool operator == (const VIA_DIMENSION& other) const
bool operator ==( const VIA_DIMENSION& other ) const
{
return (m_Diameter == other.m_Diameter) &&
(m_Drill == other.m_Drill);
return (m_Diameter == other.m_Diameter)
&& (m_Drill == other.m_Drill);
}
bool operator < (const VIA_DIMENSION& other) const
bool operator <( const VIA_DIMENSION& other ) const
{
if (m_Diameter != other.m_Diameter)
return (m_Diameter < other.m_Diameter);
if( m_Diameter != other.m_Diameter )
return m_Diameter < other.m_Diameter;
return m_Drill < other.m_Drill;
}
};
@ -99,18 +103,17 @@ class BOARD : public BOARD_ITEM
private:
typedef std::vector<MARKER_PCB*> MARKERS; // @todo: switch to boost:ptr_vector, and change ~BOARD()
MARKERS m_markers; ///< MARKER_PCBs for clearance problems, owned by pointer
MARKERS m_markers; ///< MARKER_PCBs for clearance problems, owned by pointer
typedef std::vector<ZONE_CONTAINER*> ZONE_CONTAINERS; // @todo: switch to boost::ptr_vector, and change ~BOARD()
ZONE_CONTAINERS m_ZoneDescriptorList; ///< edge zone descriptors, owned by pointer
ZONE_CONTAINERS m_ZoneDescriptorList; ///< edge zone descriptors, owned by pointer
LAYER m_Layer[NB_COPPER_LAYERS];
LAYER m_Layer[NB_COPPER_LAYERS];
public:
WinEDA_BasePcbFrame* m_PcbFrame; // Window of visualization
EDA_Rect m_BoundaryBox; // Board size and position
WinEDA_BasePcbFrame* m_PcbFrame; // Window of visualization
EDA_Rect m_BoundaryBox; // Board size and position
int m_Status_Pcb; // Flags used in ratsnet calculation and update
EDA_BoardDesignSettings* m_BoardSettings; // Link to current design settings
int m_NbNodes; // Active pads (pads attached to a net ) count
int m_NbNoconnect; // Active ratsnet count (rastnests not already connected by tracks)
@ -137,12 +140,16 @@ public:
// the first value is always the value of the current NetClass
// The others values are extra values
std::vector <VIA_DIMENSION> m_ViasDimensionsList; // vias size and drill list(max count = HISTORY_MAX_COUNT)
// The first value is the current netclass via size
std::vector <int> m_TrackWidthList; // tracks widths (max count = HISTORY_MAX_COUNT)
// The first value is the current netclass track width
unsigned m_ViaSizeSelector; // index for m_ViaSizeList to select the value
// 0 is the index selection of the default value Netclass
unsigned m_TrackWidthSelector; // index for m_TrackWidthList to select the value
// The first value is the current netclass via size
std::vector <int> m_TrackWidthList; // tracks widths (max count = HISTORY_MAX_COUNT)
// The first value is the current netclass track width
unsigned m_ViaSizeSelector; // index for m_ViaSizeList to select the value
// 0 is the index selection of the default value Netclass
unsigned m_TrackWidthSelector; // index for m_TrackWidthList to select the value
private:
BOARD_DESIGN_SETTINGS* m_boardDesignSettings; // Link to current design settings
COLORS_DESIGN_SETTINGS* m_colorsSettings; // Link to current colors settings
/**********************************/
public:
@ -246,7 +253,7 @@ public:
* Function GetCopperLayerCount
* @return int - The number of copper layers in the BOARD.
*/
int GetCopperLayerCount() const;
int GetCopperLayerCount() const;
void SetCopperLayerCount( int aCount );
@ -257,7 +264,7 @@ public:
* Returns a bit-mask of all the layers that are enabled
* @return int - the enabled layers in bit-mapped form.
*/
int GetEnabledLayers() const;
int GetEnabledLayers() const;
/**
* Function SetEnabledLayers
@ -267,13 +274,37 @@ public:
*/
void SetEnabledLayers( int aLayerMask );
/**
* Function IsLayerEnabled
* is a proxy function that calls the correspondent function in m_BoardSettings
* tests whether a given layer is enabled
* @param aLayerIndex = The index of the layer to be tested
* @return bool - true if the layer is visible.
*/
bool IsLayerEnabled( int aLayer ) const
{
return GetBoardDesignSettings()->IsLayerEnabled( aLayer );
}
/**
* Function IsLayerVisible
* is a proxy function that calls the correspondent function in m_BoardSettings
* tests whether a given layer is visible
* @param aLayerIndex = The index of the layer to be tested
* @return bool - true if the layer is visible.
*/
bool IsLayerVisible( int aLayerIndex ) const
{
return GetBoardDesignSettings()->IsLayerVisible( aLayerIndex );
}
/**
* Function GetVisibleLayers
* is a proxy function that calls the correspondent function in m_BoardSettings
* Returns a bit-mask of all the layers that are visible
* @return int - the visible layers in bit-mapped form.
*/
int GetVisibleLayers() const;
int GetVisibleLayers() const;
/**
* Function SetVisibleLayers
@ -309,7 +340,7 @@ public:
* changes the bit-mask of visible element categories and layers
* @see enum PCB_VISIBLE
*/
void SetVisibleAlls( );
void SetVisibleAlls();
/**
* Function IsElementVisible
@ -330,6 +361,15 @@ public:
*/
void SetElementVisibility( int aPCB_VISIBLE, bool aNewState );
/**
* Function IsModuleLayerVisible
* expects either of the two layers on which a module can reside, and returns
* whether that layer is visible.
* @param layer One of the two allowed layers for modules: LAYER_N_FRONT or LAYER_N_BACK
* @return bool - true if the layer is visible, else false.
*/
bool IsModuleLayerVisible( int layer );
/**
* Function GetVisibleElementColor
* returns the color of a pcb visible element.
@ -339,6 +379,40 @@ public:
void SetVisibleElementColor( int aPCB_VISIBLE, int aColor );
/** Function GetBoardDesignSettings
* @return the current BOARD_DESIGN_SETTINGS in use
*/
BOARD_DESIGN_SETTINGS* GetBoardDesignSettings() const
{
return m_boardDesignSettings;
}
/** Function SetBoardDesignSettings
* @param aDesignSettings = the new BOARD_DESIGN_SETTINGS to use
*/
void SetBoardDesignSettings( BOARD_DESIGN_SETTINGS* aDesignSettings)
{
m_boardDesignSettings = aDesignSettings;
}
/** Function SetBoardSettings
* @return the current COLORS_DESIGN_SETTINGS in use
*/
COLORS_DESIGN_SETTINGS* GetColorsSettings() const
{
return m_colorsSettings;
}
/** Function SetColorsSettings
* @param aColorsSettings = the new COLORS_DESIGN_SETTINGS to use
*/
void SetColorsSettings(COLORS_DESIGN_SETTINGS* aColorsSettings)
{
m_colorsSettings = aColorsSettings;
}
/**
* Function GetLayerName
* returns the name of the layer given by aLayerIndex.
@ -391,7 +465,6 @@ public:
*/
int GetLayerColor( int aLayer );
/* Functions to get some items count */
int GetNumSegmTrack();
int GetNumSegmZone();
@ -501,6 +574,7 @@ public:
/**************************************/
/** function relative to NetClasses: **/
/**************************************/
/**
* Function SynchronizeNetsAndNetClasses
* copies NETCLASS info to each NET, based on NET membership in a NETCLASS.
@ -510,7 +584,7 @@ public:
* @param none
* @return none
*/
void SynchronizeNetsAndNetClasses();
void SynchronizeNetsAndNetClasses();
/**
* Function SetCurrentNetClass
@ -520,12 +594,12 @@ public:
* @param aNetClassName = the new netclass name
* @return true if lists of tracks and vias sizes are modified
*/
bool SetCurrentNetClass( const wxString& aNetClassName );
bool SetCurrentNetClass( const wxString& aNetClassName );
/** function GetBiggestClearanceValue
* @return the biggest clearance value found in NetClasses list
*/
int GetBiggestClearanceValue();
int GetBiggestClearanceValue();
/** function GetCurrentTrackWidth
* @return the current track width, according to the selected options
@ -537,6 +611,7 @@ public:
return m_TrackWidthList[m_TrackWidthSelector];
}
/** function GetCurrentViaSize
* @return the current via size, according to the selected options
* ( using the default netclass value or a preset value )
@ -547,6 +622,7 @@ public:
return m_ViasDimensionsList[m_ViaSizeSelector].m_Diameter;
}
/** function GetCurrentViaDrill
* @return the current via size, according to the selected options
* ( using the default netclass value or a preset value )
@ -555,29 +631,31 @@ public:
int GetCurrentViaDrill()
{
return m_ViasDimensionsList[m_ViaSizeSelector].m_Drill > 0 ?
m_ViasDimensionsList[m_ViaSizeSelector].m_Drill : -1;
m_ViasDimensionsList[m_ViaSizeSelector].m_Drill : -1;
}
/** function GetCurrentMicroViaSize
* @return the current micro via size,
* that is the current netclass value
*/
int GetCurrentMicroViaSize();
int GetCurrentMicroViaSize();
/** function GetCurrentMicroViaDrill
* @return the current micro via drill,
* that is the current netclass value
*/
int GetCurrentMicroViaDrill();
int GetCurrentMicroViaDrill();
/***************************************************************************/
/**
* Function Save
* writes the data structures for this object out to a FILE in "*.brd" format.
* @param aFile The FILE to write to.
* @return bool - true if success writing else false.
*/
bool Save( FILE* aFile ) const;
bool Save( FILE* aFile ) const;
/**
@ -860,7 +938,6 @@ public:
* @param aNetcode = netcode to analyze. if -1, analyze all nets
*/
void Test_Connections_To_Copper_Areas( int aNetcode = -1 );
};
#endif // #ifndef CLASS_BOARD_H

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