AllSpiceMirrors/kicad
7
Fork 0
mirror of https://gitlab.com/kicad/code/kicad.git synced 2025-04-18 21:19:20 +00:00
Files Issues Releases Activity

Fix Pcbnew KICAD_T enum names for consistency.

Browse Source
This commit is contained in:
Wayne Stambaugh 2011-10-01 15:24:27 -04:00
parent 4b853dedb4
commit c2f1113e5d
80 changed files with 756 additions and 687 deletions
3d-viewer
3d_draw.cpp
Documentation/guidelines
UIpolicies.txt
gerbview
export_to_pcbnew.cpp
include
base_struct.hclass_base_screen.hclass_board_item.h
pcbnew
attribut.cppautoplac.cppautorout.cppblock.cppblock_module_editor.cppboard.cppboard_items_to_polygon_shape_transform.cppboard_undo_redo.cppclass_board.cppclass_board_item.cppclass_dimension.cppclass_drawsegment.cppclass_drawsegment.hclass_edge_mod.cppclass_marker_pcb.cppclass_module.cppclass_module_transform_functions.cppclass_netinfo_item.cppclass_pad.cppclass_pcb_text.cppclass_text_mod.cppclass_track.cppclass_track.hclass_zone.cppclasspcb.cppclean.cppcollectors.cppcollectors.hconnect.cppcontrole.cppcross-probing.cppdeltrack.cpp
dialogs
dialog_gendrill.cppdialog_global_deletion.cpp
dragsegm.cppdrc_clearance_test_functions.cppdrc_marker_functions.cppedgemod.cppedit.cppedit_track_width.cppeditedge.cppeditmod.cppeditrack-part2.cppeditrack.cppedtxtmod.cppexport_gencad.cppexport_vrml.cppgen_drill_report_files.cppgen_holes_and_tools_lists_for_drill.cppgen_modules_placefile.cppgraphpcb.cpphotkeys_board_editor.cpphotkeys_module_editor.cppioascii.cppmagnetic_tracks_functions.cppmodedit.cppmodedit_onclick.cppmove_or_drag_track.cpponleftclick.cpponrightclick.cppplot_rtn.cppprint_board_functions.cppratsnest.cppsolve.cppspecctra_export.cppsurbrill.cppswap_layers.cpptr_modif.cpptracepcb.cppxchgmod.cppzones_convert_brd_items_to_polygons_with_Boost.cppzones_convert_brd_items_to_polygons_with_Kbool.cppzones_polygons_insulated_copper_islands.cppzones_polygons_test_connections.cpp

13
3d-viewer/3d_draw.cpp
View File

@ -235,10 +235,11 @@ GLuint EDA_3D_CANVAS::CreateDrawGL_List()
0.0F );
glNormal3f( 0.0, 0.0, 1.0 ); // Normal is Z axis
/* draw tracks and vias : */
for( track = pcb->m_Track; track != NULL; track = track->Next() )
{
if( track->Type() == TYPE_VIA )
if( track->Type() == PCB_VIA_T )
Draw3D_Via( (SEGVIA*) track );
else
Draw3D_Track( track );
@ -249,7 +250,7 @@ GLuint EDA_3D_CANVAS::CreateDrawGL_List()
// Draw segments used to fill copper areas. outdated!
for( segzone = pcb->m_Zone; segzone != NULL; segzone = segzone->Next() )
{
if( segzone->Type() == TYPE_ZONE )
if( segzone->Type() == PCB_ZONE_T )
Draw3D_Track( segzone );
}
@ -350,11 +351,11 @@ GLuint EDA_3D_CANVAS::CreateDrawGL_List()
{
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
Draw3D_DrawSegment( (DRAWSEGMENT*) PtStruct );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
Draw3D_DrawText( (TEXTE_PCB*) PtStruct );
break;
@ -733,10 +734,10 @@ void MODULE::Draw3D( EDA_3D_CANVAS* glcanvas )
{
switch( Struct->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE* edge = (EDGE_MODULE*) Struct;

2
Documentation/guidelines/UIpolicies.txt
View File

@ -32,7 +32,7 @@ Dialogs:
Configure the sizers so that as the dialog window is expanded, the most
sensible use of the increased dialog window occurs automatically by the
sizers. For example, in the DRC dialog of PCBNEW, sizers should be used to
sizers. For example, in the DRC dialog of Pcbnew, sizers should be used to
expand the text control to use the full available free window area, so that
the user's view of the items in the text control is maximized as he/she
expands the dialog window, making it easier to read more DRC error messages.

5
gerbview/export_to_pcbnew.cpp
View File

@ -241,7 +241,7 @@ bool GBR_TO_PCB_EXPORTER::ExportPcb( int* LayerLookUpTable )
void GBR_TO_PCB_EXPORTER::export_non_copper_item( GERBER_DRAW_ITEM* aGbrItem, int aLayer )
{
DRAWSEGMENT* drawitem = new DRAWSEGMENT( m_pcb, TYPE_DRAWSEGMENT );
DRAWSEGMENT* drawitem = new DRAWSEGMENT( m_pcb, PCB_LINE_T );
drawitem->SetLayer( aLayer );
drawitem->m_Start = aGbrItem->m_Start;
@ -253,11 +253,12 @@ void GBR_TO_PCB_EXPORTER::export_non_copper_item( GERBER_DRAW_ITEM* aGbrItem, in
double a = atan2( (double)( aGbrItem->m_Start.y - aGbrItem->m_ArcCentre.y),
(double)( aGbrItem->m_Start.x - aGbrItem->m_ArcCentre.x ) );
double b = atan2( (double)( aGbrItem->m_End.y - aGbrItem->m_ArcCentre.y ),
(double)( aGbrItem->m_End.x - aGbrItem->m_ArcCentre.x ) );
(double)( aGbrItem->m_End.x - aGbrItem->m_ArcCentre.x ) );
drawitem->m_Shape = S_ARC;
drawitem->m_Angle = wxRound( (a - b) / M_PI * 1800.0 );
drawitem->m_Start = aGbrItem->m_ArcCentre;
if( drawitem->m_Angle < 0 )
{
NEGATE( drawitem->m_Angle );

32
include/base_struct.h
View File

@ -26,26 +26,26 @@ enum KICAD_T {
EOT = 0, // search types array terminator (End Of Types)
TYPE_NOT_INIT = 0,
TYPE_PCB,
TYPE_SCREEN, // not really an item, used to identify a screen
PCB_T,
SCREEN_T, // not really an item, used to identify a screen
// Items in pcb
TYPE_MODULE, // a footprint
TYPE_PAD, // a pad in a footprint
TYPE_DRAWSEGMENT, // a segment not on copper layers
TYPE_TEXTE, // a text on a layer
TYPE_TEXTE_MODULE, // a text in a footprint
TYPE_EDGE_MODULE, // a footprint edge
TYPE_TRACK, // a track segment (segment on a copper layer)
TYPE_VIA, // a via (like atrack segment on a copper layer)
TYPE_ZONE, // a segment used to fill a zone area (segment on a
PCB_MODULE_T, // a footprint
PCB_PAD_T, // a pad in a footprint
PCB_LINE_T, // a segment not on copper layers
PCB_TEXT_T, // a text on a layer
PCB_MODULE_TEXT_T, // a text in a footprint
PCB_MODULE_EDGE_T, // a footprint edge
PCB_TRACE_T, // a track segment (segment on a copper layer)
PCB_VIA_T, // a via (like atrack segment on a copper layer)
PCB_ZONE_T, // a segment used to fill a zone area (segment on a
// copper layer)
TYPE_MARKER_PCB, // a marker used to show something
TYPE_DIMENSION, // a dimension (graphic item)
PCB_MARKER_T, // a marker used to show something
PCB_DIMENSION_T, // a dimension (graphic item)
PCB_TARGET_T, // a target (graphic item)
TYPE_ZONE_EDGE_CORNER, // in zone outline: a point to define an outline
TYPE_ZONE_CONTAINER, // a zone area
TYPE_BOARD_ITEM_LIST, // a list of board items
PCB_ZONE_EDGE_T, // in zone outline: a point to define an outline
PCB_ZONE_AREA_T, // a zone area
PCB_ITEM_LIST_T, // a list of board items
// Schematic draw Items. The order of these items effects the sort order.
// It is currenlty ordered to mimic the old Eeschema locate behavior where

2
include/class_base_screen.h
View File

@ -127,7 +127,7 @@ public:
bool m_IsPrinting;
public:
BASE_SCREEN( KICAD_T aType = TYPE_SCREEN );
BASE_SCREEN( KICAD_T aType = SCREEN_T );
~BASE_SCREEN();
/**

6
include/class_board_item.h
View File

@ -125,7 +125,7 @@ public:
*/
bool IsTrack() const
{
return ( Type() == TYPE_TRACK ) || ( Type() == TYPE_VIA );
return ( Type() == PCB_TRACE_T ) || ( Type() == PCB_VIA_T );
}
/**
@ -301,7 +301,7 @@ class BOARD_ITEM_LIST : public BOARD_ITEM
ITEM_ARRAY myItems;
BOARD_ITEM_LIST( const BOARD_ITEM_LIST& other ) :
BOARD_ITEM( NULL, TYPE_BOARD_ITEM_LIST )
BOARD_ITEM( NULL, PCB_ITEM_LIST_T )
{
// copy constructor is not supported, is private to cause compiler error
}
@ -309,7 +309,7 @@ class BOARD_ITEM_LIST : public BOARD_ITEM
public:
BOARD_ITEM_LIST( BOARD_ITEM* aParent = NULL ) :
BOARD_ITEM( aParent, TYPE_BOARD_ITEM_LIST )
BOARD_ITEM( aParent, PCB_ITEM_LIST_T )
{}
//-----< satisfy some virtual functions >------------------------------

2
pcbnew/attribut.cpp
View File

@ -39,7 +39,7 @@ void PCB_EDIT_FRAME::Attribut_Track( TRACK* track, wxDC* DC, bool Flag_On )
TRACK* Track;
int nb_segm;
if( (track == NULL ) || (track->Type() == TYPE_ZONE) )
if( (track == NULL ) || (track->Type() == PCB_ZONE_T) )
return;
DrawPanel->CrossHairOff( DC ); // Erase cursor shape

4
pcbnew/autoplac.cpp
View File

@ -454,7 +454,7 @@ int PCB_EDIT_FRAME::GenPlaceBoard()
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
DrawSegm = (DRAWSEGMENT*) PtStruct;
if( DrawSegm->GetLayer() != EDGE_N )
@ -469,7 +469,7 @@ int PCB_EDIT_FRAME::GenPlaceBoard()
Board.m_GridRouting, WRITE_CELL );
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
default:
break;
}

6
pcbnew/autorout.cpp
View File

@ -57,7 +57,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
{
switch( GetScreen()->GetCurItem()->Type() )
{
case TYPE_PAD:
case PCB_PAD_T:
Pad = (D_PAD*) GetScreen()->GetCurItem();
autoroute_net_code = Pad->GetNet();
break;
@ -74,7 +74,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
case ROUTE_MODULE:
Module = (MODULE*) GetScreen()->GetCurItem();
if( (Module == NULL) || (Module->Type() != TYPE_MODULE) )
if( (Module == NULL) || (Module->Type() != PCB_MODULE_T) )
{
wxMessageBox( _( "Module not selected" ) );
return;
@ -84,7 +84,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
case ROUTE_PAD:
Pad = (D_PAD*) GetScreen()->GetCurItem();
if( (Pad == NULL) || (Pad->Type() != TYPE_PAD) )
if( (Pad == NULL) || (Pad->Type() != PCB_PAD_T) )
{
wxMessageBox( _( "Pad not selected" ) );
return;

106
pcbnew/block.cpp
View File

@ -447,7 +447,7 @@ void PCB_EDIT_FRAME::Block_SelectItems()
bool select_me = false;
switch( PtStruct->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
if( (g_TabOneLayerMask[PtStruct->GetLayer()] & layerMask) == 0 )
break;
@ -457,7 +457,7 @@ void PCB_EDIT_FRAME::Block_SelectItems()
select_me = true; // This item is in bloc: select it
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
if( !blockIncludePcbTexts )
break;
@ -477,7 +477,7 @@ void PCB_EDIT_FRAME::Block_SelectItems()
select_me = true; // This item is in bloc: select it
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
if( ( g_TabOneLayerMask[PtStruct->GetLayer()] & layerMask ) == 0 )
break;
@ -535,22 +535,22 @@ static void drawPickedItems( EDA_DRAW_PANEL* aPanel, wxDC* aDC, wxPoint aOffset
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
frame->GetBoard()->m_Status_Pcb &= ~RATSNEST_ITEM_LOCAL_OK;
DrawModuleOutlines( aPanel, aDC, (MODULE*) item );
break;
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_TRACK:
case TYPE_VIA:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TRACE_T:
case PCB_VIA_T:
case PCB_TARGET_T:
case TYPE_DIMENSION: // Currently markers are not affected by block commands
case TYPE_MARKER_PCB:
case PCB_DIMENSION_T: // Currently markers are not affected by block commands
case PCB_MARKER_T:
item->Draw( aPanel, aDC, GR_XOR, aOffset );
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
item->Draw( aPanel, aDC, GR_XOR, aOffset );
((ZONE_CONTAINER*) item)->DrawFilledArea( aPanel, aDC, GR_XOR, aOffset );
break;
@ -617,7 +617,7 @@ void PCB_EDIT_FRAME::Block_Delete()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* module = (MODULE*) item;
module->m_Flags = 0;
@ -626,22 +626,22 @@ void PCB_EDIT_FRAME::Block_Delete()
}
break;
case TYPE_ZONE_CONTAINER: // a zone area
case PCB_ZONE_AREA_T: // a zone area
m_Pcb->Remove( item );
break;
case TYPE_DRAWSEGMENT: // a segment not on copper layers
case TYPE_TEXTE: // a text on a layer
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like atrack segment on a copper layer)
case TYPE_DIMENSION: // a dimension (graphic item)
case PCB_TARGET_T: // a target (graphic item)
case PCB_LINE_T: // a segment not on copper layers
case PCB_TEXT_T: // a text on a layer
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like atrack segment on a copper layer)
case PCB_DIMENSION_T: // a dimension (graphic item)
case PCB_TARGET_T: // a target (graphic item)
item->UnLink();
break;
// These items are deleted, but not put in undo list
case TYPE_MARKER_PCB: // a marker used to show something
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_MARKER_T: // a marker used to show something
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
item->UnLink();
itemsList->RemovePicker( ii );
ii--;
@ -689,26 +689,26 @@ void PCB_EDIT_FRAME::Block_Rotate()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
( (MODULE*) item )->m_Flags = 0;
m_Pcb->m_Status_Pcb = 0;
break;
/* Move and rotate the track segments */
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like atrack segment on a copper layer)
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like atrack segment on a copper layer)
m_Pcb->m_Status_Pcb = 0;
break;
case TYPE_ZONE_CONTAINER:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case PCB_ZONE_AREA_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
break;
// This item is not put in undo list
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
itemsList->RemovePicker( ii );
ii--;
break;
@ -755,26 +755,26 @@ void PCB_EDIT_FRAME::Block_Flip()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
item->m_Flags = 0;
m_Pcb->m_Status_Pcb = 0;
break;
/* Move and rotate the track segments */
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like atrack segment on a copper layer)
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like atrack segment on a copper layer)
m_Pcb->m_Status_Pcb = 0;
break;
case TYPE_ZONE_CONTAINER:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case PCB_ZONE_AREA_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
break;
// This item is not put in undo list
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
itemsList->RemovePicker( ii );
ii--;
break;
@ -815,26 +815,26 @@ void PCB_EDIT_FRAME::Block_Move()
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
m_Pcb->m_Status_Pcb = 0;
item->m_Flags = 0;
break;
/* Move track segments */
case TYPE_TRACK: // a track segment (segment on a copper layer)
case TYPE_VIA: // a via (like a track segment on a copper layer)
case PCB_TRACE_T: // a track segment (segment on a copper layer)
case PCB_VIA_T: // a via (like a track segment on a copper layer)
m_Pcb->m_Status_Pcb = 0;
break;
case TYPE_ZONE_CONTAINER:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case PCB_ZONE_AREA_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
break;
// This item is not put in undo list
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
itemsList->RemovePicker( ii );
ii--;
break;
@ -878,7 +878,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
newitem = NULL;
switch( item->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* module = (MODULE*) item;
MODULE* new_module;
@ -891,8 +891,8 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
{
TRACK* track = (TRACK*) item;
m_Pcb->m_Status_Pcb = 0;
@ -902,10 +902,10 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_ZONE: // SEG_ZONE items are now deprecated
case PCB_ZONE_T: // SEG_ZONE items are now deprecated
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
{
ZONE_CONTAINER* new_zone = new ZONE_CONTAINER( (BOARD*) item->GetParent() );
new_zone->Copy( (ZONE_CONTAINER*) item );
@ -915,7 +915,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
{
DRAWSEGMENT* new_drawsegment = new DRAWSEGMENT( m_Pcb );
new_drawsegment->Copy( (DRAWSEGMENT*) item );
@ -924,7 +924,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
{
TEXTE_PCB* new_pcbtext = new TEXTE_PCB( m_Pcb );
new_pcbtext->Copy( (TEXTE_PCB*) item );
@ -942,7 +942,7 @@ void PCB_EDIT_FRAME::Block_Duplicate()
}
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
{
DIMENSION* new_cotation = new DIMENSION( m_Pcb );
new_cotation->Copy( (DIMENSION*) item );

28
pcbnew/block_module_editor.cpp
View File

@ -303,8 +303,8 @@ static void DrawMovingBlockOutlines( EDA_DRAW_PANEL* aPanel, wxDC* aDC, const wx
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
item->Draw( aPanel, aDC, g_XorMode, move_offset );
break;
@ -342,8 +342,8 @@ static void DrawMovingBlockOutlines( EDA_DRAW_PANEL* aPanel, wxDC* aDC, const wx
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
item->Draw( aPanel, aDC, g_XorMode, move_offset );
break;
@ -393,7 +393,7 @@ void CopyMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
TEXTE_MODULE * textm;
textm = new TEXTE_MODULE( module );
textm->Copy( (TEXTE_MODULE*) item );
@ -401,7 +401,7 @@ void CopyMarkedItems( MODULE* module, wxPoint offset )
module->m_Drawings.PushFront( textm );
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
EDGE_MODULE * edge;
edge = new EDGE_MODULE( module );
edge->Copy( (EDGE_MODULE*) item );
@ -448,12 +448,12 @@ void MoveMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
( (TEXTE_MODULE*) item )->m_Pos += offset;
( (TEXTE_MODULE*) item )->m_Pos0 += offset;
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
( (EDGE_MODULE*) item )->m_Start += offset;
( (EDGE_MODULE*) item )->m_End += offset;
@ -542,7 +542,7 @@ void MirrorMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE * edge = (EDGE_MODULE*) item;
SETMIRROR( edge->m_Start.x );
@ -553,7 +553,7 @@ void MirrorMarkedItems( MODULE* module, wxPoint offset )
}
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
SETMIRROR( ( (TEXTE_MODULE*) item )->GetPosition().x );
( (TEXTE_MODULE*) item )->m_Pos0.x = ( (TEXTE_MODULE*) item )->GetPosition().x;
break;
@ -600,14 +600,14 @@ void RotateMarkedItems( MODULE* module, wxPoint offset )
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
ROTATE( ( (EDGE_MODULE*) item )->m_Start );
( (EDGE_MODULE*) item )->m_Start0 = ( (EDGE_MODULE*) item )->m_Start;
ROTATE( ( (EDGE_MODULE*) item )->m_End );
( (EDGE_MODULE*) item )->m_End0 = ( (EDGE_MODULE*) item )->m_End;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
ROTATE( ( (TEXTE_MODULE*) item )->GetPosition() );
( (TEXTE_MODULE*) item )->m_Pos0 = ( (TEXTE_MODULE*) item )->GetPosition();
( (TEXTE_MODULE*) item )->m_Orient += 900;
@ -676,7 +676,7 @@ int MarkItemsInBloc( MODULE* module, EDA_RECT& Rect )
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
if( ((EDGE_MODULE*)item )->HitTest( Rect ) )
{
item->m_Selected = IS_SELECTED;
@ -685,7 +685,7 @@ int MarkItemsInBloc( MODULE* module, EDA_RECT& Rect )
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
pos = ( (TEXTE_MODULE*) item )->GetPosition();
if( Rect.Contains( pos ) )

6
pcbnew/board.cpp
View File

@ -200,7 +200,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
{
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE* edge = (EDGE_MODULE*) item;
@ -232,7 +232,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
{
switch( item->Type() )
{
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
{
DRAWSEGMENT* DrawSegm;
@ -257,7 +257,7 @@ void PlaceCells( BOARD* aPcb, int net_code, int flag )
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
{
TEXTE_PCB* PtText;
PtText = (TEXTE_PCB*) item;

2
pcbnew/board_items_to_polygon_shape_transform.cpp
View File

@ -197,7 +197,7 @@ void TRACK:: TransformShapeWithClearanceToPolygon( std:: vector < CPolyPt>& aCor
switch( Type() )
{
case TYPE_VIA:
case PCB_VIA_T:
dx = (int) ( dx * aCorrectionFactor );
for( ii = 0; ii < aCircleToSegmentsCount; ii++ )

43
pcbnew/board_undo_redo.cpp
View File

@ -138,8 +138,9 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
// Swap layers:
if( aItem->Type() != TYPE_MODULE && aItem->Type() != TYPE_ZONE_CONTAINER ) // these items have a global swap function
if( aItem->Type() != PCB_MODULE_T && aItem->Type() != PCB_ZONE_AREA_T )
{
// These items have a global swap function.
int layer, layerimg;
layer = aItem->GetLayer();
layerimg = aImage->GetLayer();
@ -149,7 +150,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
switch( aItem->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* tmp = (MODULE*) DuplicateStruct( aImage );
( (MODULE*) aImage )->Copy( (MODULE*) aItem );
@ -158,7 +159,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
{
ZONE_CONTAINER* tmp = (ZONE_CONTAINER*) DuplicateStruct( aImage );
( (ZONE_CONTAINER*) aImage )->Copy( (ZONE_CONTAINER*) aItem );
@ -167,15 +168,15 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
EXCHG( ( (DRAWSEGMENT*) aItem )->m_Start, ( (DRAWSEGMENT*) aImage )->m_Start );
EXCHG( ( (DRAWSEGMENT*) aItem )->m_End, ( (DRAWSEGMENT*) aImage )->m_End );
EXCHG( ( (DRAWSEGMENT*) aItem )->m_Width, ( (DRAWSEGMENT*) aImage )->m_Width );
EXCHG( ( (DRAWSEGMENT*) aItem )->m_Shape, ( (DRAWSEGMENT*) aImage )->m_Shape );
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
{
TRACK* track = (TRACK*) aItem;
TRACK* image = (TRACK*) aImage;
@ -207,7 +208,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
EXCHG( ( (TEXTE_PCB*) aItem )->m_Mirror, ( (TEXTE_PCB*) aImage )->m_Mirror );
EXCHG( ( (TEXTE_PCB*) aItem )->m_Size, ( (TEXTE_PCB*) aImage )->m_Size );
EXCHG( ( (TEXTE_PCB*) aItem )->m_Pos, ( (TEXTE_PCB*) aImage )->m_Pos );
@ -227,7 +228,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
EXCHG( ( (PCB_TARGET*) aItem )->m_Shape, ( (PCB_TARGET*) aImage )->m_Shape );
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
{
wxString txt = ( (DIMENSION*) aItem )->GetText();
( (DIMENSION*) aItem )->SetText( ( (DIMENSION*) aImage )->GetText() );
@ -241,7 +242,7 @@ void SwapData( BOARD_ITEM* aItem, BOARD_ITEM* aImage )
}
break;
case TYPE_ZONE:
case PCB_ZONE_T:
default:
wxMessageBox( wxT( "SwapData() error: unexpected type" ) );
break;
@ -262,7 +263,7 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
switch( aItem->Type() )
{
case TYPE_MODULE:
case PCB_MODULE_T:
{
MODULE* new_module;
new_module = new MODULE( (BOARD*) aItem->GetParent() );
@ -270,32 +271,32 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
return new_module;
}
case TYPE_TRACK:
case PCB_TRACE_T:
{
TRACK* new_track = ( (TRACK*) aItem )->Copy();
return new_track;
}
case TYPE_VIA:
case PCB_VIA_T:
{
SEGVIA* new_via = (SEGVIA*)( (SEGVIA*) aItem )->Copy();
return new_via;
}
case TYPE_ZONE:
case PCB_ZONE_T:
{
SEGZONE* new_segzone = (SEGZONE*)( (SEGZONE*) aItem )->Copy();
return new_segzone;
}
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
{
ZONE_CONTAINER* new_zone = new ZONE_CONTAINER( (BOARD*) aItem->GetParent() );
new_zone->Copy( (ZONE_CONTAINER*) aItem );
return new_zone;
}
case TYPE_DRAWSEGMENT:
case PCB_LINE_T:
{
DRAWSEGMENT* new_drawsegment = new DRAWSEGMENT( aItem->GetParent() );
new_drawsegment->Copy( (DRAWSEGMENT*) aItem );
@ -303,7 +304,7 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
}
break;
case TYPE_TEXTE:
case PCB_TEXT_T:
{
TEXTE_PCB* new_pcbtext = new TEXTE_PCB( aItem->GetParent() );
new_pcbtext->Copy( (TEXTE_PCB*) aItem );
@ -319,7 +320,7 @@ BOARD_ITEM* DuplicateStruct( BOARD_ITEM* aItem )
}
break;
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
{
DIMENSION* new_cotation = new DIMENSION( aItem->GetParent() );
new_cotation->Copy( (DIMENSION*) aItem );
@ -525,10 +526,10 @@ void PCB_EDIT_FRAME::PutDataInPreviousState( PICKED_ITEMS_LIST* aList, bool aRed
// see if we must rebuild ratsnets and pointers lists
switch( item->Type() )
{
case TYPE_MODULE:
case TYPE_ZONE_CONTAINER:
case TYPE_TRACK:
case TYPE_VIA:
case PCB_MODULE_T:
case PCB_ZONE_AREA_T:
case PCB_TRACE_T:
case PCB_VIA_T:
reBuild_ratsnest = true;
break;

121
pcbnew/class_board.cpp
View File

@ -44,7 +44,7 @@ static int sortPadsByXCoord( const void* pt_ref, const void* pt_comp )
BOARD::BOARD( EDA_ITEM* parent, PCB_BASE_FRAME* frame ) :
BOARD_ITEM( (BOARD_ITEM*)parent, TYPE_PCB ),
BOARD_ITEM( (BOARD_ITEM*)parent, PCB_T ),
m_NetClasses( this )
{
m_PcbFrame = frame;
@ -674,33 +674,34 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
switch( aBoardItem->Type() )
{
// this one uses a vector
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
aBoardItem->SetParent( this );
m_markers.push_back( (MARKER_PCB*) aBoardItem );
break;
// this one uses a vector
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
aBoardItem->SetParent( this );
m_ZoneDescriptorList.push_back( (ZONE_CONTAINER*) aBoardItem );
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
TRACK* insertAid;
insertAid = ( (TRACK*) aBoardItem )->GetBestInsertPoint( this );
m_Track.Insert( (TRACK*) aBoardItem, insertAid );
break;
case TYPE_ZONE:
case PCB_ZONE_T:
if( aControl & ADD_APPEND )
m_Zone.PushBack( (SEGZONE*) aBoardItem );
else
m_Zone.PushFront( (SEGZONE*) aBoardItem );
aBoardItem->SetParent( this );
break;
case TYPE_MODULE:
case PCB_MODULE_T:
if( aControl & ADD_APPEND )
m_Modules.PushBack( (MODULE*) aBoardItem );
else
@ -713,10 +714,10 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, int aControl )
m_Status_Pcb = 0;
break;
case TYPE_DIMENSION:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_EDGE_MODULE:
case PCB_DIMENSION_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_MODULE_EDGE_T:
case PCB_TARGET_T:
if( aControl & ADD_APPEND )
m_Drawings.PushBack( aBoardItem );
@ -746,7 +747,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
switch( aBoardItem->Type() )
{
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
// find the item in the vector, then remove it
for( unsigned i = 0; i<m_markers.size(); ++i )
@ -760,7 +761,7 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
break;
case TYPE_ZONE_CONTAINER: // this one uses a vector
case PCB_ZONE_AREA_T: // this one uses a vector
// find the item in the vector, then delete then erase it.
for( unsigned i = 0; i<m_ZoneDescriptorList.size(); ++i )
{
@ -773,23 +774,23 @@ BOARD_ITEM* BOARD::Remove( BOARD_ITEM* aBoardItem )
break;
case TYPE_MODULE:
case PCB_MODULE_T:
m_Modules.Remove( (MODULE*) aBoardItem );
break;
case TYPE_TRACK:
case TYPE_VIA:
case PCB_TRACE_T:
case PCB_VIA_T:
m_Track.Remove( (TRACK*) aBoardItem );
break;
case TYPE_ZONE:
case PCB_ZONE_T:
m_Zone.Remove( (SEGZONE*) aBoardItem );
break;
case TYPE_DIMENSION:
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_EDGE_MODULE:
case PCB_DIMENSION_T:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_MODULE_EDGE_T:
case PCB_TARGET_T:
m_Drawings.Remove( aBoardItem );
break;
@ -856,7 +857,7 @@ bool BOARD::ComputeBoundingBox( bool aBoardEdgesOnly )
// Check segments, dimensions, texts, and fiducials
for( BOARD_ITEM* item = m_Drawings; item != NULL; item = item->Next() )
{
if( aBoardEdgesOnly && (item->Type() != TYPE_DRAWSEGMENT || item->GetLayer() != EDGE_N ) )
if( aBoardEdgesOnly && (item->Type() != PCB_LINE_T || item->GetLayer() != EDGE_N ) )
continue;
if( !hasItems )
@ -952,7 +953,7 @@ void BOARD::DisplayInfo( EDA_DRAW_FRAME* frame )
for( BOARD_ITEM* item = m_Track; item; item = item->Next() )
{
if( item->Type() == TYPE_VIA )
if( item->Type() == PCB_VIA_T )
viasCount++;
else
trackSegmentsCount++;
@ -1009,7 +1010,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
switch( stype )
{
case TYPE_PCB:
case PCB_T:
result = inspector->Inspect( this, testData ); // inspect me
// skip over any types handled in the above call.
++p;
@ -1022,10 +1023,10 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* IterateForward( m_Modules, ... ) call.
*/
case TYPE_MODULE:
case TYPE_PAD:
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_T:
case PCB_PAD_T:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
// this calls MODULE::Visit() on each module.
result = IterateForward( m_Modules, inspector, testData, p );
@ -1035,10 +1036,10 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_MODULE:
case TYPE_PAD:
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_T:
case PCB_PAD_T:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
continue;
default:
@ -1050,9 +1051,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
break;
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_DIMENSION:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_DIMENSION_T:
case PCB_TARGET_T:
result = IterateForward( m_Drawings, inspector, testData, p );
@ -1061,9 +1062,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_DRAWSEGMENT:
case TYPE_TEXTE:
case TYPE_DIMENSION:
case PCB_LINE_T:
case PCB_TEXT_T:
case PCB_DIMENSION_T:
case PCB_TARGET_T:
continue;
@ -1094,8 +1095,8 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
// found.
// If not found (and only in this case) an exhaustive (and time
// consuming) search is made, but this case is statistically rare.
case TYPE_VIA:
case TYPE_TRACK:
case PCB_VIA_T:
case PCB_TRACE_T:
result = IterateForward( m_Track, inspector, testData, p );
// skip over any types handled in the above call.
@ -1103,8 +1104,8 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_VIA:
case TYPE_TRACK:
case PCB_VIA_T:
case PCB_TRACE_T:
continue;
default:
@ -1117,18 +1118,18 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
break;
#else
case TYPE_VIA:
case PCB_VIA_T:
result = IterateForward( m_Track, inspector, testData, p );
++p;
break;
case TYPE_TRACK:
case PCB_TRACE_T:
result = IterateForward( m_Track, inspector, testData, p );
++p;
break;
#endif
case TYPE_MARKER_PCB:
case PCB_MARKER_T:
// MARKER_PCBS are in the m_markers std::vector
for( unsigned i = 0; i<m_markers.size(); ++i )
@ -1142,9 +1143,9 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
++p;
break;
case TYPE_ZONE_CONTAINER:
case PCB_ZONE_AREA_T:
// TYPE_ZONE_CONTAINER are in the m_ZoneDescriptorList std::vector
// PCB_ZONE_AREA_T are in the m_ZoneDescriptorList std::vector
for( unsigned i = 0; i< m_ZoneDescriptorList.size(); ++i )
{
result = m_ZoneDescriptorList[i]->Visit( inspector, testData, p );
@ -1156,7 +1157,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
++p;
break;
case TYPE_ZONE:
case PCB_ZONE_T:
result = IterateForward( m_Zone, inspector, testData, p );
++p;
break;
@ -1196,7 +1197,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* BOARD_ITEM* item = (BOARD_ITEM*) testItem;
* const wxPoint& refPos = *(const wxPoint*) testData;
*
* if( item->Type() == TYPE_PAD )
* if( item->Type() == PCB_PAD_T )
* {
* D_PAD* pad = (D_PAD*) item;
* if( pad->HitTest( refPos ) )
@ -1215,7 +1216,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* }
* }
*
* else if( item->Type() == TYPE_MODULE )
* else if( item->Type() == PCB_MODULE_T )
* {
* MODULE* module = (MODULE*) item;
*
@ -1244,7 +1245,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR* inspector, const void* testData,
* PadOrModule inspector( layer );
*
* // search only for PADs first, then MODULES, and preferably a layer match
* static const KICAD_T scanTypes[] = { TYPE_PAD, TYPE_MODULE, EOT };
* static const KICAD_T scanTypes[] = { PCB_PAD_T, PCB_MODULE_T, EOT };
*
* // visit this BOARD with the above inspector
* Visit( &inspector, &refPos, scanTypes );
@ -1378,7 +1379,7 @@ MODULE* BOARD::FindModuleByReference( const wxString& aReference ) const
} inspector;
// search only for MODULES
static const KICAD_T scanTypes[] = { TYPE_MODULE, EOT };
static const KICAD_T scanTypes[] = { PCB_MODULE_T, EOT };
// visit this BOARD with the above inspector
BOARD* nonconstMe = (BOARD*) this;
@ -1444,10 +1445,10 @@ bool BOARD::Save( FILE* aFile ) const
{
switch( item->Type() )
{
case TYPE_TEXTE:
case TYPE_DRAWSEGMENT:
case PCB_TEXT_T:
case PCB_LINE_T:
case PCB_TARGET_T:
case TYPE_DIMENSION:
case PCB_DIMENSION_T:
if( !item->Save( aFile ) )
goto out;
@ -1605,7 +1606,7 @@ TRACK* BOARD::GetViaByPosition( const wxPoint& aPosition, int aLayerMask )
for( track = m_Track; track; track = track->Next() )
{
if( track->Type() != TYPE_VIA )
if( track->Type() != PCB_VIA_T )
continue;
if( track->m_Start != aPosition )
@ -1789,7 +1790,7 @@ TRACK* BOARD::GetTrace( TRACK* aTrace, const wxPoint& aPosition, int aLayerMask
if( GetBoardDesignSettings()->IsLayerVisible( layer ) == false )
continue;
if( track->Type() == TYPE_VIA ) /* VIA encountered. */
if( track->Type() == PCB_VIA_T ) /* VIA encountered. */
{
if( track->HitTest( aPosition ) )
return track;
@ -1845,7 +1846,7 @@ TRACK* BOARD::MarkTrace( TRACK* aTrace,
* segment) and this via and these 2 segments are a part of a track.
* If > 2 only this via is flagged (the track has only this via)
*/
if( aTrace->Type() == TYPE_VIA )
if( aTrace->Type() == PCB_VIA_T )
{
TRACK* Segm1, * Segm2 = NULL, * Segm3 = NULL;
Segm1 = ::GetTrace( m_Track, NULL, aTrace->m_Start, layerMask );
@ -1895,7 +1896,7 @@ TRACK* BOARD::MarkTrace( TRACK* aTrace,
{
TRACK* via = trackList[i];
if( via->Type() != TYPE_VIA )
if( via->Type() != PCB_VIA_T )
continue;
if( via == aTrace )
@ -2154,7 +2155,7 @@ TRACK* BOARD::CreateLockPoint( wxPoint& aPosition, TRACK* aSegment, PICKED_ITEMS
return NULL;
/* A via is a good lock point */
if( aSegment->Type() == TYPE_VIA )
if( aSegment->Type() == PCB_VIA_T )
{
aPosition = aSegment->m_Start;
return aSegment;

2
pcbnew/class_board_item.cpp
View File

@ -37,7 +37,7 @@ void BOARD_ITEM::UnLink()
BOARD* BOARD_ITEM::GetBoard() const
{
if( Type() == TYPE_PCB )
if( Type() == PCB_T )
return (BOARD*) this;
BOARD_ITEM* parent = GetParent();

2
pcbnew/class_dimension.cpp
View File

@ -20,7 +20,7 @@
DIMENSION::DIMENSION( BOARD_ITEM* aParent ) :
BOARD_ITEM( aParent, TYPE_DIMENSION )
BOARD_ITEM( aParent, PCB_DIMENSION_T )
{
m_Layer = DRAW_LAYER;
m_Width = 50;

2
pcbnew/class_drawsegment.cpp
View File

@ -223,7 +223,7 @@ wxPoint DRAWSEGMENT::GetEnd() const
MODULE* DRAWSEGMENT::GetParentModule() const
{
if( m_Parent->Type() != TYPE_MODULE )
if( m_Parent->Type() != PCB_MODULE_T )
return NULL;
return (MODULE*) m_Parent;

2
pcbnew/class_drawsegment.h
View File

@ -34,7 +34,7 @@ protected:
std::vector<wxPoint> m_PolyPoints;
public:
DRAWSEGMENT( BOARD_ITEM* aParent, KICAD_T idtype = TYPE_DRAWSEGMENT );
DRAWSEGMENT( BOARD_ITEM* aParent, KICAD_T idtype = PCB_LINE_T );
~DRAWSEGMENT();
DRAWSEGMENT* Next() const { return (DRAWSEGMENT*) Pnext; }

2
pcbnew/class_edge_mod.cpp
View File

@ -31,7 +31,7 @@
/*********************/
EDGE_MODULE::EDGE_MODULE( MODULE* parent ) :
DRAWSEGMENT( parent, TYPE_EDGE_MODULE )
DRAWSEGMENT( parent, PCB_MODULE_EDGE_T )
{
m_Shape = S_SEGMENT;
m_Angle = 0;

8
pcbnew/class_marker_pcb.cpp
View File

@ -18,7 +18,7 @@
MARKER_PCB::MARKER_PCB( BOARD_ITEM* aParent ) :
BOARD_ITEM( aParent, TYPE_MARKER_PCB ),
BOARD_ITEM( aParent, PCB_MARKER_T ),
MARKER_BASE( )
{
m_Color = WHITE;
@ -29,7 +29,7 @@ MARKER_PCB::MARKER_PCB( BOARD_ITEM* aParent ) :
MARKER_PCB::MARKER_PCB( int aErrorCode, const wxPoint& aMarkerPos,
const wxString& aText, const wxPoint& aPos,
const wxString& bText, const wxPoint& bPos ) :
BOARD_ITEM( NULL, TYPE_MARKER_PCB ), // parent set during BOARD::Add()
BOARD_ITEM( NULL, PCB_MARKER_T ), // parent set during BOARD::Add()
MARKER_BASE( aErrorCode, aMarkerPos, aText, aPos, bText, bPos )
{
@ -38,8 +38,8 @@ MARKER_PCB::MARKER_PCB( int aErrorCode, const wxPoint& aMarkerPos,
}
MARKER_PCB::MARKER_PCB( int aErrorCode, const wxPoint& aMarkerPos,
const wxString& aText, const wxPoint& aPos ) :
BOARD_ITEM( NULL, TYPE_MARKER_PCB ), // parent set during BOARD::Add()
const wxString& aText, const wxPoint& aPos ) :
BOARD_ITEM( NULL, PCB_MARKER_T ), // parent set during BOARD::Add()
MARKER_BASE( aErrorCode, aMarkerPos, aText, aPos )
{
m_Color = WHITE;

30
pcbnew/class_module.cpp
View File

@ -28,7 +28,7 @@
MODULE::MODULE( BOARD* parent ) :
BOARD_ITEM( (BOARD_ITEM*) parent, TYPE_MODULE )
BOARD_ITEM( (BOARD_ITEM*) parent, PCB_MODULE_T )
{
m_Attributs = MOD_DEFAULT;
m_Layer = LAYER_N_FRONT;
@ -128,14 +128,14 @@ void MODULE::Copy( MODULE* aModule )
{
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
TEXTE_MODULE * textm;
textm = new TEXTE_MODULE( this );
textm->Copy( (TEXTE_MODULE*) item );
m_Drawings.PushBack( textm );
break;
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
EDGE_MODULE * edge;
edge = new EDGE_MODULE( this );
edge->Copy( (EDGE_MODULE*) item );
@ -224,8 +224,8 @@ void MODULE::Draw( EDA_DRAW_PANEL* aPanel, wxDC* aDC, int aDrawMode, const wxPoi
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
item->Draw( aPanel, aDC, aDrawMode, aOffset );
break;
@ -250,7 +250,7 @@ void MODULE::DrawEdgesOnly( EDA_DRAW_PANEL* panel, wxDC* DC, const wxPoint& offs
{
switch( item->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
item->Draw( panel, DC, draw_mode, offset );
break;
@ -341,8 +341,8 @@ bool MODULE::Save( FILE* aFile ) const
{
switch( item->Type() )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
if( !item->Save( aFile ) )
goto out;
@ -667,7 +667,7 @@ EDA_RECT MODULE::GetFootPrintRect() const
area.Inflate( 500 ); // Give a min size
for( EDGE_MODULE* edge = (EDGE_MODULE*) m_Drawings.GetFirst(); edge; edge = edge->Next() )
if( edge->Type() == TYPE_EDGE_MODULE )
if( edge->Type() == PCB_MODULE_EDGE_T )
area.Merge( edge->GetBoundingBox() );
for( D_PAD* pad = m_Pads; pad; pad = pad->Next() )
@ -854,17 +854,17 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
switch( stype )
{
case TYPE_MODULE:
case PCB_MODULE_T:
result = inspector->Inspect( this, testData ); // inspect me
++p;
break;
case TYPE_PAD:
case PCB_PAD_T:
result = IterateForward( m_Pads, inspector, testData, p );
++p;
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
result = inspector->Inspect( m_Reference, testData );
if( result == SEARCH_QUIT )
@ -877,7 +877,7 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
// m_Drawings can hold TYPETEXTMODULE also, so fall thru
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
result = IterateForward( m_Drawings, inspector, testData, p );
// skip over any types handled in the above call.
@ -885,8 +885,8 @@ SEARCH_RESULT MODULE::Visit( INSPECTOR* inspector, const void* testData,
{
switch( stype = *++p )
{
case TYPE_TEXTE_MODULE:
case TYPE_EDGE_MODULE:
case PCB_MODULE_TEXT_T:
case PCB_MODULE_EDGE_T:
continue;
default:

12
pcbnew/class_module_transform_functions.cpp
View File

@ -243,7 +243,7 @@ void MODULE::Flip(const wxPoint& aCentre )
{
switch( PtStruct->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
pt_edgmod = (EDGE_MODULE*) PtStruct;
pt_edgmod->m_Start.y -= m_Pos.y;
pt_edgmod->m_Start.y = -pt_edgmod->m_Start.y;
@ -261,7 +261,7 @@ void MODULE::Flip(const wxPoint& aCentre )
pt_edgmod->SetLayer( ChangeSideNumLayer( pt_edgmod->GetLayer() ) );
break;
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
/* Reverse mirror position and mirror. */
pt_texte = (TEXTE_MODULE*) PtStruct;
pt_texte->m_Pos.y -= m_Pos.y;
@ -317,14 +317,14 @@ void MODULE::SetPosition( const wxPoint& newpos )
{
switch( PtStruct->Type() )
{
case TYPE_EDGE_MODULE:
case PCB_MODULE_EDGE_T:
{
EDGE_MODULE* pt_edgmod = (EDGE_MODULE*) PtStruct;
pt_edgmod->SetDrawCoord();
break;
}
case TYPE_TEXTE_MODULE:
case PCB_MODULE_TEXT_T:
{
TEXTE_MODULE* pt_texte = (TEXTE_MODULE*) PtStruct;
pt_texte->m_Pos += delta;
@ -370,13 +370,13 @@ void MODULE::SetOrientation( int newangle )
/* Displace contours and text of the footprint. */
for( BOARD_ITEM* item = m_Drawings; item; item = item->Next() )
{
if( item->Type() == TYPE_EDGE_MODULE )
if( item->Type() == PCB_MODULE_EDGE_T )
{
EDGE_MODULE* pt_edgmod = (EDGE_MODULE*) item;
pt_edgmod->SetDrawCoord();
}
if( item->Type() == TYPE_TEXTE_MODULE )
if( item->Type() == PCB_MODULE_TEXT_T )
{
TEXTE_MODULE* pt_texte = (TEXTE_MODULE*) item;
pt_texte->SetDrawCoord();

10
pcbnew/class_netinfo_item.cpp
View File

@ -163,14 +163,20 @@ void NETINFO_ITEM::DisplayInfo( EDA_DRAW_FRAME* frame )
count = 0;
Struct = ( (PCB_BASE_FRAME*) frame )->GetBoard()->m_Track;
for( ; Struct != NULL; Struct = Struct->Next() )
{
if( Struct->Type() == TYPE_VIA )
if( Struct->Type() == PCB_VIA_T )
{
if( ( (SEGVIA*) Struct )->GetNet() == GetNet() )
count++;
if( Struct->Type() == TYPE_TRACK )
}
if( Struct->Type() == PCB_TRACE_T )
{
if( ( (TRACK*) Struct )->GetNet() == GetNet() )
lengthnet += ( (TRACK*) Struct )->GetLength();
}
}
txt.Printf( wxT( "%d" ), count );

4
pcbnew/class_pad.cpp
View File

@ -28,7 +28,7 @@
int D_PAD::m_PadSketchModePenSize = 0; // Pen size used to draw pads in sketch mode
D_PAD::D_PAD( MODULE* parent ) : BOARD_CONNECTED_ITEM( parent, TYPE_PAD )
D_PAD::D_PAD( MODULE* parent ) : BOARD_CONNECTED_ITEM( parent, PCB_PAD_T )
{
m_NumPadName = 0;
@ -36,7 +36,7 @@ D_PAD::D_PAD( MODULE* parent ) : BOARD_CONNECTED_ITEM( parent, TYPE_PAD )
m_Orient = 0; // Pad rotation in 1/10 degrees
m_LengthDie = 0;
if( m_Parent && (m_Parent->Type() == TYPE_MODULE) )
if( m_Parent && (m_Parent->Type() == PCB_MODULE_T) )
{
m_Pos = ( (MODULE*) m_Parent )->GetPosition();
}

Some files were not shown because too many files have changed in this diff Show More