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https://gitlab.com/kicad/code/kicad.git
synced 2025-04-20 15:51:41 +00:00
Make ARCs accessible from python
This commit is contained in:
qu1ck
Wayne Stambaugh
parent
375cd12258
commit
cc6df515a1
3
.gitignore
vendored
3
.gitignore
vendored
@ -117,8 +117,9 @@ CMakeSettings.json
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i18n_status.svg
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i18n_status.csv
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# Project local settings files (in demos and qa tests)
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# Project local settings files and backups (in demos and qa tests)
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*.kicad_prl
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*-backups
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# Don't actually ignore any of these files, since we need them in the tree
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!resources/linux/icons/hicolor/**/**/*
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@ -94,6 +94,20 @@ HANDLE_EXCEPTIONS(BOARD::TracksInNetBetweenPoints)
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return
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%}
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}
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%extend std::deque<TRACK *>
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{
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%pythoncode
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%{
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def __iter__(self):
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it = self.iterator()
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try:
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while True:
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item = it.next() # throws StopIteration when iterator reached the end.
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yield item.Cast()
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except StopIteration:
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return
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%}
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}
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%extend BOARD
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{
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@ -62,6 +62,7 @@ class FP_SHAPE;
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class PAD;
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class TRACK;
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class VIA;
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class ARC;
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class ZONE;
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class FP_ZONE;
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class PCB_TARGET;
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@ -87,6 +88,7 @@ static FP_SHAPE* Cast_to_FP_SHAPE( BOARD_ITEM* );
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static PAD* Cast_to_PAD( BOARD_ITEM* );
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static TRACK* Cast_to_TRACK( BOARD_ITEM* );
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static VIA* Cast_to_VIA( BOARD_ITEM* );
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static ARC* Cast_to_ARC( BOARD_ITEM* );
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static ZONE* Cast_to_ZONE( BOARD_ITEM* );
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static FP_ZONE* Cast_to_FP_ZONE( BOARD_ITEM* );
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static PCB_TARGET* Cast_to_PCB_TARGET( BOARD_ITEM* );
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@ -112,6 +114,7 @@ static FP_SHAPE* Cast_to_FP_SHAPE( BOARD_ITEM* );
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static PAD* Cast_to_PAD( BOARD_ITEM* );
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static TRACK* Cast_to_TRACK( BOARD_ITEM* );
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static VIA* Cast_to_VIA( BOARD_ITEM* );
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static ARC* Cast_to_ARC( BOARD_ITEM* );
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static ZONE* Cast_to_ZONE( BOARD_ITEM* );
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static FP_ZONE* Cast_to_FP_ZONE( BOARD_ITEM* );
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static PCB_TARGET* Cast_to_PCB_TARGET( BOARD_ITEM* );
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@ -153,6 +156,8 @@ static PCB_TARGET* Cast_to_PCB_TARGET( BOARD_ITEM* );
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return Cast_to_VIA(self)
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elif ct=="TRACK":
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return Cast_to_TRACK(self)
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elif ct=="ARC":
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return Cast_to_ARC(self)
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elif ct=="PCB_TARGET":
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return Cast_to_PCB_TARGET(self)
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elif ct=="ZONE":
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@ -200,6 +205,7 @@ static FP_SHAPE* Cast_to_FP_SHAPE( BOARD_ITEM* self ) {
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static PAD* Cast_to_PAD( BOARD_ITEM* self ) { return dynamic_cast<PAD*>(self); }
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static TRACK* Cast_to_TRACK( BOARD_ITEM* self ) { return dynamic_cast<TRACK*>(self); }
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static VIA* Cast_to_VIA( BOARD_ITEM* self ) { return dynamic_cast<VIA*>(self); }
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static ARC* Cast_to_ARC( BOARD_ITEM* self ) { return dynamic_cast<ARC*>(self); }
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static ZONE* Cast_to_ZONE( BOARD_ITEM* self ) { return dynamic_cast<ZONE*>(self); }
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static FP_ZONE* Cast_to_FP_ZONE( BOARD_ITEM* self ) { return dynamic_cast<FP_ZONE*>(self); }
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static PCB_TARGET* Cast_to_PCB_TARGET( BOARD_ITEM* self ) { return dynamic_cast<PCB_TARGET*>(self); }
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qa/data/tracks_arcs_vias.kicad_pcb
Normal file
LOADING design file
175
qa/data/tracks_arcs_vias.kicad_pro
Normal file
175
qa/data/tracks_arcs_vias.kicad_pro
Normal file
@ -0,0 +1,175 @@
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{
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"board": {
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.09999999999999999,
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"copper_line_width": 0.19999999999999998,
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"copper_text_italic": false,
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"copper_text_size_h": 1.5,
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"copper_text_size_v": 1.5,
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"copper_text_thickness": 0.3,
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"copper_text_upright": false,
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"courtyard_line_width": 0.049999999999999996,
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"dimension_precision": 4,
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"dimension_units": 3,
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"dimensions": {
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"arrow_length": 1270000,
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"extension_offset": 500000,
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"keep_text_aligned": true,
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"suppress_zeroes": false,
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"text_position": 0,
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"units_format": 1
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},
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"fab_line_width": 0.09999999999999999,
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"fab_text_italic": false,
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"fab_text_size_h": 1.0,
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"fab_text_size_v": 1.0,
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"fab_text_thickness": 0.15,
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"fab_text_upright": false,
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"other_line_width": 0.15,
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"other_text_italic": false,
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"other_text_size_h": 1.0,
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"other_text_size_v": 1.0,
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"other_text_thickness": 0.15,
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"other_text_upright": false,
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"pads": {
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"drill": 0.762,
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"height": 1.524,
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"width": 1.524
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},
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"silk_line_width": 0.15,
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"silk_text_italic": false,
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"silk_text_size_h": 1.0,
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"silk_text_size_v": 1.0,
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"silk_text_thickness": 0.15,
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"silk_text_upright": false,
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"zones": {
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"45_degree_only": false,
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"min_clearance": 0.508
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}
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},
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"diff_pair_dimensions": [],
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"drc_exclusions": [],
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"meta": {
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"version": 1
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},
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"copper_edge_clearance": "error",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"hole_clearance": "error",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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"npth_inside_courtyard": "ignore",
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_over_copper": "error",
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"silk_overlap": "error",
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"skew_out_of_range": "error",
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"too_many_vias": "error",
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"track_dangling": "warning",
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"track_width": "error",
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"tracks_crossing": "error",
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rules": {
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"allow_blind_buried_vias": false,
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.0,
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"min_hole_clearance": 0.0,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_silk_clearance": 0.0,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.19999999999999998,
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"min_via_annular_width": 0.049999999999999996,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"solder_paste_clearance": 0.0,
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"solder_paste_margin_ratio": 0.0
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},
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"track_widths": [],
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"via_dimensions": [],
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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},
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"layer_presets": []
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},
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"boards": [],
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"cvpcb": {
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"equivalence_files": []
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},
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"libraries": {
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"pinned_footprint_libs": [],
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"pinned_symbol_libs": []
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},
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"meta": {
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"filename": "tracks_arcs_vias.kicad_pro",
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"version": 1
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},
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"net_settings": {
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"classes": [
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{
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"bus_width": 6.0,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.25,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6.0
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}
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],
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"meta": {
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"version": 0
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},
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"net_colors": null
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},
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"pcbnew": {
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"last_paths": {
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"gencad": "",
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"idf": "",
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"netlist": "",
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"specctra_dsn": "",
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"step": "",
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"vrml": ""
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},
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"page_layout_descr_file": ""
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},
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"schematic": {
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"legacy_lib_dir": "",
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"legacy_lib_list": []
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},
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"sheets": [],
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"text_variables": {}
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}
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qa/data/tracks_arcs_vias.kicad_sch
Normal file
LOADING design file
31
qa/testcases/test_004_tracks.py
Normal file
31
qa/testcases/test_004_tracks.py
Normal file
@ -0,0 +1,31 @@
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import unittest
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import pcbnew
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class TestTracks(unittest.TestCase):
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def setUp(self):
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self.pcb = pcbnew.LoadBoard("data/tracks_arcs_vias.kicad_pcb")
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def test_tracks(self):
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tracks = [t for t in self.pcb.Tracks() if t.GetClass() == 'TRACK']
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self.assertEqual(16, len(tracks))
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track = sorted(tracks, key=lambda t: [t.GetStart()[0], t.GetStart()[1]])[0]
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self.assertEqual([27000000, 27585787], [track.GetStart()[0], track.GetStart()[1]])
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self.assertEqual([27000000, 26500000], [track.GetEnd()[0], track.GetEnd()[1]])
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self.assertEqual(250000, track.GetWidth())
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self.assertEqual('McNetty', track.GetNetname())
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def test_arcs(self):
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arcs = [t for t in self.pcb.Tracks() if t.GetClass() == 'ARC']
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self.assertEqual(13, len(arcs))
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arc = sorted(arcs, key=lambda t: [t.GetStart()[0], t.GetStart()[1]])[0]
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self.assertEqual([29414211, 26499999], [arc.GetCenter()[0], arc.GetCenter()[1]])
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self.assertEqual([1800, 2250], [round(arc.GetArcAngleStart()), round(arc.GetArcAngleEnd())])
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self.assertEqual(2414211, round(arc.GetRadius()))
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def test_vias(self):
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vias = [t for t in self.pcb.Tracks() if t.GetClass() == 'VIA']
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self.assertEqual(2, len(vias))
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via = sorted(vias, key=lambda t: [t.GetStart()[0], t.GetStart()[1]])[0]
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self.assertEqual([29000000, 41000000], [via.GetStart()[0], via.GetStart()[1]])
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self.assertEqual(400000, via.GetDrillValue())
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