AllSpiceMirrors/kicad
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Moving modules from DLIST to std::deque

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This commit is contained in:
Seth Hillbrand 2019-05-30 17:15:57 -07:00
parent 961b22d603
commit d1877d7c1b
58 changed files with 292 additions and 274 deletions

12
3d-viewer/3d_canvas/create_layer_items.cpp
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@ -488,7 +488,7 @@ void CINFO3D_VISU::createLayers( REPORTER *aStatusTextReporter )
// Add holes of modules
// /////////////////////////////////////////////////////////////////////////
for( const MODULE* module = m_board->m_Modules; module; module = module->Next() )
for( auto module : m_board->Modules() )
{
const D_PAD* pad = module->PadsList();
@ -522,7 +522,7 @@ void CINFO3D_VISU::createLayers( REPORTER *aStatusTextReporter )
// Add contours of the pad holes (pads can be Circle or Segment holes)
// /////////////////////////////////////////////////////////////////////////
for( const MODULE* module = m_board->m_Modules; module; module = module->Next() )
for( auto module : m_board->Modules() )
{
const D_PAD* pad = module->PadsList();
@ -566,7 +566,7 @@ void CINFO3D_VISU::createLayers( REPORTER *aStatusTextReporter )
CBVHCONTAINER2D *layerContainer = m_layers_container2D[curr_layer_id];
// ADD PADS
for( const MODULE* module = m_board->m_Modules; module; module = module->Next() )
for( auto module : m_board->Modules() )
{
// Note: NPTH pads are not drawn on copper layers when the pad
// has same shape as its hole
@ -603,7 +603,7 @@ void CINFO3D_VISU::createLayers( REPORTER *aStatusTextReporter )
SHAPE_POLY_SET *layerPoly = m_layers_poly[curr_layer_id];
// ADD PADS
for( const MODULE* module = m_board->m_Modules; module; module = module->Next() )
for( auto module : m_board->Modules() )
{
// Construct polys
// /////////////////////////////////////////////////////////////
@ -993,7 +993,7 @@ void CINFO3D_VISU::createLayers( REPORTER *aStatusTextReporter )
// Add modules tech layers - objects
// /////////////////////////////////////////////////////////////////////
for( MODULE* module = m_board->m_Modules; module; module = module->Next() )
for( auto module : m_board->Modules() )
{
if( (curr_layer_id == F_SilkS) || (curr_layer_id == B_SilkS) )
{
@ -1020,7 +1020,7 @@ void CINFO3D_VISU::createLayers( REPORTER *aStatusTextReporter )
// Add modules tech layers - contours
// /////////////////////////////////////////////////////////////////////
for( MODULE* module = m_board->m_Modules; module; module = module->Next() )
for( auto module : m_board->Modules() )
{
if( (curr_layer_id == F_SilkS) || (curr_layer_id == B_SilkS) )
{

7
3d-viewer/3d_rendering/3d_render_ogl_legacy/c3d_render_createscene_ogl_legacy.cpp
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@ -800,9 +800,7 @@ void C3D_RENDER_OGL_LEGACY::generate_3D_Vias_and_Pads()
tht_inner_holes_poly.RemoveAllContours();
// Insert pads holes (vertical cylinders)
for( const MODULE* module = m_settings.GetBoard()->m_Modules;
module;
module = module->Next() )
for( const auto module : m_settings.GetBoard()->Modules() )
{
for( const D_PAD* pad = module->PadsList(); pad; pad = pad->Next() )
{
@ -907,8 +905,7 @@ void C3D_RENDER_OGL_LEGACY::load_3D_models( REPORTER *aStatusTextReporter )
return;
// Go for all modules
for( const MODULE* module = m_settings.GetBoard()->m_Modules;
module; module = module->Next() )
for( auto module : m_settings.GetBoard()->Modules() )
{
if( !module->Models().empty() )
{

17
3d-viewer/3d_rendering/3d_render_ogl_legacy/c3d_render_ogl_legacy.cpp
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@ -980,18 +980,13 @@ void C3D_RENDER_OGL_LEGACY::render_3D_models( bool aRenderTopOrBot,
bool aRenderTransparentOnly )
{
// Go for all modules
if( m_settings.GetBoard()->m_Modules.GetCount() )
for( auto module : m_settings.GetBoard()->Modules() )
{
for( const MODULE* module = m_settings.GetBoard()->m_Modules;
module;
module = module->Next() )
{
if( !module->Models().empty() )
if( m_settings.ShouldModuleBeDisplayed( (MODULE_ATTR_T)module->GetAttributes() ) )
if( ( aRenderTopOrBot && !module->IsFlipped()) ||
(!aRenderTopOrBot && module->IsFlipped()) )
render_3D_module( module, aRenderTransparentOnly );
}
if( !module->Models().empty() )
if( m_settings.ShouldModuleBeDisplayed( (MODULE_ATTR_T) module->GetAttributes() ) )
if( ( aRenderTopOrBot && !module->IsFlipped() )
|| ( !aRenderTopOrBot && module->IsFlipped() ) )
render_3D_module( module, aRenderTransparentOnly );
}
}

8
3d-viewer/3d_rendering/3d_render_raytracing/c3d_render_createscene.cpp
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@ -1183,9 +1183,7 @@ void C3D_RENDER_RAYTRACING::add_3D_vias_and_pads_to_container()
}
// Insert pads holes (vertical cylinders)
for( const MODULE* module = m_settings.GetBoard()->m_Modules;
module;
module = module->Next() )
for( auto module : m_settings.GetBoard()->Modules() )
{
for( const D_PAD* pad = module->PadsList(); pad; pad = pad->Next() )
if( pad->GetAttribute () != PAD_ATTRIB_HOLE_NOT_PLATED )
@ -1199,9 +1197,7 @@ void C3D_RENDER_RAYTRACING::add_3D_vias_and_pads_to_container()
void C3D_RENDER_RAYTRACING::load_3D_models()
{
// Go for all modules
for( const MODULE* module = m_settings.GetBoard()->m_Modules;
module;
module = module->Next() )
for( auto module : m_settings.GetBoard()->Modules() )
{
if( (!module->Models().empty() ) &&
m_settings.ShouldModuleBeDisplayed( (MODULE_ATTR_T)module->GetAttributes() ) )

16
cvpcb/display_footprints_frame.cpp
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@ -413,8 +413,10 @@ void DISPLAY_FOOTPRINTS_FRAME::InitDisplay()
MODULE* module = nullptr;
const FOOTPRINT_INFO* module_info = nullptr;
if( GetBoard()->m_Modules.GetCount() )
GetBoard()->m_Modules.DeleteAll();
for( auto it = GetBoard()->Modules().begin(); it != GetBoard()->Modules().end(); it++ )
delete *it;
GetBoard()->Modules().clear();
wxString footprintName = parentframe->GetSelectedFootprint();
@ -436,7 +438,7 @@ void DISPLAY_FOOTPRINTS_FRAME::InitDisplay()
}
if( module )
GetBoard()->m_Modules.PushBack( module );
GetBoard()->Modules().push_back( module );
if( module_info )
SetStatusText( wxString::Format( _( "Lib: %s" ), module_info->GetLibNickname() ), 0 );
@ -471,7 +473,7 @@ void DISPLAY_FOOTPRINTS_FRAME::updateView()
void DISPLAY_FOOTPRINTS_FRAME::UpdateMsgPanel()
{
MODULE* footprint = GetBoard()->m_Modules;
MODULE* footprint = GetBoard()->GetFirstModule();
MSG_PANEL_ITEMS items;
if( footprint )
@ -515,7 +517,9 @@ void DISPLAY_FOOTPRINTS_FRAME::SyncMenusAndToolbars()
*/
void BOARD::Print( PCB_BASE_FRAME* aFrame, wxDC* aDC, const wxPoint& aOffset )
{
if( m_Modules )
m_Modules->Print( aFrame, aDC );
if( !m_modules.empty() )
{
GetFirstModule()->Print( aFrame, aDC );
}
}

4
pcbnew/board_commit.cpp
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@ -129,10 +129,10 @@ void BOARD_COMMIT::Push( const wxString& aMessage, bool aCreateUndoEntry, bool a
// modules inside modules are not supported yet
wxASSERT( boardItem->Type() != PCB_MODULE_T );
boardItem->SetParent( board->m_Modules.GetFirst() );
boardItem->SetParent( board->Modules().front() );
if( !( changeFlags & CHT_DONE ) )
board->m_Modules->Add( boardItem );
board->Modules().front()->Add( boardItem );
}
view->Add( boardItem );

2
pcbnew/board_items_to_polygon_shape_transform.cpp
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@ -83,7 +83,7 @@ void BOARD::ConvertBrdLayerToPolygonalContours( PCB_LAYER_ID aLayer, SHAPE_POLY_
}
// convert pads
for( MODULE* module = m_Modules; module != NULL; module = module->Next() )
for( auto module : m_modules )
{
module->TransformPadsShapesWithClearanceToPolygon( aLayer, aOutlines, 0 );

8
pcbnew/board_netlist_updater.cpp
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@ -530,12 +530,10 @@ bool BOARD_NETLIST_UPDATER::updateCopperZoneNets( NETLIST& aNetlist )
bool BOARD_NETLIST_UPDATER::deleteUnusedComponents( NETLIST& aNetlist )
{
wxString msg;
MODULE* nextModule;
const COMPONENT* component;
for( MODULE* module = m_board->m_Modules; module != NULL; module = nextModule )
for( auto module : m_board->Modules() )
{
nextModule = module->Next();
if( m_lookupByTimestamp )
component = aNetlist.GetComponentByTimeStamp( module->GetPath() );
@ -691,7 +689,7 @@ bool BOARD_NETLIST_UPDATER::UpdateNetlist( NETLIST& aNetlist )
m_errorCount = 0;
m_warningCount = 0;
m_newFootprintsCount = 0;
MODULE* lastPreexistingFootprint = m_board->m_Modules.GetLast();
MODULE* lastPreexistingFootprint = m_board->Modules().back();
cacheCopperZoneConnections();
@ -717,7 +715,7 @@ bool BOARD_NETLIST_UPDATER::UpdateNetlist( NETLIST& aNetlist )
component->GetFPID().Format().wx_str() );
m_reporter->Report( msg, REPORTER::RPT_INFO );
for( MODULE* footprint = m_board->m_Modules; footprint; footprint = footprint->Next() )
for( auto footprint : m_board->Modules() )
{
bool match = false;

8
pcbnew/build_BOM_from_board.cpp
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@ -77,10 +77,9 @@ void PCB_EDIT_FRAME::RecreateBOMFileFromBoard( wxCommandEvent& aEvent )
{
wxFileName fn;
FILE* fp_bom;
MODULE* module = GetBoard()->m_Modules;
wxString msg;
if( module == NULL )
if( GetBoard()->Modules().empty() )
{
DisplayError( this, _( "Cannot export BOM: there are no footprints in the PCB" ) );
return;
@ -126,7 +125,7 @@ void PCB_EDIT_FRAME::RecreateBOMFileFromBoard( wxCommandEvent& aEvent )
CmpList::iterator iter;
int i = 1;
while( module != NULL )
for( auto module : GetBoard()->Modules() )
{
bool valExist = false;
@ -157,9 +156,6 @@ void PCB_EDIT_FRAME::RecreateBOMFileFromBoard( wxCommandEvent& aEvent )
comp->m_CmpCount = 1;
list.Append( comp );
}
// increment module
module = module->Next();
}
// Print list. Also delete temporary created objects.

24
pcbnew/class_board.cpp
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@ -902,9 +902,9 @@ void BOARD::Add( BOARD_ITEM* aBoardItem, ADD_MODE aMode )
case PCB_MODULE_T:
if( aMode == ADD_APPEND )
m_Modules.PushBack( (MODULE*) aBoardItem );
m_modules.push_back( (MODULE*) aBoardItem );
else
m_Modules.PushFront( (MODULE*) aBoardItem );
m_modules.push_front( (MODULE*) aBoardItem );
break;
@ -977,7 +977,8 @@ void BOARD::Remove( BOARD_ITEM* aBoardItem )
break;
case PCB_MODULE_T:
m_Modules.Remove( (MODULE*) aBoardItem );
m_modules.erase( std::remove_if( m_modules.begin(), m_modules.end(),
[aBoardItem]( BOARD_ITEM* aItem ) { return aItem == aBoardItem; } ) );
break;
case PCB_TRACE_T:
@ -1123,7 +1124,7 @@ EDA_RECT BOARD::ComputeBoundingBox( bool aBoardEdgesOnly ) const
if( !aBoardEdgesOnly )
{
// Check modules
for( MODULE* module = m_Modules; module; module = module->Next() )
for( auto module : m_modules )
{
if( !( module->GetLayerSet() & visible ).any() )
continue;
@ -1240,7 +1241,7 @@ SEARCH_RESULT BOARD::Visit( INSPECTOR inspector, void* testData, const KICAD_T s
case PCB_MODULE_EDGE_T:
// this calls MODULE::Visit() on each module.
result = IterateForward( m_Modules, inspector, testData, p );
result = IterateForward<MODULE*>( m_modules, inspector, testData, p );
// skip over any types handled in the above call.
for( ; ; )
@ -1434,7 +1435,7 @@ MODULE* BOARD::FindModule( const wxString& aRefOrTimeStamp, bool aSearchByTimeSt
{
if( aSearchByTimeStamp )
{
for( MODULE* module = m_Modules; module; module = module->Next() )
for( auto module : m_modules )
{
if( aRefOrTimeStamp.CmpNoCase( module->GetPath() ) == 0 )
return module;
@ -1605,7 +1606,7 @@ D_PAD* BOARD::GetPad( const wxPoint& aPosition, LSET aLayerSet )
if( !aLayerSet.any() )
aLayerSet = LSET::AllCuMask();
for( MODULE* module = m_Modules; module; module = module->Next() )
for( auto module : m_modules )
{
D_PAD* pad = NULL;
@ -2137,14 +2138,13 @@ TRACK* BOARD::MarkTrace( TRACK* aTrackList, TRACK* aTrace, int* aCount,
MODULE* BOARD::GetFootprint( const wxPoint& aPosition, PCB_LAYER_ID aActiveLayer,
bool aVisibleOnly, bool aIgnoreLocked )
{
MODULE* pt_module;
MODULE* module = NULL;
MODULE* alt_module = NULL;
int min_dim = 0x7FFFFFFF;
int alt_min_dim = 0x7FFFFFFF;
bool current_layer_back = IsBackLayer( aActiveLayer );
for( pt_module = m_Modules; pt_module; pt_module = pt_module->Next() )
for( auto pt_module : m_modules )
{
// is the ref point within the module's bounds?
if( !pt_module->HitTest( aPosition ) )
@ -2205,7 +2205,7 @@ MODULE* BOARD::GetFootprint( const wxPoint& aPosition, PCB_LAYER_ID aActiveLayer
BOARD_CONNECTED_ITEM* BOARD::GetLockPoint( const wxPoint& aPosition, LSET aLayerSet )
{
for( MODULE* module = m_Modules; module; module = module->Next() )
for( auto module : m_modules )
{
D_PAD* pad = module->GetPad( aPosition, aLayerSet );
@ -2497,9 +2497,9 @@ D_PAD* BOARD::GetPad( unsigned aIndex ) const
{
unsigned count = 0;
for( MODULE* mod = m_Modules; mod ; mod = mod->Next() ) // FIXME: const DLIST_ITERATOR
for( auto mod : m_modules )
{
for( D_PAD* pad = mod->PadsList(); pad; pad = pad->Next() )
for( auto pad : mod->Pads() )
{
if( count == aIndex )
return pad;

59
pcbnew/class_board.h
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@ -34,17 +34,18 @@
#include <dlist.h>
#include <core/iterators.h>
#include <common.h> // PAGE_INFO
#include <layers_id_colors_and_visibility.h>
#include <netinfo.h>
#include <board_design_settings.h>
#include <board_item_container.h>
#include <class_module.h>
#include <class_pad.h>
#include <colors_design_settings.h>
#include <board_design_settings.h>
#include <common.h> // PAGE_INFO
#include <eda_rect.h>
#include <layers_id_colors_and_visibility.h>
#include <netinfo.h>
#include <pcb_plot_params.h>
#include <title_block.h>
#include <zone_settings.h>
#include <pcb_plot_params.h>
#include <board_item_container.h>
#include <eda_rect.h>
#include <memory>
@ -158,10 +159,11 @@ protected:
};
DECL_VEC_FOR_SWIG(MARKERS, MARKER_PCB*)
DECL_VEC_FOR_SWIG(ZONE_CONTAINERS, ZONE_CONTAINER*)
DECL_VEC_FOR_SWIG(TRACKS, TRACK*)
DECL_DEQ_FOR_SWIG(DRAWINGS, BOARD_ITEM*)
DECL_VEC_FOR_SWIG( MARKERS, MARKER_PCB* )
DECL_VEC_FOR_SWIG( ZONE_CONTAINERS, ZONE_CONTAINER* )
DECL_VEC_FOR_SWIG( TRACKS, TRACK* )
DECL_DEQ_FOR_SWIG( DRAWINGS, BOARD_ITEM* )
DECL_DEQ_FOR_SWIG( MODULES, MODULE* )
/**
@ -182,6 +184,9 @@ private:
/// BOARD_ITEMs for drawings on the board, owned by pointer.
DRAWINGS m_drawings;
/// MODULES for components on the board, owned by pointer.
MODULES m_modules;
/// edge zone descriptors, owned by pointer.
ZONE_CONTAINERS m_ZoneDescriptorList;
@ -245,11 +250,17 @@ public:
public:
DLIST<MODULE> m_Modules; // linked list of MODULEs
DLIST<TRACK> m_Track; // linked list of TRACKs and VIAs
DLIST_ITERATOR_WRAPPER<TRACK> Tracks() { return DLIST_ITERATOR_WRAPPER<TRACK>(m_Track); }
DLIST_ITERATOR_WRAPPER<MODULE> Modules() { return DLIST_ITERATOR_WRAPPER<MODULE>(m_Modules); }
MODULES& Modules()
{
return m_modules;
}
const MODULES& Modules() const
{
return m_modules;
}
DRAWINGS& Drawings() { return m_drawings; }
ZONE_CONTAINERS& Zones() { return m_ZoneDescriptorList; }
const std::vector<BOARD_CONNECTED_ITEM*> AllConnectedItems();
@ -265,7 +276,7 @@ public:
bool IsEmpty() const
{
return m_drawings.empty() && m_Modules.GetCount() == 0 && m_Track.GetCount() == 0;
return m_drawings.empty() && m_modules.empty() && m_Track.GetCount() == 0;
}
void Move( const wxPoint& aMoveVector ) override;
@ -277,6 +288,26 @@ public:
void Remove( BOARD_ITEM* aBoardItem ) override;
/**
* Gets the first module in the list (used in footprint viewer/editor) or NULL if none
* @return first module or null pointer
*/
MODULE* GetFirstModule() const
{
return m_modules.empty() ? nullptr : m_modules.front();
}
/**
* Removes all modules from the deque and frees the memory associated with them
*/
void DeleteAllModules()
{
for( MODULE* mod : m_modules )
delete mod;
m_modules.clear();
}
BOARD_ITEM* GetItem( void* aWeakReference );
BOARD_ITEM* Duplicate( const BOARD_ITEM* aItem, bool aAddToBoard = false );

3
pcbnew/class_module.h
View File

@ -119,9 +119,6 @@ public:
return aItem && PCB_MODULE_T == aItem->Type();
}
MODULE* Next() const { return static_cast<MODULE*>( Pnext ); }
MODULE* Back() const { return static_cast<MODULE*>( Pback ); }
///> @copydoc BOARD_ITEM_CONTAINER::Add()
void Add( BOARD_ITEM* aItem, ADD_MODE aMode = ADD_INSERT ) override;

19
pcbnew/dialogs/dialog_exchange_footprints.cpp
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@ -284,13 +284,11 @@ void DIALOG_EXCHANGE_FOOTPRINTS::OnApplyClicked( wxCommandEvent& event )
bool DIALOG_EXCHANGE_FOOTPRINTS::processMatchingModules()
{
MODULE* Module;
MODULE* PtBack;
bool change = false;
LIB_ID newFPID;
wxString value;
if( !m_parent->GetBoard()->m_Modules )
if( m_parent->GetBoard()->Modules().empty() )
return false;
if( !m_updateMode )
@ -303,26 +301,23 @@ bool DIALOG_EXCHANGE_FOOTPRINTS::processMatchingModules()
/* The change is done from the last module because processModule() modifies the last item
* in the list.
* Note: for the first module in chain (the last here), Module->Back() points to the board
* or is NULL.
*/
Module = m_parent->GetBoard()->m_Modules.GetLast();
for( ; Module && Module->Type() == PCB_MODULE_T; Module = PtBack )
for( auto it = m_parent->GetBoard()->Modules().rbegin();
it != m_parent->GetBoard()->Modules().rend(); it++ )
{
PtBack = Module->Back();
auto mod = *it;
if( !isMatch( Module ) )
if( !isMatch( mod ) )
continue;
if( m_updateMode )
{
if( processModule( Module, Module->GetFPID()) )
if( processModule( mod, mod->GetFPID() ) )
change = true;
}
else
{
if( processModule( Module, newFPID ) )
if( processModule( mod, newFPID ) )
change = true;
}
}

2
pcbnew/dialogs/dialog_find.cpp
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@ -99,7 +99,7 @@ void DIALOG_FIND::onButtonFindItemClick( wxCommandEvent& aEvent )
int count = 0;
for( MODULE* module = parent->GetBoard()->m_Modules; module; module = module->Next() )
for( auto module : parent->GetBoard()->Modules() )
{
if( WildCompareString( searchString, module->GetReference().GetData(), false ) )
{

2
pcbnew/dialogs/dialog_gendrill.cpp
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@ -153,7 +153,7 @@ void DIALOG_GENDRILL::InitDisplayParams()
m_microViasCount = 0;
m_blindOrBuriedViasCount = 0;
for( MODULE* module = m_board->m_Modules; module; module = module->Next() )
for( auto module : m_board->Modules() )
{
for( D_PAD* pad = module->PadsList(); pad != NULL; pad = pad->Next() )
{

5
pcbnew/dialogs/dialog_global_deletion.cpp
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@ -110,7 +110,6 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete()
BOARD* pcb = m_Parent->GetBoard();
BOARD_COMMIT commit( m_Parent );
BOARD_ITEM* item;
LSET layers_filter = LSET().set();
@ -120,7 +119,7 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete()
if( delAll || m_DelZones->GetValue() )
{
int area_index = 0;
item = pcb->GetArea( area_index );
auto item = pcb->GetArea( area_index );
while( item )
{
@ -170,7 +169,7 @@ void DIALOG_GLOBAL_DELETION::AcceptPcbDelete()
if( delAll || m_DelModules->GetValue() )
{
for( item = pcb->m_Modules; item; item = item->Next() )
for( auto item : pcb->Modules() )
{
bool del_fp = delAll;

2
pcbnew/dialogs/dialog_netlist.cpp
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@ -178,7 +178,7 @@ void DIALOG_NETLIST::OnUpdatePCB( wxCommandEvent& event )
void DIALOG_NETLIST::OnTestFootprintsClick( wxCommandEvent& event )
{
if( m_parent->GetBoard()->m_Modules == nullptr )
if( m_parent->GetBoard()->GetFirstModule() == nullptr )
{
DisplayInfoMessage( this, _( "No footprints." ) );
return;

31
pcbnew/drc.cpp
View File

@ -1478,23 +1478,25 @@ void DRC::doFootprintOverlappingDrc()
void DRC::TestFootprints( NETLIST& aNetlist, BOARD* aPCB, EDA_UNITS_T aUnits,
DRC_LIST& aDRCList )
{
MODULE* module;
MODULE* nextModule;
auto mods = aPCB->Modules();
std::sort( mods.begin(), mods.end(), []( const MODULE* a, const MODULE* b ) {
return a->GetReference().CmpNoCase( b->GetReference() );
} );
// Search for duplicate footprints.
for( module = aPCB->m_Modules; module != NULL; module = module->Next() )
for( auto it = mods.begin(); it != mods.end(); it++ )
{
nextModule = module->Next();
auto next_it = it + 1;
for( ; nextModule != NULL; nextModule = nextModule->Next() )
if( next_it == mods.end() )
break;
if( ( *it )->GetReference().CmpNoCase( ( *next_it )->GetReference() ) == 0 )
{
if( module->GetReference().CmpNoCase( nextModule->GetReference() ) == 0 )
{
aDRCList.emplace_back( new DRC_ITEM( aUnits, DRCE_DUPLICATE_FOOTPRINT,
module, module->GetPosition(),
nextModule, nextModule->GetPosition() ) );
break;
}
aDRCList.emplace_back( new DRC_ITEM( aUnits, DRCE_DUPLICATE_FOOTPRINT, *it,
( *it )->GetPosition(), *next_it, ( *next_it )->GetPosition() ) );
break;
}
}
@ -1503,7 +1505,7 @@ void DRC::TestFootprints( NETLIST& aNetlist, BOARD* aPCB, EDA_UNITS_T aUnits,
{
COMPONENT* component = aNetlist.GetComponent( ii );
module = aPCB->FindModuleByReference( component->GetReference() );
auto module = aPCB->FindModuleByReference( component->GetReference() );
if( module == NULL )
{
@ -1516,9 +1518,8 @@ void DRC::TestFootprints( NETLIST& aNetlist, BOARD* aPCB, EDA_UNITS_T aUnits,
}
// Search for component footprints found on board but not in netlist.
for( module = aPCB->m_Modules; module != NULL; module = module->Next() )
for( auto module : mods )
{
COMPONENT* component = aNetlist.GetComponentByReference( module->GetReference() );
if( component == NULL )

18
pcbnew/drc/courtyard_overlap.cpp
View File

@ -65,7 +65,7 @@ bool DRC_COURTYARD_OVERLAP::RunDRC( BOARD& aBoard ) const
const DRC_MARKER_FACTORY& marker_factory = GetMarkerFactory();
// Update courtyard polygons, and test for missing courtyard definition:
for( MODULE* footprint = aBoard.m_Modules; footprint; footprint = footprint->Next() )
for( auto footprint : aBoard.Modules() )
{
wxPoint pos = footprint->GetPosition();
bool is_ok = footprint->BuildPolyCourtyard();
@ -99,13 +99,17 @@ bool DRC_COURTYARD_OVERLAP::RunDRC( BOARD& aBoard ) const
// Now test for overlapping on top layer:
SHAPE_POLY_SET courtyard; // temporary storage of the courtyard of current footprint
for( MODULE* footprint = aBoard.m_Modules; footprint; footprint = footprint->Next() )
for( auto it1 = aBoard.Modules().begin(); it1 != aBoard.Modules().end(); it1++ )
{
auto footprint = *it1;
if( footprint->GetPolyCourtyardFront().OutlineCount() == 0 )
continue; // No courtyard defined
for( MODULE* candidate = footprint->Next(); candidate; candidate = candidate->Next() )
for( auto it2 = it1 + 1; it2 != aBoard.Modules().end(); it2++ )
{
auto candidate = *it2;
if( candidate->GetPolyCourtyardFront().OutlineCount() == 0 )
continue; // No courtyard defined
@ -132,13 +136,17 @@ bool DRC_COURTYARD_OVERLAP::RunDRC( BOARD& aBoard ) const
}
// Test for overlapping on bottom layer:
for( MODULE* footprint = aBoard.m_Modules; footprint; footprint = footprint->Next() )
for( auto it1 = aBoard.Modules().begin(); it1 != aBoard.Modules().end(); it1++ )
{
auto footprint = *it1;
if( footprint->GetPolyCourtyardBack().OutlineCount() == 0 )
continue; // No courtyard defined
for( MODULE* candidate = footprint->Next(); candidate; candidate = candidate->Next() )
for( auto it2 = it1 + 1; it2 != aBoard.Modules().end(); it2++ )
{
auto candidate = *it2;
if( candidate->GetPolyCourtyardBack().OutlineCount() == 0 )
continue; // No courtyard defined

3
pcbnew/exporters/export_d356.cpp
View File

@ -114,8 +114,7 @@ static void build_pad_testpoints( BOARD *aPcb,
{
wxPoint origin = aPcb->GetAuxOrigin();
for( MODULE* module = aPcb->m_Modules;
module; module = module->Next() )
for( auto module : aPcb->Modules() )
{
for( D_PAD* pad = module->PadsList(); pad; pad = pad->Next() )
{

2
pcbnew/exporters/export_footprint_associations.cpp
View File

@ -40,7 +40,7 @@ bool RecreateCmpFile( BOARD * aBrd, const wxString& aFullCmpFileName )
fprintf( cmpFile, "Cmp-Mod V01 Created by PcbNew date = %s\n", TO_UTF8( DateAndTime() ) );
for( MODULE* module = aBrd->m_Modules; module != NULL; module = module->Next() )
for( auto module : aBrd->Modules() )
{
fprintf( cmpFile, "\nBeginCmp\n" );
fprintf( cmpFile, "TimeStamp = %8.8lX\n", (unsigned long)module->GetTimeStamp() );

13
pcbnew/exporters/export_gencad.cpp
View File

@ -311,9 +311,8 @@ void PCB_EDIT_FRAME::ExportToGenCAD( wxCommandEvent& aEvent )
* these changes will be undone later
*/
BOARD* pcb = GetBoard();
MODULE* module;
for( module = pcb->m_Modules; module; module = module->Next() )
for( auto module : pcb->Modules() )
{
module->SetFlag( 0 );
@ -349,7 +348,7 @@ void PCB_EDIT_FRAME::ExportToGenCAD( wxCommandEvent& aEvent )
fclose( file );
// Undo the footprints modifications (flipped footprints)
for( module = pcb->m_Modules; module; module = module->Next() )
for( auto module : pcb->Modules() )
{
if( module->GetFlag() )
{
@ -732,7 +731,6 @@ static size_t hashModule( const MODULE* aModule )
*/
static void CreateShapesSection( FILE* aFile, BOARD* aPcb )
{
MODULE* module;
D_PAD* pad;
const char* layer;
wxString pinname;
@ -741,7 +739,7 @@ static void CreateShapesSection( FILE* aFile, BOARD* aPcb )
fputs( "$SHAPES\n", aFile );
for( module = aPcb->m_Modules; module; module = module->Next() )
for( auto module : aPcb->Modules() )
{
if( !individualShapes )
{
@ -854,7 +852,7 @@ static void CreateComponentsSection( FILE* aFile, BOARD* aPcb )
int cu_count = aPcb->GetCopperLayerCount();
for( MODULE* module = aPcb->m_Modules; module; module = module->Next() )
for( auto module : aPcb->Modules() )
{
const char* mirror;
const char* flip;
@ -929,7 +927,6 @@ static void CreateSignalsSection( FILE* aFile, BOARD* aPcb )
wxString msg;
NETINFO_ITEM* net;
D_PAD* pad;
MODULE* module;
int NbNoConn = 1;
fputs( "$SIGNALS\n", aFile );
@ -951,7 +948,7 @@ static void CreateSignalsSection( FILE* aFile, BOARD* aPcb )
fputs( TO_UTF8( msg ), aFile );
fputs( "\n", aFile );
for( module = aPcb->m_Modules; module; module = module->Next() )
for( auto module : aPcb->Modules() )
{
for( pad = module->PadsList(); pad; pad = pad->Next() )
{

2
pcbnew/exporters/export_idf.cpp
View File

@ -596,7 +596,7 @@ bool PCB_EDIT_FRAME::Export_IDF3( BOARD* aPcb, const wxString& aFullFileName,
idf_export_outline( aPcb, idfBoard );
// Output the drill holes and module (library) data.
for( MODULE* module = aPcb->m_Modules; module != 0; module = module->Next() )
for( auto module : aPcb->Modules() )
idf_export_module( aPcb, module, idfBoard );
if( !idfBoard.WriteFile( aFullFileName, idfUnit, false ) )

4
pcbnew/exporters/export_vrml.cpp
View File

@ -1622,7 +1622,7 @@ bool PCB_EDIT_FRAME::ExportVRML_File( const wxString& aFullFileName, double aMMt
output_file << " children [\n";
// Export footprints
for( MODULE* module = pcb->m_Modules; module != 0; module = module->Next() )
for( auto module : pcb->Modules() )
export_vrml_module( model3d, pcb, module, &output_file );
// write out the board and all layers
@ -1636,7 +1636,7 @@ bool PCB_EDIT_FRAME::ExportVRML_File( const wxString& aFullFileName, double aMMt
else
{
// Export footprints
for( MODULE* module = pcb->m_Modules; module != 0; module = module->Next() )
for( auto module : pcb->Modules() )
export_vrml_module( model3d, pcb, module, NULL );
// write out the board and all layers

6
pcbnew/exporters/gen_footprints_placefile.cpp
View File

@ -431,8 +431,6 @@ int PCB_EDIT_FRAME::DoGenFootprintsPositionFile( const wxString& aFullFileName,
bool aForceSmdItems, int aSide,
bool aFormatCSV )
{
MODULE* footprint;
// Minimal text lengths:
int lenRefText = 8;
int lenValText = 8;
@ -451,7 +449,7 @@ int PCB_EDIT_FRAME::DoGenFootprintsPositionFile( const wxString& aFullFileName,
std::vector<LIST_MOD> list;
list.reserve( footprintCount );
for( footprint = GetBoard()->m_Modules; footprint; footprint = footprint->Next() )
for( auto footprint : GetBoard()->Modules() )
{
if( aSide != PCB_BOTH_SIDES )
{
@ -696,7 +694,7 @@ bool PCB_EDIT_FRAME::DoGenFootprintsReport( const wxString& aFullFilename, bool
fputs( "$EndBOARD\n\n", rptfile );
for( MODULE* Module = GetBoard()->m_Modules; Module; Module = Module->Next() )
for( auto Module : GetBoard()->Modules() )
{
fprintf( rptfile, "$MODULE %s\n", EscapedUTF8( Module->GetReference() ).c_str() );

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