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Update demos
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jean-pierre charras
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demos
complex_hierarchy
ecc83
test_pads_inside_pads
@ -1,302 +0,0 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# complex_hierarchy_schlib_+12C
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#
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DEF complex_hierarchy_schlib_+12C #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "complex_hierarchy_schlib_+12C" 0 150 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +12C 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_+12V
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#
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DEF complex_hierarchy_schlib_+12V #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "complex_hierarchy_schlib_+12V" 0 140 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +12V 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_-VAA
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#
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DEF complex_hierarchy_schlib_-VAA #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 100 20 H I C CNN
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F1 "complex_hierarchy_schlib_-VAA" 0 100 30 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 3 0 1 0 0 0 0 50 0 50 N
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P 7 0 1 0 0 80 30 50 -20 50 -30 50 0 80 0 80 0 80 F
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X -VAA 1 0 0 0 U 20 20 0 0 W N
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_7805
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#
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DEF complex_hierarchy_schlib_7805 U 0 20 Y Y 1 F N
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F0 "U" 150 -196 60 H V C CNN
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F1 "complex_hierarchy_schlib_7805" 0 200 60 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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S -200 -150 200 150 0 1 0 N
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X VO 1 400 50 200 L 30 40 1 1 w
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X GND 2 0 -250 100 U 30 40 1 1 I
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X VI 3 -400 50 200 R 30 40 1 1 I
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_C
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#
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DEF complex_hierarchy_schlib_C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "complex_hierarchy_schlib_C" 25 -100 50 H V L CNN
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F2 "" 38 -150 30 H V C CNN
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F3 "" 0 0 60 H V C CNN
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$FPLIST
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C?
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C_????_*
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C_????
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SMD*_c
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Capacitor*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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P 2 0 1 20 -80 30 80 30 N
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X ~ 1 0 150 110 D 40 40 1 1 P
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X ~ 2 0 -150 110 U 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_CONN_2
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#
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DEF complex_hierarchy_schlib_CONN_2 P 0 40 Y N 1 F N
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F0 "P" -50 0 40 V V C CNN
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F1 "complex_hierarchy_schlib_CONN_2" 50 0 40 V V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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S -100 150 100 -150 0 1 0 N
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X P1 1 -350 100 250 R 60 60 1 1 P I
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X PM 2 -350 -100 250 R 60 60 1 1 P I
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_CP
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#
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DEF complex_hierarchy_schlib_CP C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "complex_hierarchy_schlib_CP" 25 -100 50 H V L CNN
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F2 "" 38 -150 30 H V C CNN
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F3 "" 0 0 60 H V C CNN
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$FPLIST
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CP*
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Elko*
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TantalC*
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C*elec
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c_elec*
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SMD*_Pol
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$ENDFPLIST
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DRAW
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S -90 20 -90 40 0 1 0 N
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S -90 20 90 20 0 1 0 N
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S -70 90 -30 90 0 1 0 N
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S -50 70 -50 110 0 1 0 N
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S 90 -20 -90 -40 0 1 0 F
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S 90 40 -90 40 0 1 0 N
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S 90 40 90 20 0 1 0 N
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X ~ 1 0 150 110 D 40 40 1 1 P
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X ~ 2 0 -150 110 U 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_D_Small
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#
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DEF complex_hierarchy_schlib_D_Small D 0 10 N N 1 F N
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F0 "D" -50 80 50 H V L CNN
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F1 "complex_hierarchy_schlib_D_Small" -150 -80 50 H V L CNN
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F2 "" 0 0 60 V V C CNN
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F3 "" 0 0 60 V V C CNN
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$FPLIST
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Diode_*
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D-Pak_TO252AA
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*SingleDiode
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*SingleDiode*
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*_Diode_*
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$ENDFPLIST
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DRAW
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P 2 0 1 0 -30 -40 -30 40 N
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P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F
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X K 1 -100 0 70 R 50 50 1 1 P
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X A 2 100 0 70 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_GND
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#
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DEF complex_hierarchy_schlib_GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "complex_hierarchy_schlib_GND" 0 -123 30 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GND 1 0 0 0 D 20 30 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_HT
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#
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DEF complex_hierarchy_schlib_HT #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 120 50 H I C CNN
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F1 "complex_hierarchy_schlib_HT" 0 90 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 3 0 1 0 0 0 0 40 0 40 N
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P 6 0 1 0 0 40 20 20 0 70 -20 20 0 40 0 40 N
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X HT 1 0 0 0 U 20 20 0 0 W N
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_ICL7660
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#
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DEF complex_hierarchy_schlib_ICL7660 U 0 40 Y Y 1 F N
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F0 "U" 200 400 70 H V L CNN
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F1 "complex_hierarchy_schlib_ICL7660" 50 -450 70 H V L CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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S -550 -350 550 350 0 1 0 N
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X CAP+ 2 -850 250 300 R 60 60 1 1 I
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X GND 3 -50 -650 300 U 60 60 1 1 W
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X CAP- 4 -850 50 300 R 60 60 1 1 I
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X VOUT 5 850 150 300 L 60 60 1 1 w
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X LV 6 850 -150 300 L 60 60 1 1 I
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X OSC 7 -850 -150 300 R 60 60 1 1 I
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X V+ 8 -50 650 300 D 60 60 1 1 W
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_MPSA42
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#
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DEF complex_hierarchy_schlib_MPSA42 Q 0 0 Y Y 1 F N
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F0 "Q" 150 -150 60 H V L CNN
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F1 "complex_hierarchy_schlib_MPSA42" 150 150 60 H V L CNN
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F2 "TO92-CBE" 150 0 30 H I C CNN
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F3 "" 0 0 60 H V C CNN
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$FPLIST
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TO92-CBE
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$ENDFPLIST
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DRAW
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C 50 0 111 0 1 10 N
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P 2 0 1 0 0 0 100 100 N
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P 3 0 1 10 0 75 0 -75 0 -75 N
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P 3 0 1 0 50 -50 0 0 0 0 N
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P 3 0 1 0 90 -90 100 -100 100 -100 N
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P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F
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X E 1 100 -200 100 U 20 20 1 1 P
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X B 2 -200 0 200 R 20 20 1 1 I
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X C 3 100 200 100 D 20 20 1 1 P
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_MPSA92
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#
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DEF complex_hierarchy_schlib_MPSA92 Q 0 0 Y Y 1 F N
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F0 "Q" 150 -150 60 H V L CNN
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F1 "complex_hierarchy_schlib_MPSA92" 150 150 60 H V L CNN
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F2 "TO92-CBE" 150 0 30 H I C CNN
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F3 "" 0 0 60 H V C CNN
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$FPLIST
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TO92-CBE
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$ENDFPLIST
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DRAW
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C 50 0 111 0 1 10 N
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P 2 0 1 0 0 0 100 100 N
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P 3 0 1 10 0 75 0 -75 0 -75 F
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P 3 0 1 0 25 -25 0 0 0 0 N
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P 3 0 1 0 100 -100 65 -65 65 -65 N
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P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F
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X E 1 100 -200 100 U 20 20 1 1 P
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X B 2 -200 0 200 R 20 20 1 1 I
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X C 3 100 200 100 D 20 20 1 1 P
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_POT
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#
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DEF complex_hierarchy_schlib_POT RV 0 40 Y N 1 F N
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F0 "RV" 0 -100 50 H V C CNN
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F1 "complex_hierarchy_schlib_POT" 0 0 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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S -150 50 150 -50 0 1 0 N
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P 3 0 1 0 0 50 -20 70 20 70 F
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X 1 1 -250 0 100 R 40 40 1 1 P
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X 2 2 0 150 80 D 40 40 1 1 P
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X 3 3 250 0 100 L 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_PWR_FLAG
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#
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DEF complex_hierarchy_schlib_PWR_FLAG #FLG 0 0 N N 1 F P
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F0 "#FLG" 0 95 50 H I C CNN
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F1 "complex_hierarchy_schlib_PWR_FLAG" 0 180 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
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X pwr 1 0 0 0 U 20 20 0 0 w
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_R
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#
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DEF complex_hierarchy_schlib_R R 0 0 N Y 1 F N
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F0 "R" 80 0 50 V V C CNN
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F1 "complex_hierarchy_schlib_R" 0 0 50 V V C CNN
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F2 "" -70 0 30 V V C CNN
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F3 "" 0 0 30 H V C CNN
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$FPLIST
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R_*
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Resistor_*
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$ENDFPLIST
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DRAW
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S -40 -100 40 100 0 1 10 N
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X ~ 1 0 150 50 D 60 60 1 1 P
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X ~ 2 0 -150 50 U 60 60 1 1 P
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ENDDRAW
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ENDDEF
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#
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# complex_hierarchy_schlib_VCC
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#
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DEF complex_hierarchy_schlib_VCC #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "complex_hierarchy_schlib_VCC" 0 150 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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C 0 75 25 0 1 0 N
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P 2 0 1 0 0 0 0 50 N
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X VCC 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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#End Library
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@ -1,324 +0,0 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# +12C
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#
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DEF +12C #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "+12C" 0 150 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +12C 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# +12V
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#
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DEF +12V #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "+12V" 0 140 50 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +12V 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# -VAA
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#
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DEF -VAA #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 100 20 H I C CNN
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F1 "-VAA" 0 100 30 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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P 3 0 1 0 0 0 0 50 0 50 N
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P 7 0 1 0 0 80 30 50 -20 50 -30 50 0 80 0 80 0 80 F
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X -VAA 1 0 0 0 U 20 20 0 0 W N
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ENDDRAW
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ENDDEF
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#
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# 7805
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#
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DEF 7805 U 0 20 Y Y 1 F N
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F0 "U" 150 -196 60 H V C CNN
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F1 "7805" 0 200 60 H V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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ALIAS 78L05 LM7805 LM7812
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DRAW
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S -200 -150 200 150 0 1 0 N
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X VO 1 400 50 200 L 30 40 1 1 w
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X GND 2 0 -250 100 U 30 40 1 1 I
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X VI 3 -400 50 200 R 30 40 1 1 I
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ENDDRAW
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ENDDEF
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#
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# C
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#
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DEF C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "C" 25 -100 50 H V L CNN
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F2 "" 38 -150 30 H V C CNN
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F3 "" 0 0 60 H V C CNN
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$FPLIST
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C?
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C_????_*
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C_????
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SMD*_c
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Capacitor*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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P 2 0 1 20 -80 30 80 30 N
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X ~ 1 0 150 110 D 40 40 1 1 P
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X ~ 2 0 -150 110 U 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# CONN_2
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#
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DEF CONN_2 P 0 40 Y N 1 F N
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F0 "P" -50 0 40 V V C CNN
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F1 "CONN_2" 50 0 40 V V C CNN
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F2 "" 0 0 60 H V C CNN
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F3 "" 0 0 60 H V C CNN
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DRAW
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S -100 150 100 -150 0 1 0 N
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X P1 1 -350 100 250 R 60 60 1 1 P I
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X PM 2 -350 -100 250 R 60 60 1 1 P I
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ENDDRAW
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ENDDEF
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#
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# CP
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#
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DEF CP C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "CP" 25 -100 50 H V L CNN
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F2 "" 38 -150 30 H V C CNN
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F3 "" 0 0 60 H V C CNN
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$FPLIST
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CP*
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Elko*
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TantalC*
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C*elec
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c_elec*
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SMD*_Pol
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$ENDFPLIST
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DRAW
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S -90 20 -90 40 0 1 0 N
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S -90 20 90 20 0 1 0 N
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S -70 90 -30 90 0 1 0 N
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S -50 70 -50 110 0 1 0 N
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S 90 -20 -90 -40 0 1 0 F
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S 90 40 -90 40 0 1 0 N
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S 90 40 90 20 0 1 0 N
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X ~ 1 0 150 110 D 40 40 1 1 P
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X ~ 2 0 -150 110 U 40 40 1 1 P
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ENDDRAW
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ENDDEF
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#
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# D_Small
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#
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DEF D_Small D 0 10 N N 1 F N
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F0 "D" -50 80 50 H V L CNN
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F1 "D_Small" -150 -80 50 H V L CNN
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F2 "" 0 0 60 V V C CNN
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F3 "" 0 0 60 V V C CNN
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$FPLIST
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Diode_*
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D-Pak_TO252AA
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*SingleDiode
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*SingleDiode*
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*_Diode_*
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$ENDFPLIST
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DRAW
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P 2 0 1 0 -30 -40 -30 40 N
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P 4 0 1 0 30 -40 -30 0 30 40 30 -40 F
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X K 1 -100 0 70 R 50 50 1 1 P
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X A 2 100 0 70 L 50 50 1 1 P
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ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# GND
|
||||
#
|
||||
DEF GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "GND" 0 -123 30 H V C CNN
|
||||
F2 "" 0 0 60 H V C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 20 30 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# HT
|
||||
#
|
||||
DEF HT #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 120 50 H I C CNN
|
||||
F1 "HT" 0 90 50 H V C CNN
|
||||
F2 "" 0 0 60 H V C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
DRAW
|
||||
P 3 0 1 0 0 0 0 40 0 40 N
|
||||
P 6 0 1 0 0 40 20 20 0 70 -20 20 0 40 0 40 N
|
||||
X HT 1 0 0 0 U 20 20 0 0 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# ICL7660
|
||||
#
|
||||
DEF ICL7660 U 0 40 Y Y 1 F N
|
||||
F0 "U" 200 400 70 H V L CNN
|
||||
F1 "ICL7660" 50 -450 70 H V L CNN
|
||||
F2 "" 0 0 60 H V C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
DRAW
|
||||
S -550 -350 550 350 0 1 0 N
|
||||
X CAP+ 2 -850 250 300 R 60 60 1 1 I
|
||||
X GND 3 -50 -650 300 U 60 60 1 1 W
|
||||
X CAP- 4 -850 50 300 R 60 60 1 1 I
|
||||
X VOUT 5 850 150 300 L 60 60 1 1 w
|
||||
X LV 6 850 -150 300 L 60 60 1 1 I
|
||||
X OSC 7 -850 -150 300 R 60 60 1 1 I
|
||||
X V+ 8 -50 650 300 D 60 60 1 1 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# LM358
|
||||
#
|
||||
DEF LM358 U 0 20 Y Y 2 F N
|
||||
F0 "U" -50 200 60 H V L CNN
|
||||
F1 "LM358" -50 -250 60 H V L CNN
|
||||
F2 "" 0 0 60 H V C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
ALIAS LM358N LMC6062 LMC6082 TL072 TL082
|
||||
DRAW
|
||||
P 4 0 1 6 -200 200 200 0 -200 -200 -200 200 f
|
||||
X V- 4 -100 -400 250 U 40 40 0 1 W
|
||||
X V+ 8 -100 400 250 D 40 40 0 1 W
|
||||
X ~ 1 500 0 300 L 40 40 1 1 O
|
||||
X - 2 -500 -100 300 R 40 40 1 1 I
|
||||
X + 3 -500 100 300 R 40 40 1 1 I
|
||||
X + 5 -500 100 300 R 40 40 2 1 I
|
||||
X - 6 -500 -100 300 R 40 40 2 1 I
|
||||
X ~ 7 500 0 300 L 40 40 2 1 O
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# MPSA42
|
||||
#
|
||||
DEF MPSA42 Q 0 0 Y Y 1 F N
|
||||
F0 "Q" 150 -150 60 H V L CNN
|
||||
F1 "MPSA42" 150 150 60 H V L CNN
|
||||
F2 "TO92-CBE" 150 0 30 H I C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
$FPLIST
|
||||
TO92-CBE
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
C 50 0 111 0 1 10 N
|
||||
P 2 0 1 0 0 0 100 100 N
|
||||
P 3 0 1 10 0 75 0 -75 0 -75 N
|
||||
P 3 0 1 0 50 -50 0 0 0 0 N
|
||||
P 3 0 1 0 90 -90 100 -100 100 -100 N
|
||||
P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F
|
||||
X E 1 100 -200 100 U 20 20 1 1 P
|
||||
X B 2 -200 0 200 R 20 20 1 1 I
|
||||
X C 3 100 200 100 D 20 20 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# MPSA92
|
||||
#
|
||||
DEF MPSA92 Q 0 0 Y Y 1 F N
|
||||
F0 "Q" 150 -150 60 H V L CNN
|
||||
F1 "MPSA92" 150 150 60 H V L CNN
|
||||
F2 "TO92-CBE" 150 0 30 H I C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
$FPLIST
|
||||
TO92-CBE
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
C 50 0 111 0 1 10 N
|
||||
P 2 0 1 0 0 0 100 100 N
|
||||
P 3 0 1 10 0 75 0 -75 0 -75 F
|
||||
P 3 0 1 0 25 -25 0 0 0 0 N
|
||||
P 3 0 1 0 100 -100 65 -65 65 -65 N
|
||||
P 5 0 1 0 25 -25 50 -75 75 -50 25 -25 25 -25 F
|
||||
X E 1 100 -200 100 U 20 20 1 1 P
|
||||
X B 2 -200 0 200 R 20 20 1 1 I
|
||||
X C 3 100 200 100 D 20 20 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# POT
|
||||
#
|
||||
DEF POT RV 0 40 Y N 1 F N
|
||||
F0 "RV" 0 -100 50 H V C CNN
|
||||
F1 "POT" 0 0 50 H V C CNN
|
||||
F2 "" 0 0 60 H V C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
DRAW
|
||||
S -150 50 150 -50 0 1 0 N
|
||||
P 3 0 1 0 0 50 -20 70 20 70 F
|
||||
X 1 1 -250 0 100 R 40 40 1 1 P
|
||||
X 2 2 0 150 80 D 40 40 1 1 P
|
||||
X 3 3 250 0 100 L 40 40 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# PWR_FLAG
|
||||
#
|
||||
DEF PWR_FLAG #FLG 0 0 N N 1 F P
|
||||
F0 "#FLG" 0 95 50 H I C CNN
|
||||
F1 "PWR_FLAG" 0 180 50 H V C CNN
|
||||
F2 "" 0 0 60 H V C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
|
||||
X pwr 1 0 0 0 U 20 20 0 0 w
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# R
|
||||
#
|
||||
DEF R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 30 V V C CNN
|
||||
F3 "" 0 0 30 H V C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
Resistor_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 60 60 1 1 P
|
||||
X ~ 2 0 -150 50 U 60 60 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# VCC
|
||||
#
|
||||
DEF VCC #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "VCC" 0 150 50 H V C CNN
|
||||
F2 "" 0 0 60 H V C CNN
|
||||
F3 "" 0 0 60 H V C CNN
|
||||
DRAW
|
||||
C 0 75 25 0 1 0 N
|
||||
P 2 0 1 0 0 0 0 50 N
|
||||
X VCC 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
LOADING design file
@ -57,7 +57,7 @@
|
||||
],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
@ -66,7 +66,7 @@
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_too_small": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
@ -74,10 +74,9 @@
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"keepout": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_too_small": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
@ -95,7 +94,6 @@
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"via_hole_larger_than_pad": "error",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
@ -105,6 +103,7 @@
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_copper_edge_clearance": 0.01,
|
||||
"min_hole_clearance": 0.0,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
@ -112,11 +111,7 @@
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"solder_mask_clearance": 0.09999999999999999,
|
||||
"solder_mask_min_width": 0.0,
|
||||
"solder_paste_clearance": 0.0,
|
||||
"solder_paste_margin_ratio": -0.0
|
||||
"min_via_diameter": 0.39999999999999997
|
||||
},
|
||||
"track_widths": [
|
||||
0.0
|
||||
@ -127,7 +122,7 @@
|
||||
"drill": 0.0
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": true,
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
"layer_presets": []
|
||||
|
||||
LOADING design file
@ -48,10 +48,16 @@
|
||||
"min_clearance": 0.508
|
||||
}
|
||||
},
|
||||
"diff_pair_dimensions": [],
|
||||
"diff_pair_dimensions": [
|
||||
{
|
||||
"gap": 0.0,
|
||||
"via_gap": 0.0,
|
||||
"width": 0.0
|
||||
}
|
||||
],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
@ -60,7 +66,7 @@
|
||||
"courtyards_overlap": "error",
|
||||
"diff_pair_gap_out_of_range": "error",
|
||||
"diff_pair_uncoupled_length_too_long": "error",
|
||||
"drill_too_small": "error",
|
||||
"drill_out_of_range": "error",
|
||||
"duplicate_footprints": "warning",
|
||||
"extra_footprint": "warning",
|
||||
"hole_clearance": "error",
|
||||
@ -68,10 +74,9 @@
|
||||
"invalid_outline": "error",
|
||||
"item_on_disabled_layer": "error",
|
||||
"items_not_allowed": "error",
|
||||
"keepout": "error",
|
||||
"length_out_of_range": "error",
|
||||
"malformed_courtyard": "error",
|
||||
"microvia_drill_too_small": "error",
|
||||
"microvia_drill_out_of_range": "error",
|
||||
"missing_courtyard": "ignore",
|
||||
"missing_footprint": "warning",
|
||||
"net_conflict": "warning",
|
||||
@ -89,7 +94,6 @@
|
||||
"unconnected_items": "error",
|
||||
"unresolved_variable": "error",
|
||||
"via_dangling": "warning",
|
||||
"via_hole_larger_than_pad": "error",
|
||||
"zone_has_empty_net": "error",
|
||||
"zones_intersect": "error"
|
||||
},
|
||||
@ -97,8 +101,9 @@
|
||||
"allow_blind_buried_vias": false,
|
||||
"allow_microvias": false,
|
||||
"max_error": 0.005,
|
||||
"min_clearance": 0.0,
|
||||
"min_clearance": 0.19999999999999998,
|
||||
"min_copper_edge_clearance": 0.01,
|
||||
"min_hole_clearance": 0.0,
|
||||
"min_hole_to_hole": 0.25,
|
||||
"min_microvia_diameter": 0.19999999999999998,
|
||||
"min_microvia_drill": 0.09999999999999999,
|
||||
@ -106,14 +111,17 @@
|
||||
"min_through_hole_diameter": 0.3,
|
||||
"min_track_width": 0.19999999999999998,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.39999999999999997,
|
||||
"solder_mask_clearance": 0.254,
|
||||
"solder_mask_min_width": 0.0,
|
||||
"solder_paste_clearance": 0.0,
|
||||
"solder_paste_margin_ratio": 0.0
|
||||
"min_via_diameter": 0.39999999999999997
|
||||
},
|
||||
"track_widths": [],
|
||||
"via_dimensions": [],
|
||||
"track_widths": [
|
||||
0.0
|
||||
],
|
||||
"via_dimensions": [
|
||||
{
|
||||
"diameter": 0.0,
|
||||
"drill": 0.0
|
||||
}
|
||||
],
|
||||
"zones_allow_external_fillets": false,
|
||||
"zones_use_no_outline": true
|
||||
},
|
||||
@ -124,6 +132,7 @@
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
@ -134,6 +143,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
@ -147,6 +157,7 @@
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -160,6 +171,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
@ -173,6 +185,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
@ -186,6 +199,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
@ -193,12 +207,27 @@
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
@ -212,6 +241,7 @@
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
@ -225,6 +255,7 @@
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -238,6 +269,7 @@
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -251,6 +283,7 @@
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -269,6 +302,7 @@
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
@ -279,7 +313,9 @@
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
@ -293,6 +329,8 @@
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
@ -372,7 +410,7 @@
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"13f868ae-89e7-4d33-969f-c77976a05076",
|
||||
"388c2d0e-ea8f-4a92-add6-03b9c5f0ccbe",
|
||||
""
|
||||
]
|
||||
],
|
||||
|
||||
LOADING design file
@ -1,3 +1,3 @@
|
||||
(sym_lib_table
|
||||
(lib (name test_pads_inside_pads_schlib)(type Legacy)(uri ${KIPRJMOD}/test_pads_inside_pads_schlib.lib)(options "")(descr ""))
|
||||
(lib (name "test_pads_inside_pads_schlib")(type "KiCad")(uri "${KIPRJMOD}/test_pads_inside_pads_schlib.kicad_sym")(options "")(descr ""))
|
||||
)
|
||||
|
||||
LOADING design file
@ -51,7 +51,7 @@
|
||||
"diff_pair_dimensions": [],
|
||||
"drc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 1
|
||||
"version": 2
|
||||
},
|
||||
"rule_severities": {
|
||||
"annular_width": "error",
|
||||
@ -105,11 +105,7 @@
|
||||
"min_through_hole_diameter": 0.508,
|
||||
"min_track_width": 0.2032,
|
||||
"min_via_annular_width": 0.049999999999999996,
|
||||
"min_via_diameter": 0.889,
|
||||
"solder_mask_clearance": 0.254,
|
||||
"solder_mask_min_width": 0.0,
|
||||
"solder_paste_clearance": 0.0,
|
||||
"solder_paste_margin_ratio": 0.0
|
||||
"min_via_diameter": 0.889
|
||||
},
|
||||
"track_widths": [],
|
||||
"via_dimensions": [],
|
||||
@ -123,6 +119,7 @@
|
||||
"equivalence_files": []
|
||||
},
|
||||
"erc": {
|
||||
"erc_exclusions": [],
|
||||
"meta": {
|
||||
"version": 0
|
||||
},
|
||||
@ -133,6 +130,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
@ -146,6 +144,7 @@
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -159,6 +158,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
@ -172,6 +172,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
2,
|
||||
@ -185,6 +186,7 @@
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
@ -192,12 +194,27 @@
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
2
|
||||
],
|
||||
[
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
1,
|
||||
1,
|
||||
1,
|
||||
@ -211,6 +228,7 @@
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
@ -224,6 +242,7 @@
|
||||
1,
|
||||
2,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -237,6 +256,7 @@
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -250,6 +270,7 @@
|
||||
1,
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
1,
|
||||
0,
|
||||
2,
|
||||
@ -268,6 +289,7 @@
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2,
|
||||
2
|
||||
]
|
||||
],
|
||||
@ -278,7 +300,9 @@
|
||||
"bus_to_net_conflict": "error",
|
||||
"different_unit_footprint": "error",
|
||||
"different_unit_net": "error",
|
||||
"duplicate_reference": "error",
|
||||
"duplicate_sheet_names": "error",
|
||||
"extra_units": "error",
|
||||
"global_label_dangling": "warning",
|
||||
"hier_label_mismatch": "error",
|
||||
"label_dangling": "error",
|
||||
@ -292,6 +316,8 @@
|
||||
"pin_to_pin": "warning",
|
||||
"power_pin_not_driven": "error",
|
||||
"similar_labels": "warning",
|
||||
"unannotated": "error",
|
||||
"unit_value_mismatch": "error",
|
||||
"unresolved_variable": "error",
|
||||
"wire_dangling": "error"
|
||||
}
|
||||
@ -371,7 +397,7 @@
|
||||
},
|
||||
"sheets": [
|
||||
[
|
||||
"d83edf3e-df9e-48d3-b50a-87ddee1bc3a6",
|
||||
"c2971e40-9f03-4308-8999-e3e2a004a35a",
|
||||
""
|
||||
]
|
||||
],
|
||||
|
||||
LOADING design file
Loading…
Reference in New Issue
Block a user