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DRC creepage

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This commit is contained in:
Fabien Corona 2024-10-15 18:04:51 +00:00
parent 1677288798
commit f258cc5164
20 changed files with 3659 additions and 5 deletions

6
common/advanced_config.cpp
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@ -64,6 +64,7 @@ namespace AC_KEYS
static const wxChar IncrementalConnectivity[] = wxT( "IncrementalConnectivity" );
static const wxChar Use3DConnexionDriver[] = wxT( "3DConnexionDriver" );
static const wxChar ExtraFillMargin[] = wxT( "ExtraFillMargin" );
static const wxChar EnableCreepageDRC[] = wxT( "EnableCreepageDRC" );
static const wxChar DRCEpsilon[] = wxT( "DRCEpsilon" );
static const wxChar DRCSliverWidthTolerance[] = wxT( "DRCSliverWidthTolerance" );
static const wxChar DRCSliverMinimumLength[] = wxT( "DRCSliverMinimumLength" );
@ -222,6 +223,7 @@ ADVANCED_CFG::ADVANCED_CFG()
m_DrawTriangulationOutlines = false;
m_ExtraClearance = 0.0005;
m_EnableCreepageDRC = false;
m_DRCEpsilon = 0.0005; // 0.5um is small enough not to materially violate
// any constraints.
m_SliverWidthTolerance = 0.08;
@ -338,6 +340,10 @@ void ADVANCED_CFG::loadSettings( wxConfigBase& aCfg )
&m_ExtraClearance,
m_ExtraClearance, 0.0, 1.0 ) );
configParams.push_back( new PARAM_CFG_BOOL( true, AC_KEYS::EnableCreepageDRC,
&m_EnableCreepageDRC, m_EnableCreepageDRC ) );
configParams.push_back( new PARAM_CFG_DOUBLE( true, AC_KEYS::DRCEpsilon,
&m_DRCEpsilon, m_DRCEpsilon, 0.0, 1.0 ) );

1
common/drc_rules.keywords
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@ -7,6 +7,7 @@ condition
connection_width
constraint
courtyard_clearance
creepage
diff_pair_gap
diff_pair_uncoupled
disallow

1
common/pcb.keywords
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@ -88,6 +88,7 @@ convexhull
copper_line_width
copper_text_dims
courtyard_line_width
creepage
data
date
defaults

8
include/advanced_config.h
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@ -124,6 +124,14 @@ public:
*/
double m_ExtraClearance;
/**
* Enable the DRC creepage check
*
* Setting name: "EnableCreepageDRC"
* Default value: false
*/
bool m_EnableCreepageDRC;
/**
* Epsilon for DRC tests.
*

1
pcbnew/CMakeLists.txt
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@ -256,6 +256,7 @@ set( PCBNEW_DRC_SRCS
drc/drc_test_provider.cpp
drc/drc_test_provider_annular_width.cpp
drc/drc_test_provider_disallow.cpp
drc/drc_test_provider_creepage.cpp
drc/drc_test_provider_connectivity.cpp
drc/drc_test_provider_connection_width.cpp
drc/drc_test_provider_copper_clearance.cpp

1
pcbnew/dialogs/panel_setup_rules.cpp
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@ -461,6 +461,7 @@ void PANEL_SETUP_RULES::onScintillaCharAdded( wxStyledTextEvent &aEvent )
"clearance|"
"connection_width|"
"courtyard_clearance|"
"creepage|"
"diff_pair_gap|"
"diff_pair_uncoupled|"
"disallow|"

1
pcbnew/dialogs/panel_setup_rules_help.md
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@ -27,6 +27,7 @@
| `assertion` | "&lt;expression>" | Checks the given expression.<br> |
| `clearance` | min | Specifies the **electrical** clearance between copper objects of different nets. (See `physical_clearance` if you wish to specify clearance between objects regardless of net.)<br><br>To allow copper objects to overlap (collide), create a `clearance` constraint with the `min` value less than zero (for example, `-1`).<br> |
| `courtyard_clearance` | min | Checks the clearance between footprint courtyards and generates an error if any two courtyards are closer than the `min` distance. If a footprint does not have a courtyard shape, no errors will be generated from this constraint.<br> |
<!--| `creepage` | min | Specifies the **electrical** creepage between copper objects of different nets.<br> -->
| `diff_pair_gap` | min/opt/max | Checks the gap between coupled tracks in a differential pair. Coupled tracks are segments that are parallel to each other. Differential pair gap is not tested on uncoupled portions of a differential pair (for example, the fanout from a component).<br> |
| `diff_pair_uncoupled` | max | Checks the distance that a differential pair track is routed uncoupled from the other polarity track in the pair (for example, where the pair fans out from a component, or becomes uncoupled to pass around another object such as a via).<br> |
| `disallow` | `track`<br>`via`<br>`micro_via`<br>`buried_via`<br>`pad`<br>`zone`<br>`text`<br>`graphic`<br>`hole`<br>`footprint`<br> | Specify one or more object types to disallow, separated by spaces. For example, `(constraint disallow track)` or `(constraint disallow track via pad)`. If an object of this type matches the rule condition, a DRC error will be created.<br><br>This constraint is essentially the same as a keepout rule area, but can be used to create more specific keepout restrictions.<br> |

1
pcbnew/dialogs/panel_setup_rules_help_md.h
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@ -28,6 +28,7 @@ _HKI( "### Top-level Clauses\n"
"| `assertion` | \"&lt;expression>\" | Checks the given expression.<br> |\n"
"| `clearance` | min | Specifies the **electrical** clearance between copper objects of different nets. (See `physical_clearance` if you wish to specify clearance between objects regardless of net.)<br><br>To allow copper objects to overlap (collide), create a `clearance` constraint with the `min` value less than zero (for example, `-1`).<br> |\n"
"| `courtyard_clearance` | min | Checks the clearance between footprint courtyards and generates an error if any two courtyards are closer than the `min` distance. If a footprint does not have a courtyard shape, no errors will be generated from this constraint.<br> |\n"
"<!-- | `creepage` | min | Specifies the **electrical** creepage between copper objects of different nets.<br> --> \n"
"| `diff_pair_gap` | min/opt/max | Checks the gap between coupled tracks in a differential pair. Coupled tracks are segments that are parallel to each other. Differential pair gap is not tested on uncoupled portions of a differential pair (for example, the fanout from a component).<br> |\n"
"| `diff_pair_uncoupled` | max | Checks the distance that a differential pair track is routed uncoupled from the other polarity track in the pair (for example, where the pair fans out from a component, or becomes uncoupled to pass around another object such as a via).<br> |\n"
"| `disallow` | `track`<br>`via`<br>`micro_via`<br>`buried_via`<br>`pad`<br>`zone`<br>`text`<br>`graphic`<br>`hole`<br>`footprint`<br> | Specify one or more object types to disallow, separated by spaces. For example, `(constraint disallow track)` or `(constraint disallow track via pad)`. If an object of this type matches the rule condition, a DRC error will be created.<br><br>This constraint is essentially the same as a keepout rule area, but can be used to create more specific keepout restrictions.<br> |\n"

10
pcbnew/drc/drc_engine.cpp
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@ -593,7 +593,8 @@ void DRC_ENGINE::InitEngine( const wxFileName& aRulePath )
}
void DRC_ENGINE::RunTests( EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aTestFootprints )
void DRC_ENGINE::RunTests( EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aTestFootprints,
BOARD_COMMIT* aCommit )
{
SetUserUnits( aUnits );
@ -625,6 +626,7 @@ void DRC_ENGINE::RunTests( EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aT
for( DRC_TEST_PROVIDER* provider : m_testProviders )
{
ReportAux( wxString::Format( wxT( "Run DRC provider: '%s'" ), provider->GetName() ) );
provider->SetCommit( aCommit );
if( !provider->RunTests( aUnits ) )
break;
@ -906,7 +908,11 @@ DRC_CONSTRAINT DRC_ENGINE::EvalRules( DRC_CONSTRAINT_T aConstraintType, const BO
EscapeHTML( c->constraint.GetName() ),
MessageTextFromValue( c->constraint.m_Value.Min() ) ) )
break;
case CREEPAGE_CONSTRAINT:
REPORT( wxString::Format( _( "Checking %s creepage: %s." ),
EscapeHTML( c->constraint.GetName() ),
MessageTextFromValue( c->constraint.m_Value.Min() ) ) )
break;
case MAX_UNCOUPLED_CONSTRAINT:
REPORT( wxString::Format( _( "Checking %s max uncoupled length: %s." ),
EscapeHTML( c->constraint.GetName() ),

4
pcbnew/drc/drc_engine.h
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@ -34,6 +34,7 @@
#include <drc/drc_rule.h>
class BOARD_COMMIT;
class BOARD_DESIGN_SETTINGS;
class DRC_TEST_PROVIDER;
class PCB_EDIT_FRAME;
@ -142,7 +143,8 @@ public:
/**
* Run the DRC tests.
*/
void RunTests( EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aTestFootprints );
void RunTests( EDA_UNITS aUnits, bool aReportAllTrackErrors, bool aTestFootprints,
BOARD_COMMIT* aCommit = nullptr );
bool IsErrorLimitExceeded( int error_code );

6
pcbnew/drc/drc_item.cpp
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@ -70,6 +70,10 @@ DRC_ITEM DRC_ITEM::clearance( DRCE_CLEARANCE,
_( "Clearance violation" ),
wxT( "clearance" ) );
DRC_ITEM DRC_ITEM::creepage( DRCE_CREEPAGE,
_( "Creepage violation" ),
wxT( "creepage" ) );
DRC_ITEM DRC_ITEM::tracksCrossing( DRCE_TRACKS_CROSSING,
_( "Tracks crossing" ),
wxT( "tracks_crossing" ) );
@ -286,6 +290,7 @@ std::vector<std::reference_wrapper<RC_ITEM>> DRC_ITEM::allItemTypes(
DRC_ITEM::shortingItems,
DRC_ITEM::tracksCrossing,
DRC_ITEM::clearance,
DRC_ITEM::creepage,
DRC_ITEM::viaDangling,
DRC_ITEM::trackDangling,
DRC_ITEM::starvedThermal,
@ -363,6 +368,7 @@ std::shared_ptr<DRC_ITEM> DRC_ITEM::Create( int aErrorCode )
case DRCE_ALLOWED_ITEMS: return std::make_shared<DRC_ITEM>( itemsNotAllowed );
case DRCE_TEXT_ON_EDGECUTS: return std::make_shared<DRC_ITEM>( textOnEdgeCuts );
case DRCE_CLEARANCE: return std::make_shared<DRC_ITEM>( clearance );
case DRCE_CREEPAGE: return std::make_shared<DRC_ITEM>( creepage );
case DRCE_TRACKS_CROSSING: return std::make_shared<DRC_ITEM>( tracksCrossing );
case DRCE_EDGE_CLEARANCE: return std::make_shared<DRC_ITEM>( edgeClearance );
case DRCE_ZONES_INTERSECT: return std::make_shared<DRC_ITEM>( zonesIntersect );

2
pcbnew/drc/drc_item.h
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@ -41,6 +41,7 @@ enum PCB_DRC_CODE {
DRCE_ALLOWED_ITEMS, // a disallowed item has been used
DRCE_TEXT_ON_EDGECUTS, // text or dimension on Edge.Cuts layer
DRCE_CLEARANCE, // items are too close together
DRCE_CREEPAGE, // items are too close together ( creepage )
DRCE_TRACKS_CROSSING, // tracks are crossing
DRCE_EDGE_CLEARANCE, // a copper item is too close to the board edge
DRCE_ZONES_INTERSECT, // copper zone outlines intersect
@ -178,6 +179,7 @@ private:
static DRC_ITEM itemsNotAllowed;
static DRC_ITEM textOnEdgeCuts;
static DRC_ITEM clearance;
static DRC_ITEM creepage;
static DRC_ITEM tracksCrossing;
static DRC_ITEM edgeClearance;
static DRC_ITEM zonesIntersect;

1
pcbnew/drc/drc_rule.h
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@ -47,6 +47,7 @@ enum DRC_CONSTRAINT_T
{
NULL_CONSTRAINT = 0,
CLEARANCE_CONSTRAINT,
CREEPAGE_CONSTRAINT,
HOLE_CLEARANCE_CONSTRAINT,
HOLE_TO_HOLE_CONSTRAINT,
EDGE_CLEARANCE_CONSTRAINT,

1
pcbnew/drc/drc_rule_parser.cpp
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@ -306,6 +306,7 @@ void DRC_RULES_PARSER::parseConstraint( DRC_RULE* aRule )
{
case T_assertion: c.m_Type = ASSERTION_CONSTRAINT; break;
case T_clearance: c.m_Type = CLEARANCE_CONSTRAINT; break;
case T_creepage: c.m_Type = CREEPAGE_CONSTRAINT; break;
case T_hole_clearance: c.m_Type = HOLE_CLEARANCE_CONSTRAINT; break;
case T_edge_clearance: c.m_Type = EDGE_CLEARANCE_CONSTRAINT; break;
case T_hole_size: c.m_Type = HOLE_SIZE_CONSTRAINT; break;

5
pcbnew/drc/drc_test_provider.h
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@ -26,6 +26,7 @@
#define DRC_TEST_PROVIDER__H
#include <board.h>
#include <board_commit.h>
#include <pcb_marker.h>
#include <functional>
@ -99,6 +100,9 @@ public:
virtual const wxString GetName() const;
virtual const wxString GetDescription() const;
BOARD_COMMIT* GetCommit() const { return m_commit; };
void SetCommit( BOARD_COMMIT* aCommit ) { m_commit = aCommit; };
protected:
int forEachGeometryItem( const std::vector<KICAD_T>& aTypes, LSET aLayers,
const std::function<bool(BOARD_ITEM*)>& aFunc );
@ -133,6 +137,7 @@ protected:
std::unordered_map<const DRC_RULE*, int> m_stats;
bool m_isRuleDriven = true;
std::mutex m_statsMutex;
BOARD_COMMIT* m_commit;
};
#endif // DRC_TEST_PROVIDER__H

3573
pcbnew/drc/drc_test_provider_creepage.cpp Normal file
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File diff suppressed because it is too large Load Diff

7
pcbnew/pcb_marker.cpp
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@ -348,7 +348,12 @@ void PCB_MARKER::SetZoom( double aZoomFactor )
const BOX2I PCB_MARKER::GetBoundingBox() const
{
return GetBoundingBoxMarker();
BOX2I box = GetBoundingBoxMarker();
for( auto& s : m_shapes )
box.Merge( s.GetBoundingBox() );
return box;
}

7
pcbnew/pcb_marker.h
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@ -27,6 +27,7 @@
#include <board_item.h>
#include <pcb_shape.h>
#include <rc_item.h>
#include <marker_base.h>
@ -134,8 +135,14 @@ public:
return wxT( "PCB_MARKER" );
}
std::vector<PCB_SHAPE> GetShapes() const { return m_shapes; };
void SetShapes( const std::vector<PCB_SHAPE>& aShapes ) { m_shapes = aShapes; };
protected:
KIGFX::COLOR4D getColor() const override;
std::vector<PCB_SHAPE> m_shapes;
};
#endif // PCB_MARKER_H

25
pcbnew/pcb_painter.cpp
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@ -2943,6 +2943,31 @@ void PCB_PAINTER::draw( const PCB_MARKER* aMarker, int aLayer )
m_gal->DrawPolygon( polygon );
m_gal->Restore();
if( isShadow || ( aMarker->GetShapes().size() <= 0 ) )
return; // Don't add shadow to shapes
// Show pat
m_gal->SetIsFill( false );
m_gal->SetIsStroke( true );
m_gal->SetStrokeColor( color );
m_gal->SetLineWidth( aMarker->MarkerScale() );
for( auto& shape : aMarker->GetShapes() )
{
switch( shape.GetShape() )
{
case SHAPE_T::SEGMENT: m_gal->DrawSegment( shape.GetStart(), shape.GetEnd(), 0 ); break;
case SHAPE_T::ARC:
{
EDA_ANGLE startAngle, endAngle;
shape.CalcArcAngles( startAngle, endAngle );
m_gal->DrawArc( shape.GetCenter(), shape.GetRadius(), startAngle, shape.GetArcAngle() );
break;
}
default: break;
}
}
}

3
pcbnew/tools/drc_tool.cpp
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@ -178,7 +178,8 @@ void DRC_TOOL::RunTests( PROGRESS_REPORTER* aProgressReporter, bool aRefillZones
commit.Add( marker );
} );
m_drcEngine->RunTests( m_editFrame->GetUserUnits(), aReportAllTrackErrors, aTestFootprints );
m_drcEngine->RunTests( m_editFrame->GetUserUnits(), aReportAllTrackErrors, aTestFootprints,
&commit );
m_drcEngine->SetProgressReporter( nullptr );
m_drcEngine->ClearViolationHandler();