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0b2d4d4879
Recommendation is to avoid using the year nomenclature as this information is already encoded in the git repo. Avoids needing to repeatly update. Also updates AUTHORS.txt from current repo with contributor names
120 lines
4.0 KiB
C++
120 lines
4.0 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2016-2022 CERN
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* Copyright The KiCad Developers, see AUTHORS.txt for contributors.
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*
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* @author Maciej Suminski <maciej.suminski@cern.ch>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 3
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* https://www.gnu.org/licenses/gpl-3.0.html
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* or you may search the http://www.gnu.org website for the version 3 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#ifndef SPICE_CIRCUIT_MODEL_H
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#define SPICE_CIRCUIT_MODEL_H
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#include <netlist_exporters/netlist_exporter_spice.h>
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#include <vector>
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#include "sim_types.h"
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#include "spice_simulator.h"
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#include "spice_value.h"
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struct SPICE_DC_PARAMS
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{
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wxString m_source;
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SPICE_VALUE m_vstart;
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SPICE_VALUE m_vend;
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SPICE_VALUE m_vincrement;
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};
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struct SPICE_PZ_ANALYSES
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{
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bool m_Poles;
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bool m_Zeros;
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};
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/// Special netlist exporter flavor that allows one to override simulation commands
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class SPICE_CIRCUIT_MODEL : public NETLIST_EXPORTER_SPICE, public SIMULATION_MODEL
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{
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public:
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SPICE_CIRCUIT_MODEL( SCHEMATIC_IFACE* aSchematic ) :
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NETLIST_EXPORTER_SPICE( aSchematic )
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{}
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virtual ~SPICE_CIRCUIT_MODEL() {}
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/**
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* Return name of Spice dataset for a specific trace.
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*
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* @param aVector is name of the vector produced by ngspice
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* @param [out] aSignal is output in form: V(R1), Ib(Q2), I(L8)
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* @return [SPT_VOLTAGE, SPT_CURRENT]. Otherwise SPT_UNKNOWN if vector is of different,
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* unsupported type.
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*/
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SIM_TRACE_TYPE VectorToSignal( const std::string& aVector, wxString& aSignal ) const;
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bool GetNetlist( const wxString& aCommand, unsigned aOptions, OUTPUTFORMATTER* aFormatter,
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REPORTER& aReporter )
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{
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return SPICE_CIRCUIT_MODEL::DoWriteNetlist( aCommand, aOptions, *aFormatter, aReporter );
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}
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/**
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* Return simulation command directives placed in schematic sheets (if any).
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*/
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wxString GetSchTextSimCommand();
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/**
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* Parse a two-source .dc command directive into its symbols.
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*
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* @param aCmd is the input command string
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* @return true if the command was parsed successfully
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*/
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bool ParseDCCommand( const wxString& aCmd, SPICE_DC_PARAMS* aSource1,
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SPICE_DC_PARAMS* aSource2 );
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bool ParsePZCommand( const wxString& aCmd, wxString* transferFunction, wxString* input,
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wxString* inputRef, wxString* output, wxString* outputRef,
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SPICE_PZ_ANALYSES* analyses );
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bool ParseNoiseCommand( const wxString& aCmd, wxString* aOutput, wxString* aRef,
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wxString* aSource, wxString* aScale, SPICE_VALUE* aPts,
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SPICE_VALUE* aFStart, SPICE_VALUE* aFStop, bool* aSaveAll );
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/**
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* Determine if a directive is a simulation command.
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*/
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static bool IsSimCommand( const wxString& aCmd )
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{
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return CommandToSimType( aCmd ) != ST_UNKNOWN;
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}
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/**
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* Return simulation type basing on a simulation command directive.
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*/
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static SIM_TYPE CommandToSimType( const wxString& aCmd );
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protected:
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void WriteDirectives( const wxString& aSimCommand, unsigned aSimOptions,
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OUTPUTFORMATTER& aFormatter ) const override;
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};
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#endif /* SPICE_CIRCUIT_MODEL_H */
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