mirror of
https://gitlab.com/kicad/code/kicad.git
synced 2024-11-22 06:35:02 +00:00
ff044cd0cf
... but also makes DIALOG_SIM_COMMAND and SIMULATOR_REPORTER a bit more simulator-agnostic.
204 lines
6.4 KiB
C++
204 lines
6.4 KiB
C++
/*
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* This program source code file is part of KiCad, a free EDA CAD application.
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*
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* Copyright (C) 2020 S.Kocjan <s.kocjan@o2.pl>
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* Copyright (C) 2020 KiCad Developers, see AUTHORS.TXT for contributors.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, you may find one here:
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
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* or you may search the http://www.gnu.org website for the version 2 license,
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* or you may write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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/**
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* @file
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* Test suite for SPICE_CIRCUIT_MODEL
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*/
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#include <string.h>
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#include <qa_utils/wx_utils/unit_test_utils.h>
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#include <vector>
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#include <wx/string.h>
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// Code under test
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#include <project.h>
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#include <schematic.h>
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#include <settings/settings_manager.h>
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#include <sim/spice_circuit_model.h>
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class TEST_NGSPICE_HELPERS
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{
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public:
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TEST_NGSPICE_HELPERS() :
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m_manager( true ),
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m_schematic( nullptr ),
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m_exporter( &m_schematic )
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{
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m_manager.LoadProject( "" );
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m_schematic.SetProject( &m_manager.Prj() );
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}
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virtual ~TEST_NGSPICE_HELPERS()
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{
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m_schematic.Reset();
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}
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SETTINGS_MANAGER m_manager;
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SCHEMATIC m_schematic;
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SPICE_CIRCUIT_MODEL m_exporter;
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};
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/**
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* Declare the test suite
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*/
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BOOST_FIXTURE_TEST_SUITE( NgspiceCircuitModel, TEST_NGSPICE_HELPERS )
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/**
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* Check if simulation command is recognised properly
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*/
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BOOST_AUTO_TEST_CASE( CommandToSimType )
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{
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struct TEST_DATA
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{
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wxString command;
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SIM_TYPE type;
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};
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std::vector<struct TEST_DATA> testData = {
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{ ".op", ST_OP },
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{ ".option TEMP=27", ST_UNKNOWN },
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{ ".tran 0 1 0.1", ST_TRAN },
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{ ".tran 0 1 0.1 UIC", ST_TRAN },
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{ ".ac dec 10 1 10K", ST_AC },
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{ ".ac dec 10 1K 100MEG", ST_AC },
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{ ".ac lin 100 1 100HZ", ST_AC },
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{ ".dc VIN 0.25 5.0 0.25", ST_DC },
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{ ".dc VDS 0 10 .5 VGS 0 5 1", ST_DC },
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{ ".dc VCE 0 10 .25 IB 0 10u 1u", ST_DC },
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{ ".dc RLoad 1k 2k 100", ST_DC },
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{ ".dc TEMP -15 75 5", ST_DC },
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{ ".disto dec 10 1kHz 100MEG", ST_DISTO },
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{ ".disto dec 10 1kHz 100MEG 0.9", ST_DISTO },
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{ ".noise v(5) VIN dec 10 1kHz 100MEG", ST_NOISE },
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{ ".noise v(5,3) V1 oct 8 1.0 1.0e6 1", ST_NOISE },
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{ ".pz 1 0 3 0 cur pol", ST_PZ },
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{ ".pz 2 3 5 0 vol zer", ST_PZ },
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{ ".pz 4 1 4 1 cur pz", ST_PZ },
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{ ".SENS V(1,OUT)", ST_SENS },
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{ ".SENS V(OUT) AC DEC 10 100 100k", ST_SENS },
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{ ".SENS I(VTEST)", ST_SENS },
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{ ".tf v(5, 3) VIN", ST_TF },
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{ ".tf i(VLOAD) VIN", ST_TF },
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};
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for( auto& step : testData )
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{
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SIM_TYPE result = SPICE_CIRCUIT_MODEL::CommandToSimType( step.command );
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BOOST_CHECK_EQUAL( result, step.type );
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}
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for( auto& step : testData )
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{
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step.command.Append( "\n" );
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SIM_TYPE result = SPICE_CIRCUIT_MODEL::CommandToSimType( step.command );
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BOOST_CHECK_EQUAL( result, step.type );
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}
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}
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/**
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* Check conversion from internal spice vector name to eeschema format
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*/
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BOOST_AUTO_TEST_CASE( VectorToSignal )
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{
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struct TEST_DATA
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{
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std::string vector;
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wxString signal;
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SIM_TRACE_TYPE type;
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};
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std::vector<struct TEST_DATA> testData = {
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{ "@c3[i]", "I(C3)", SPT_CURRENT },
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{ "@r12[i]", "I(R12)", SPT_CURRENT },
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{ "@r7[i]", "I(R7)", SPT_CURRENT },
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{ "@l2[i]", "I(L2)", SPT_CURRENT },
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{ "@c2[i]", "I(C2)", SPT_CURRENT },
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{ "@r6[i]", "I(R6)", SPT_CURRENT },
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{ "@r5[i]", "I(R5)", SPT_CURRENT },
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{ "@r10[i]", "I(R10)", SPT_CURRENT },
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{ "@q3[ie]", "Ie(Q3)", SPT_CURRENT },
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{ "@q3[ic]", "Ic(Q3)", SPT_CURRENT },
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{ "@q3[ib]", "Ib(Q3)", SPT_CURRENT },
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{ "@r11[i]", "I(R11)", SPT_CURRENT },
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{ "@r8[i]", "I(R8)", SPT_CURRENT },
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{ "@q1[ie]", "Ie(Q1)", SPT_CURRENT },
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{ "@q1[ic]", "Ic(Q1)", SPT_CURRENT },
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{ "@q1[ib]", "Ib(Q1)", SPT_CURRENT },
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{ "@r1[i]", "I(R1)", SPT_CURRENT },
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{ "@l1[i]", "I(L1)", SPT_CURRENT },
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{ "@c4[i]", "I(C4)", SPT_CURRENT },
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{ "@r2[i]", "I(R2)", SPT_CURRENT },
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{ "@q2[ig]", "Ig(Q2)", SPT_CURRENT },
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{ "@q2[id]", "Id(Q2)", SPT_CURRENT },
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{ "@q2[is]", "Is(Q2)", SPT_CURRENT },
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{ "@v2[i]", "I(V2)", SPT_CURRENT },
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{ "@r9[i]", "I(R9)", SPT_CURRENT },
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{ "@c1[i]", "I(C1)", SPT_CURRENT },
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{ "@v1[i]", "I(V1)", SPT_CURRENT },
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{ "@r3[i]", "I(R3)", SPT_CURRENT },
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{ "@r4[i]", "I(R4)", SPT_CURRENT },
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{ "vout", "V(vout)", SPT_VOLTAGE },
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{ "net-_q3-pad2_", "V(net-_q3-pad2_)", SPT_VOLTAGE },
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{ "net-_q2-pad3_", "V(net-_q2-pad3_)", SPT_VOLTAGE },
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{ "net-_q2-pad1_", "V(net-_q2-pad1_)", SPT_VOLTAGE },
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{ "net-_q1-pad3_", "V(net-_q1-pad3_)", SPT_VOLTAGE },
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{ "net-_l2-pad1_", "V(net-_l2-pad1_)", SPT_VOLTAGE },
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{ "net-_c4-pad2_", "V(net-_c4-pad2_)", SPT_VOLTAGE },
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{ "net-_c3-pad1_", "V(net-_c3-pad1_)", SPT_VOLTAGE },
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{ "net-_c1-pad2_", "V(net-_c1-pad2_)", SPT_VOLTAGE },
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{ "/vin", "V(/vin)", SPT_VOLTAGE },
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{ "/vbase", "V(/vbase)", SPT_VOLTAGE },
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{ "+12v", "V(+12v)", SPT_VOLTAGE },
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{ "@m1[cgs]", "", SPT_UNKNOWN },
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{ "@d1[g11]", "", SPT_UNKNOWN },
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{ "@d1[c12]", "", SPT_UNKNOWN },
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{ "@d1[y21]", "", SPT_UNKNOWN },
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{ "@n1[vth0]", "", SPT_UNKNOWN },
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{ "@mn1[gm]", "", SPT_UNKNOWN },
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{ "@m.xmos1.xmos2.m1[vdsat]", "", SPT_UNKNOWN }
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};
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for( auto& step : testData )
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{
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wxString outputSignalName;
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SIM_TRACE_TYPE retVal;
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retVal = m_exporter.VectorToSignal( step.vector, outputSignalName );
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BOOST_CHECK_EQUAL( retVal, step.type );
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BOOST_CHECK_EQUAL( outputSignalName.Cmp( step.signal ), 0 );
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}
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}
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BOOST_AUTO_TEST_SUITE_END()
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