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oresat-star-tracker-hardware/utils/AR0130REV1.ini
rew 1ad368f8a1 added AR0130 ini file
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; WIP Last Changed Rev: 14459
;**************************************************************************************
; Copyright 2013 ON Semiconductor. All rights reserved.
;
;
; No permission to use, copy, modify, or distribute this software and/or
; its documentation for any purpose has been granted by ON Semiconductor.
; If any such permission has been granted ( by separate agreement ), it
; is required that the above copyright notice appear in all copies and
; that both that copyright notice and this permission notice appear in
; supporting documentation, and that the name of ON Semiconductor or any
; of its trademarks may not be used in advertising or publicity pertaining
; to distribution of the software without specific, written prior permission.
;
;
; This software and any associated documentation are provided "AS IS" and
; without warranty of any kind. ON Semiconductor EXPRESSLY DISCLAIMS
; ALL WARRANTIES EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO, NONINFRINGEMENT
; OF THIRD PARTY RIGHTS, AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
; FOR A PARTICULAR PURPOSE. ON Semiconductor DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED
; IN THIS SOFTWARE WILL MEET YOUR REQUIREMENTS, OR THAT THE OPERATION OF THIS SOFTWARE
; WILL BE UNINTERRUPTED OR ERROR-FREE. FURTHERMORE, ON Semiconductor DOES NOT WARRANT OR
; MAKE ANY REPRESENTATIONS REGARDING THE USE OR THE RESULTS OF THE USE OF ANY
; ACCOMPANYING DOCUMENTATION IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY,
; OR OTHERWISE.
;*************************************************************************************/
; Default INI file for AR0130 Rev1 (Chip ID 0x2402)
;
; $Revision: 51462 $
; $Date: 2018-10-12 08:39:29 -0700 (Fri, 12 Oct 2018) $
;
; This file holds groups of register presets (sections) specific for this sensor. The
; presets allow you to overwrite the power-on default settings with optimized register
; settings.
; The [Demo Initialization] section contains all optimized register settings for running
; the sensor in the demo environment. Other sections include settings optimized for a
; variety of situations like: Running at different master clock speeds, running under
; different lighting situations, running with different lenses, etc.
; Most of the demonstration software (DevWare, SensorDemo, ...) make use of this file
; to load and store the user presets.
;
; Keyname description:
; REG = assign a new register value
; BITFIELD = do a READ-MODIFY-WRITE to part of a register. The part is defined as a mask.
; FIELD_WR = Write any register, variable or bitfield, specified by its symbol name
; LOAD = load an alternate section from this section
; STATE = set non-register state
; DELAY = delay a certain amount of milliseconds before continuing
; POLL_REG = Read a register a specified number of times, or until the register
; value no longer meets a specified condition. You specify the
; register by its address, and it only works with simple registers.
; You also specify a delay between each iteration of the loop.
; POLL_FIELD = Like POLL_REG except you specify the register by its symbol name
; as defined in the sensor data file. POLL_FIELD works with any kind
; of register or variable.
;
; Keyname format:
; REG = [<page>,] <address>, <value> //<comment>
; BITFIELD = [<page>,] <address>, <mask>, <value>
; Some examples:
; BITFIELD=2, 0x05, 0x0020, 1 //for register 5 on page 2, set the 6th bit to 1
; BITFIELD=0x06, 0x000F, 0 //for register 6, clear the first 4 bits
; FIELD_WR = <registername>, [<bitfieldname>,] <value>
; LOAD = <section>
; STATE = <state>, <value>
; DELAY = <milliseconds>
; POLL_REG = [<page>,]<address>,<mask>,<condition>,DELAY=<milliseconds>,TIMEOUT=<count> //<comment>
; Example: Poll every 50ms, stop when value <= 8 or after 5 times (250ms).
; POLL_REG= 2, 0x3F, 0xFFFF, >8, DELAY=50, TIMEOUT=5
; POLL_FIELD = <registername>, [<bitfieldname>,] <condition>, DELAY=<milliseconds>, TIMEOUT=<count> //<comment>
; Example: Poll every 10 ms, stop when the value = 0, or after 500ms.
; POLL_FIELD= SEQ_CMD, !=0, DELAY=10, TIMEOUT=50
;
; <page> Optional address space for this register. Some sensors (mostly SOC's)
; have multiple register pages (see the sensor spec or developer's guide)
; <address> the register address
; <value> the new value to assign to the register
; <mask> is the part of a register value that needs to be updated with a new value
; <registername> Name of a register or variable as defined the sensor data (.sdat) file
; <bitfieldname> Optional name of a bitfield
; <condition> < <= == != > or >= followed by a numerical value
; <count> Number of iterations of the polling loop
; <section> the name of another section to load
; <state> non-register program state names [do not modify]
; <milliseconds> wait for this ammount of milliseconds before continuing
; <comment> Some form of C-style comments are supported in this .ini file
;
;*************************************************************************************/
[============= Demo Presets =============]
[Reset]
STATE= Sensor Reset, 1
DELAY= 200
STATE= Sensor Reset, 0
FIELD_WR= RESET_REGISTER, 1
FIELD_WR= RESET_REGISTER, 0x10D8 //Register RESET_REGISTER
[Demo Initialization]
Load = Color Demo Initialization
// Load = Mono Demo Initialization
[Mono Demo Initialization]
Load = Linear Mode Full Resolution DCDS
[Linear Mode Full Resolution DCDS]
LOAD = Reset
DELAY= 100
LOAD= Linear Mode Setup DCDS
LOAD = Full Resolution 45FPS Setup
IF_SERIAL=0xCC, 0x13, 0xF0, 8:16, ==0x0C, LOAD= Enable Serial HiSpi Mode ,ELSELOAD = Enable Parallel Mode //detect HSSAB board
STATE= Defect Enable, 1
STATE= Detect Master Clock, 1
STATE=True Black Enable, 1
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
[Color Demo Initialization]
Load = Linear Mode Full Resolution
LOAD = Color Settings For DevWare
[Linear Mode Full Resolution]
LOAD = Reset
DELAY= 100
LOAD= Linear Mode Setup
LOAD = Full Resolution 45FPS Setup
IF_SERIAL=0xCC, 0x13, 0xF0, 8:16, ==0x0C, LOAD= Enable Serial HiSpi Mode ,ELSELOAD = Enable Parallel Mode //detect HSSAB board
STATE= Defect Enable, 1
STATE= Detect Master Clock, 1
STATE=True Black Enable, 1
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
[Color Settings For DevWare]
LOAD = Enable AE and Load Optimized Settings For Linear Mode
STATE = Color Correction, 1
[]
[=== Basic Operating Modes ===]
[Full Resolution 45fps Setup]
FIELD_WR=DIGITAL_BINNING, 0x0000
FIELD_WR=Y_ADDR_START, 2
FIELD_WR=X_ADDR_START, 0
FIELD_WR=Y_ADDR_END, 0x03C1
FIELD_WR=X_ADDR_END, 0x04FF
FIELD_WR=FRAME_LENGTH_LINES, 0x03DE //1284x968
FIELD_WR=LINE_LENGTH_PCK, 0x0672
[720p 60fps Setup]
FIELD_WR=DIGITAL_BINNING, 0x0000
FIELD_WR=Y_ADDR_START, 2
FIELD_WR=X_ADDR_START, 0
FIELD_WR=Y_ADDR_END, 0x02D1
FIELD_WR=X_ADDR_END, 0x04FF
FIELD_WR=FRAME_LENGTH_LINES, 0x02EF
FIELD_WR=LINE_LENGTH_PCK, 0x0672
[640x480 2x2 Binned Mode]
LOAD=Full Resolution 45FPS Setup
FIELD_WR=DIGITAL_BINNING, 0x0002
FIELD_WR=DATAPATH_SELECT, 0x9010
[640x360 2x2 Binned Mode]
LOAD=720p 60FPS Setup
FIELD_WR=DIGITAL_BINNING, 0x0002
FIELD_WR=DATAPATH_SELECT, 0x9010
[Disable Binning]
FIELD_WR=DIGITAL_BINNING, 0x0000
[]
[===Controls===]
[Columncorrection enable]
FIELD_WR=RESET_REGISTER, STREAM, 0x0000
DELAY=100
FIELD_WR=COLUMN_CORRECTION, ENABLE, 0x0001 // BITFIELD= 0x30D4, 0x8000, 0x0001
DELAY=100
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
[Columncorrection disable]
FIELD_WR=RESET_REGISTER, STREAM, 0x0000
DELAY=100
FIELD_WR=COLUMN_CORRECTION, ENABLE, 0x0000 // BITFIELD= 0x30D4, 0x8000, 0x0000
DELAY=100
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
//Always retrigger column correction when switching between AGS on/off
//if AGS = on, then retrigger with column gain= 8x
//if AGS = off, then retrigger with column gain= 1x
[Column Correction ReTriggering]
FIELD_WR=RESET_REGISTER, STREAM, 0x0000 //Disable Streaming
FIELD_WR=COLUMN_CORRECTION, ENABLE, 0x0000 //Disable column correction
DELAY=100
FIELD_WR=RESET_REGISTER, STREAM, 0x0001 //Enable Streaming
DELAY=1000
FIELD_WR=RESET_REGISTER, STREAM, 0x0000 //Disable Streaming
FIELD_WR=COLUMN_CORRECTION, ENABLE, 0x0001 //Enable column correction
DELAY=100
FIELD_WR=RESET_REGISTER, STREAM, 0x0001 //Enable Streaming
[]
[Enable Embedded Data and Stats]
FIELD_WR=EMBEDDED_DATA_CTRL, EMBEDDED_STATS_EN, 0x0001
FIELD_WR=EMBEDDED_DATA_CTRL, EMBEDDED_DATA, 0x0001
[Disable Embedded Data and Stats]
FIELD_WR=EMBEDDED_DATA_CTRL, EMBEDDED_STATS_EN, 0x0000
FIELD_WR=EMBEDDED_DATA_CTRL, EMBEDDED_DATA, 0x0000
[]
[Enable AGS 8x Gain]
FIELD_WR=RESET_REGISTER, STREAM, 0x0000 // RESET_REGISTER: Disable Streaming
REG= 0x30D4, 0x4007 // COLUMN_CORRECTION: Disable Column Correction
REG= 0x3EE0, 0x047C // RESERVED
REG= 0x30B0, 0x1370 // digital_test
//DELAY=500
//REG= 0x30D4, 0xC007 // COLUMN_CORRECTION: Enable Column Correction
LOAD = Column Correction ReTriggering
FIELD_WR=RESET_REGISTER, STREAM, 0x0001 // RESET_REGISTER: Enable Streaming
[Disable AGS]
FIELD_WR=RESET_REGISTER, STREAM, 0x0000 // RESET_REGISTER: Disable Streaming
REG= 0x30D4, 0x4007 // COLUMN_CORRECTION: Disable Column Correction
REG= 0x3EE0, 0x047D // RESERVED
REG= 0x30B0, 0x1300 // digital_test
//DELAY=500
//REG= 0x30D4, 0xC007 // COLUMN_CORRECTION: Enable Column Correction
LOAD = Column Correction ReTriggering
FIELD_WR=RESET_REGISTER, STREAM, 0x0001 // RESET_REGISTER: Enable Streaming
[]
[=== Parallel/Serial Control ===]
[Enable Serial HiSpi Mode]
REG = 0x301A, 0x0058 //Disable Streaming and setup serial
Load= PLL Enabled 27Mhz to 74.25Mhz for HiSPi 12-bit 2 lane timing
REG = 0x31D0, 0x1 // Set to 12 bits
REG = 0x31C6, 0x8000 // 2 lane serial output
Load= Enable Embedded Data and Stats
FIELD_WR=RESET_REGISTER, STREAM, 0x0001 // Enable Streaming
[Enable Serial HiSpi Mode 12 bits 2 Lanes Stats Off]
REG = 0x301A, 0x0058 //Disable Streaming and setup serial
Load= PLL Enabled 27Mhz to 74.25Mhz for HiSPi 12-bit 2 lane timing
FIELD_WR= DATAPATH_SELECT, 0x9010 // Low Vcm REG= 0x306E, 0x9010
REG = 0x31D0, 0x1 // Set to 12 bits
REG = 0x31C6, 0x8000 // 2 lane serial output
Load= Disable Embedded Data and Stats
IF_SERIAL=0xCC, 0x13, 0xFF, 8:16, ==0xCD, LOAD=HSSAB_Placeholder,ELSELOAD=12bit 2Lane
FIELD_WR=RESET_REGISTER, STREAM, 0x0001 // Enable Streaming
[HIDDEN: HSSAB_Placeholder]
// Workaround for issue with IF_SERIAL; if the device isn't present, a statement
// with only a "LOAD=" (and not an "ELSELOAD") won't actually do the "LOAD=".
[Enable Parallel Mode]
REG = 0x301A, 0x10D8 //Disable Streaming and setup parallel
REG = 0x31D0, 0x1 // Set to 12 bits
Load = PLL Enabled 27Mhz to 74.25Mhz
FIELD_WR=RESET_REGISTER, STREAM, 0x0001 // Enable Streaming
[]
[=== Context Control ===]
[Context A]
FIELD_WR=DIGITAL_TEST, CONTEXT_B, 0x0000
[Context B]
FIELD_WR=DIGITAL_TEST, CONTEXT_B, 0x0001
[]
[=== PLL Controls ===]
[PLL Enabled 27Mhz to 74.25Mhz]
FIELD_WR=VT_SYS_CLK_DIV, 0x0002
FIELD_WR=VT_PIX_CLK_DIV, 0x0004
FIELD_WR=PRE_PLL_CLK_DIV, 0x0002
FIELD_WR=PLL_MULTIPLIER, 0x002C
FIELD_WR=DIGITAL_TEST, PLL_COMPLETE_BYPASS, 0x0000
DELAY=100
[PLL Enabled 27Mhz to 74.25Mhz for HiSPi 12-bit 2 lane timing]
FIELD_WR=VT_SYS_CLK_DIV, 0x0001
FIELD_WR=VT_PIX_CLK_DIV, 0x0006
FIELD_WR=PRE_PLL_CLK_DIV, 0x0002
FIELD_WR=PLL_MULTIPLIER, 0x0021
FIELD_WR=DIGITAL_TEST, PLL_COMPLETE_BYPASS, 0x0000
DELAY=100
[PLL_bypassed]
FIELD_WR=RESET_REGISTER, STREAM, 0x0000
BITFIELD= 0x30B0, 0x4000, 0x0001 // digital_test
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
[]
[=== Gain Control ===]
[High Conversion gain]
FIELD_WR=AE_CTRL_REG, DCG_MANUAL_SET, 0x0001 // enable high conversion gain
BITFIELD= 0x3ED8, 0x8000, 0x0 // RESERVED
BITFIELD= 0x3ED8, 0x7000, 0x0 // RESERVED
BITFIELD= 0x3EDE, 0x0002, 0x0 // RESERVED
[Low Conversion gain]
FIELD_WR=AE_CTRL_REG, DCG_MANUAL_SET, 0x0000 // disable high conversion gain
BITFIELD= 0x3EDE, 0x0002, 0x0 // RESERVED
BITFIELD= 0x3ED8, 0x8000, 0x0 // RESERVED
BITFIELD= 0x3ED8, 0x7000, 0x0 // RESERVED
[1x Column Gain]
FIELD_WR=DIGITAL_TEST, COL_GAIN, 0x0000
[2x Column Gain]
FIELD_WR=DIGITAL_TEST, COL_GAIN, 0x0001
[4x Column Gain]
FIELD_WR=DIGITAL_TEST, COL_GAIN, 0x0002
[8x Column Gain]
FIELD_WR=DIGITAL_TEST, COL_GAIN, 0x0003
[]
[=== Auto Exposure ===]
[Enable AE and Load Optimized Settings For Linear Mode]
Load= Enable Embedded Data and Stats
REG=0x3100, 0x001B // AE_CTRL_REG
REG=0x3112, 0x029F // AE_DCG_EXPOSURE_HIGH_REG
REG=0x3114, 0x008C // AE_DCG_EXPOSURE_LOW_REG
REG=0x3116, 0x02C0 // AE_DCG_GAIN_FACTOR_REG
REG=0x3118, 0x005B // AE_DCG_GAIN_FACTOR_INV_REG
REG=0x3102, 0x0384 // AE_LUMA_TARGET_REG
REG=0x3104, 0x1000 // AE_HIST_TARGET_REG
REG=0x3126, 0x0080 // AE_ALPHA_V1_REG
REG=0x311C, 0x03DD // AE_MAX_EXPOSURE_REG
REG=0x311E, 0x0002 // AE_MIN_EXPOSURE_REG
[Disable_AutoExposure]
FIELD_WR=RESET_REGISTER, STREAM, 0x0000
REG=0x3100, 0x001A // AE_CTRL_REG
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
[]
[=== ToolBars ===]
[Toolbar: Linear Mode]
ICON= green square, CHECKED=OPERATION_MODE_CTRL:OPERATION_MODE == 1
TOOLTIP="Linear Mode"
LOAD=Linear Mode Full Resolution
[Toolbar: Image format]
ICON=icons\fullres-24.ico
TOOLTIP="Choose Image Format"
MENUITEM="Full Resolution", LOAD=Full Resolution 45FPS Setup
MENUITEM="720p", LOAD=720p 60FPS Setup
MENUITEM="VGA Binned", LOAD=640x480 2x2 Binned Mode
MENUITEM="640x360 Binned", LOAD=640x360 2x2 Binned Mode
[Toolbar: Automatic Gain Selection]
ICON=icons\backlight-24.ico, CHECKED=DIGITAL_TEST:AGS_ENABLE==1
TOOLTIP="Toggle between Context A and B"
MENUITEM="Enable AGS", LOAD=Enable AGS 8x Gain
MENUITEM="Disable AGS", LOAD=Disable AGS
[Toolbar: Dual Conversion Gain]
ICON=icons\replace2.ico, CHECKED=AE_CTRL_REG:DCG_MANUAL_SET==1
TOOLTIP="Toggle between High and Low Conversion Gain"
MENUITEM="High Conversion Gain", LOAD=High Conversion gain
MENUITEM="Low Conversion Gain", LOAD=Low Conversion gain
[Toolbar: Column Gain]
ICON=red circle
TOOLTIP="Set Analog Column Gain"
MENUITEM="1x", LOAD=1x Column Gain
MENUITEM="2x", LOAD=2x Column Gain
MENUITEM="4x", LOAD=4x Column Gain
MENUITEM="8x", LOAD=8x Column Gain
[Toolbar: Auto Exposure]
ICON=icons\pref-color-repro-24.ico, CHECKED=AE_CTRL_REG:AE_ENABLE==1
TOOLTIP="Choose Auto Exposure Mode"
MENUITEM="Enable AE for Linear Mode", LOAD=Enable AE and Load Optimized Settings For Linear Mode
MENUITEM="Disable AE", LOAD=Disable_AutoExposure
[Toolbar: Embedded Data]
ICON=icons\oszillograph.ico, CHECKED=EMBEDDED_DATA_CTRL:EMBEDDED_DATA==1
TOOLTIP="Toggle Embedded Data/Stats"
MENUITEM="Enable Embedded Data/Stats", LOAD=Enable Embedded Data and Stats
MENUITEM="Disable Embedded Data/Stats", LOAD=Disable Embedded Data and Stats
[Toolbar: Toggle Context]
ICON=red square, CHECKED=DIGITAL_TEST:CONTEXT_B == 0
TOOLTIP="Switch Between Context A and B"
MENUITEM="Context A", LOAD=Context A
MENUITEM="Context B", LOAD=Context B
[Toolbar: Reset CRC]
TOOLTIP="Reset the I2C write checksum"
REG= 0x31D6, 0x01
[]
[==== Configuration presets (DO NOT CHANGE) ====]
[AR0130 Rev1 Optimized settings 3-8-2013]
//
REG= 0x301E, 0x00C8
REG= 0x3EDA, 0x0F03
REG= 0x3EDE, 0xC005
REG= 0x3ED8, 0x09EF
REG= 0x3EE2, 0xA46B
REG= 0x3EE0, 0x047D
REG= 0x3EDC, 0x0070
REG= 0x3044, 0x0404
REG= 0x3EE6, 0x4303
REG= 0x3EE4, 0xD208
REG= 0x3ED6, 0x00BD
REG= 0x30B0, 0x1300
REG= 0x30D4, 0xE007
[AR0130 Rev1 Optimized settings 8-2-2011]
//
REG= 0x301E, 0x00C8
REG= 0x3EDA, 0x0F03
REG= 0x3EDE, 0xC005
REG= 0x3ED8, 0x09EF
REG= 0x3EE2, 0xA46B
REG= 0x3EE0, 0x067D
REG= 0x3EDC, 0x0080
REG= 0x3044, 0x0404
//REG= 0x3EE6, 0x8303
REG= 0x3EE4, 0xD208
REG= 0x3ED6, 0x00BD
REG= 0x30B0, 0x1300
REG= 0x30D4, 0xE007
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
DELAY=500
FIELD_WR=RESET_REGISTER, STREAM, 0x0000
DELAY=500
//REG= 0x3044, 0x0400
;REG= 0x30BA, 0x0000
[AR0130 Rev1 CFPN Improvment 11-27-2012]
REG= 0x3EE6, 0x4303 // RESERVED
[AR0130 Rev1 Optimized settings DCDS 5-7-2013]
//
REG= 0x301E, 0x00C8
REG= 0x3EDA, 0x0F03
REG= 0x3EDE, 0xC005
REG= 0x3ED8, 0x09EF
REG= 0x3EE2, 0xA46B
REG= 0x3EE0, 0x057D
REG= 0x3EDC, 0x0080
REG= 0x3044, 0x0404
REG= 0x3EE6, 0x4303
REG= 0x3EE4, 0xD208
REG= 0x3ED6, 0x00BD
REG= 0x30B0, 0x1300
REG= 0x30BA, 0x0018
REG= 0x30D4, 0xE007
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
DELAY=500
FIELD_WR=RESET_REGISTER, STREAM, 0x0000
DELAY=500
[AR0130 Rev1 CFPN Improvment 10-30-2012]
REG= 0x3EE6, 0x4303 // RESERVED
//
[AR0130 Rev1 DCDS sequencer load 5-07-2013 300 pixclks]
REG=0x3088, 0x8000
REG=0x3086, 0x0225
REG=0x3086, 0x5050
REG=0x3086, 0x2D26
REG=0x3086, 0x0828
REG=0x3086, 0x0D17
REG=0x3086, 0x0926
REG=0x3086, 0x0028
REG=0x3086, 0x0526
REG=0x3086, 0xA728
REG=0x3086, 0x0725
REG=0x3086, 0x8080
REG=0x3086, 0x2917
REG=0x3086, 0x0525
REG=0x3086, 0x0040
REG=0x3086, 0x2702
REG=0x3086, 0x1616
REG=0x3086, 0x2706
REG=0x3086, 0x2117
REG=0x3086, 0x3626
REG=0x3086, 0xA717
REG=0x3086, 0x0326
REG=0x3086, 0xA717
REG=0x3086, 0x1F28
REG=0x3086, 0x051A
REG=0x3086, 0x174A
REG=0x3086, 0x26E7
REG=0x3086, 0x175A
REG=0x3086, 0x26E6
REG=0x3086, 0x1703
REG=0x3086, 0x26E4
REG=0x3086, 0x174B
REG=0x3086, 0x2700
REG=0x3086, 0x1710
REG=0x3086, 0x1D17
REG=0x3086, 0xFF17
REG=0x3086, 0x2026
REG=0x3086, 0x6017
REG=0x3086, 0x0125
REG=0x3086, 0x2020
REG=0x3086, 0x1721
REG=0x3086, 0x2500
REG=0x3086, 0x2021
REG=0x3086, 0x1710
REG=0x3086, 0x2805
REG=0x3086, 0x1B17
REG=0x3086, 0x0327
REG=0x3086, 0x0617
REG=0x3086, 0x0317
REG=0x3086, 0x4126
REG=0x3086, 0x6017
REG=0x3086, 0xAE25
REG=0x3086, 0x0090
REG=0x3086, 0x2700
REG=0x3086, 0x2618
REG=0x3086, 0x2800
REG=0x3086, 0x2E2A
REG=0x3086, 0x2808
REG=0x3086, 0x1E08
REG=0x3086, 0x3114
REG=0x3086, 0x4040
REG=0x3086, 0x1420
REG=0x3086, 0x2014
REG=0x3086, 0x1010
REG=0x3086, 0x3414
REG=0x3086, 0x0010
REG=0x3086, 0x1400
REG=0x3086, 0x2014
REG=0x3086, 0x0040
REG=0x3086, 0x1318
REG=0x3086, 0x0214
REG=0x3086, 0x7070
REG=0x3086, 0x0414
REG=0x3086, 0x7070
REG=0x3086, 0x0314
REG=0x3086, 0x7070
REG=0x3086, 0x1720
REG=0x3086, 0x0214
REG=0x3086, 0x0020
REG=0x3086, 0x0214
REG=0x3086, 0x0050
REG=0x3086, 0x0414
REG=0x3086, 0x0020
REG=0x3086, 0x0414
REG=0x3086, 0x0050
REG=0x3086, 0x2203
REG=0x3086, 0x1400
REG=0x3086, 0x2003
REG=0x3086, 0x1400
REG=0x3086, 0x502C
REG=0x3086, 0x2C2C
REG=0x309E, 0x0000 // RESERVED
REG=0x30E4, 0x6372 // RESERVED
REG=0x30E2, 0x7253 // RESERVED
REG=0x30E0, 0x5470 // RESERVED
REG=0x30E6, 0xC4CC // RESERVED
REG=0x30e8, 0x8050 // RESERVED
[AR0130 Rev1 Linear sequencer load 8-2-2011]
REG=0x3088, 0x8000
REG=0x3086, 0x225
REG=0x3086, 0x5050
REG=0x3086, 0x2D26
REG=0x3086, 0x828
REG=0x3086, 0xD17
REG=0x3086, 0x926
REG=0x3086, 0x28
REG=0x3086, 0x526
REG=0x3086, 0xA728
REG=0x3086, 0x725
REG=0x3086, 0x8080
REG=0x3086, 0x2917
REG=0x3086, 0x525
REG=0x3086, 0x40
REG=0x3086, 0x2702
REG=0x3086, 0x1616
REG=0x3086, 0x2706
REG=0x3086, 0x1736
REG=0x3086, 0x26A6
REG=0x3086, 0x1703
REG=0x3086, 0x26A4
REG=0x3086, 0x171F
REG=0x3086, 0x2805
REG=0x3086, 0x2620
REG=0x3086, 0x2804
REG=0x3086, 0x2520
REG=0x3086, 0x2027
REG=0x3086, 0x17
REG=0x3086, 0x1E25
REG=0x3086, 0x20
REG=0x3086, 0x2117
REG=0x3086, 0x1028
REG=0x3086, 0x51B
REG=0x3086, 0x1703
REG=0x3086, 0x2706
REG=0x3086, 0x1703
REG=0x3086, 0x1747
REG=0x3086, 0x2660
REG=0x3086, 0x17AE
REG=0x3086, 0x2500
REG=0x3086, 0x9027
REG=0x3086, 0x26
REG=0x3086, 0x1828
REG=0x3086, 0x2E
REG=0x3086, 0x2A28
REG=0x3086, 0x81E
REG=0x3086, 0x831
REG=0x3086, 0x1440
REG=0x3086, 0x4014
REG=0x3086, 0x2020
REG=0x3086, 0x1410
REG=0x3086, 0x1034
REG=0x3086, 0x1400
REG=0x3086, 0x1014
REG=0x3086, 0x20
REG=0x3086, 0x1400
REG=0x3086, 0x4013
REG=0x3086, 0x1802
REG=0x3086, 0x1470
REG=0x3086, 0x7004
REG=0x3086, 0x1470
REG=0x3086, 0x7003
REG=0x3086, 0x1470
REG=0x3086, 0x7017
REG=0x3086, 0x2002
REG=0x3086, 0x1400
REG=0x3086, 0x2002
REG=0x3086, 0x1400
REG=0x3086, 0x5004
REG=0x3086, 0x1400
REG=0x3086, 0x2004
REG=0x3086, 0x1400
REG=0x3086, 0x5022
REG=0x3086, 0x314
REG=0x3086, 0x20
REG=0x3086, 0x314
REG=0x3086, 0x50
REG=0x3086, 0x2C2C
REG=0x3086, 0x2C2C
REG=0x309E, 0x0000 // RESERVED
REG=0x30E4, 0x6372 // RESERVED
REG=0x30E2, 0x7253 // RESERVED
REG=0x30E0, 0x5470 // RESERVED
REG=0x30E6, 0xC4CC // RESERVED
REG=0x30e8, 0x8050 // RESERVED
[AR0130 Rev1 Linear sequencer load 4-27-2010]
REG=0x3088, 0x8000
REG=0x3086, 0x225
REG=0x3086, 0x5050
REG=0x3086, 0x2D26
REG=0x3086, 0x828
REG=0x3086, 0xD17
REG=0x3086, 0x926
REG=0x3086, 0x28
REG=0x3086, 0x526
REG=0x3086, 0xA728
REG=0x3086, 0x725
REG=0x3086, 0x8080
REG=0x3086, 0x2917
REG=0x3086, 0x525
REG=0x3086, 0x40
REG=0x3086, 0x2702
REG=0x3086, 0x1616
REG=0x3086, 0x2706
REG=0x3086, 0x1736
REG=0x3086, 0x26A6
REG=0x3086, 0x1703
REG=0x3086, 0x26A4
REG=0x3086, 0x171F
REG=0x3086, 0x2805
REG=0x3086, 0x2620
REG=0x3086, 0x2804
REG=0x3086, 0x2520
REG=0x3086, 0x2027
REG=0x3086, 0x17
REG=0x3086, 0x1E25
REG=0x3086, 0x20
REG=0x3086, 0x2117
REG=0x3086, 0x1028
REG=0x3086, 0x51B
REG=0x3086, 0x1703
REG=0x3086, 0x2706
REG=0x3086, 0x1703
REG=0x3086, 0x1741
REG=0x3086, 0x2660
REG=0x3086, 0x17AE
REG=0x3086, 0x2500
REG=0x3086, 0x9027
REG=0x3086, 0x26
REG=0x3086, 0x1828
REG=0x3086, 0x2E
REG=0x3086, 0x2A28
REG=0x3086, 0x81E
REG=0x3086, 0x831
REG=0x3086, 0x1440
REG=0x3086, 0x4014
REG=0x3086, 0x2020
REG=0x3086, 0x1410
REG=0x3086, 0x1034
REG=0x3086, 0x1400
REG=0x3086, 0x1014
REG=0x3086, 0x20
REG=0x3086, 0x1400
REG=0x3086, 0x4013
REG=0x3086, 0x1802
REG=0x3086, 0x1470
REG=0x3086, 0x7004
REG=0x3086, 0x1470
REG=0x3086, 0x7003
REG=0x3086, 0x1470
REG=0x3086, 0x7017
REG=0x3086, 0x2002
REG=0x3086, 0x1400
REG=0x3086, 0x2002
REG=0x3086, 0x1400
REG=0x3086, 0x5004
REG=0x3086, 0x1400
REG=0x3086, 0x2004
REG=0x3086, 0x1400
REG=0x3086, 0x5022
REG=0x3086, 0x314
REG=0x3086, 0x20
REG=0x3086, 0x314
REG=0x3086, 0x50
REG=0x3086, 0x2C2C
REG=0x3086, 0x2C2C
REG=0x309E, 0x0000 // RESERVED
REG=0x30E4, 0x6372 // RESERVED
REG=0x30E2, 0x7253 // RESERVED
REG=0x30E0, 0x5470 // RESERVED
REG=0x30E6, 0xC4CC // RESERVED
REG=0x30e8, 0x8050 // RESERVED
[AR0130 Rev1 Optimized settings Original]
REG= 0x30B0, 0x1300
REG= 0x30D4, 0xE007
FIELD_WR=RESET_REGISTER, STREAM, 0x0001
DELAY=500
FIELD_WR=RESET_REGISTER, STREAM, 0x0000
DELAY=500
REG= 0x3044, 0x0400
;REG= 0x30BA, 0x0000
REG= 0x3EDA, 0x0F03 // RESERVED
REG= 0x3ED8, 0x01EF // RESERVED
[Context B Initialize 1280x720]
FIELD_WR=X_ADDR_START_CB, 0x0000 // REG= 0x308A, 0x0000
FIELD_WR=Y_ADDR_START_CB, 0x0080 // REG= 0x308C, 0x0080
FIELD_WR=X_ADDR_END_CB, 0x04FF // REG= 0x308E, 0x04FF
FIELD_WR=Y_ADDR_END_CB, 0x034F // REG= 0x3090, 0x034F
FIELD_WR=FRAME_LENGTH_LINES_CB, 0x02EE // REG= 0x30AA, 0x02EE
FIELD_WR=DIGITAL_BINNING, 0x0000 // REG= 0x3032, 0x0000
FIELD_WR=DIGITAL_TEST, COL_GAIN_CB, 0x0001 // BITFIELD= 0x30B0, 0x0300, 0x0001
FIELD_WR=BLUE_GAIN_CB, 0x003F // REG= 0x30BE, 0x003F
FIELD_WR=COARSE_INTEGRATION_TIME_CB, 0x0032 // REG= 0x3016, 0x0032
FIELD_WR=DIGITAL_TEST, CONTEXT_B, 0x0001 // BITFIELD= 0x30B0, 0x2000, 0x0001
[Linear Mode Setup DCDS]
Load = AR0130 Rev1 DCDS sequencer load 5-07-2013 300 pixclks
DELAY=200
FIELD_WR=OPERATION_MODE_CTRL, 0x29 // Set Linear Mode register
Load = AR0130 Rev1 CFPN Improvment 10-30-2012
Load = AR0130 Rev1 Optimized settings DCDS 5-7-2013
REG=0x3012, 0x02A0
REG=0x30BA, 0x0018 // digital_ctrl
[Linear Mode Setup]
Load = AR0130 Rev1 Linear sequencer load 8-2-2011
DELAY=200
FIELD_WR=OPERATION_MODE_CTRL, 0x29 // Set Linear Mode register
Load = AR0130 Rev1 Optimized settings 3-8-2013
REG=0x3012, 0x02A0
[12bit 2Lane]
REG = 0x301A, 0x0058 //Disable Streaming and setup serial
REG = 0x3008, 0x04FF //x_addr_end_
REG = 0x31D0, 0x0001 //compand 12Bit
REG = 0x302A, 0x0006 //vt_pix_clk_div
REG = 0x302c, 0x0001 //vt_sys_clk_div
REG = 0x31C6, 0x8000 //hispi_control_status
REG = 0x301A, 0x005C // Enable Streaming
[14bit 2Lane]
REG = 0x301A, 0x0058 //Disable Streaming and setup serial
REG = 0x3008, 0x04FF //x_addr_end_
REG = 0x31D0, 0x0003 //compand 14Bit
REG = 0x302A, 0x0007 //vt_pix_clk_div
REG = 0x302c, 0x0001 //vt_sys_clk_div
REG = 0x31C6, 0x8000 //hispi_control_status
REG = 0x301A, 0x005C // Enable Streaming
[20bit 4Lane]
REG = 0x301A, 0x0058 //Disable Streaming and setup serial
REG = 0x3008, 0x04FF //x_addr_end_
REG = 0x31D0, 0x0000 //compand off
REG = 0x302A, 0x0005 //vt_pix_clk_div
REG = 0x302c, 0x0002 //vt_sys_clk_div
REG = 0x31C6, 0x8000 //hispi_control_status
REG = 0x301A, 0x005C // Enable Streaming
[12bit 3Lane]
REG = 0x301A, 0x0058 //Disable Streaming and setup serial
REG = 0x3008, 0x04FF //x_addr_end_
REG = 0x31D0, 0x0001 //compand 12Bit
REG = 0x302A, 0x0005 //vt_pix_clk_div
REG = 0x302C, 0x0002 //vt_sys_clk_div
REG = 0x31C6, 0x8008 //hispi_control_status
REG = 0x301A, 0x005C // Enable Streaming
[14bit 3Lane]
REG = 0x301A, 0x0058 //Disable Streaming and setup serial
REG = 0x3008, 0x04FF //x_addr_end_
REG = 0x31D0, 0x0003 //compand 14Bit
REG = 0x302A, 0x0005 //vt_pix_clk_div
REG = 0x302C, 0x0002 //vt_sys_clk_div
REG = 0x31C6, 0x8008 //hispi_control_status
REG = 0x301A, 0x005C // Enable Streaming
// Reserved for future usage
//[Toolbar: Pan Demo]
//ICON= icons\joystick.ico
//TOOLTIP= "Setup for joystick pan-tilt demo."
//LOAD= Pan-Tilt Demo Setup
[Hidden: Pan-Tilt Demo Setup]
FIELD_WR= RESET_REGISTER, 37084 // REG= 0x301A, 37084
FIELD_WR= X_ODD_INC, 1 // REG= 0x30A2, 1
FIELD_WR= Y_ODD_INC, 1 // REG= 0x30A6, 1
FIELD_WR= X_ADDR_START, 280 // REG= 0x3004, 280
FIELD_WR= Y_ADDR_START, 240 // REG= 0x3002, 240
FIELD_WR= X_ADDR_END, 999 // REG= 0x3008, 999
FIELD_WR= Y_ADDR_END, 719 // REG= 0x3006, 719
FIELD_WR= FRAME_LENGTH_LINES, 510 // REG= 0x300A, 510
FIELD_WR= DIGITAL_BINNING, 0 // REG= 0x3032, 0
FIELD_WR= RESET_REGISTER, 4316 // REG= 0x301A, 4316
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