From af1d6ec5971676506e45271e5f62c348abec15a6 Mon Sep 17 00:00:00 2001
From: Andreas Olofsson <andreas@adapteva.com>
Date: Sat, 7 Jan 2017 12:50:44 -0500
Subject: [PATCH] Reorg

---
 {meta => meta-module}/docs/meta_pinout.xlsx   |  Bin
 {meta => meta-module}/docs/meta_planning.xlsx |  Bin
 .../docs/parallella_meta_spec.odt             |  Bin
 .../docs/parallella_meta_spec.pdf             |  Bin
 {meta => meta-module}/docs/pc104_spec.pdf     |  Bin
 {meta => meta-module}/docs/snow16.png         |  Bin
 {meta => meta-module}/docs/snow16.svg         |    0
 {meta => meta-module}/docs/snow4.png          |  Bin
 {meta => meta-module}/docs/snow4.svg          |    0
 meta/docs/meta_arch.svg                       | 2385 -----------------
 meta/docs/meta_mechanical.svg                 | 1329 ---------
 parallella/README.md                          |   12 +-
 parallella/parallella_bom.xls                 |  Bin 32256 -> 0 bytes
 parallella/src/parallella_bom.xls             |  Bin 0 -> 29184 bytes
 parallella/{ => src}/parallella_layout.brd    |  Bin
 parallella/{ => src}/parallella_schematic.dsn |  Bin
 16 files changed, 6 insertions(+), 3720 deletions(-)
 rename {meta => meta-module}/docs/meta_pinout.xlsx (100%)
 rename {meta => meta-module}/docs/meta_planning.xlsx (100%)
 rename {meta => meta-module}/docs/parallella_meta_spec.odt (100%)
 rename {meta => meta-module}/docs/parallella_meta_spec.pdf (100%)
 rename {meta => meta-module}/docs/pc104_spec.pdf (100%)
 rename {meta => meta-module}/docs/snow16.png (100%)
 rename {meta => meta-module}/docs/snow16.svg (100%)
 rename {meta => meta-module}/docs/snow4.png (100%)
 rename {meta => meta-module}/docs/snow4.svg (100%)
 delete mode 100644 meta/docs/meta_arch.svg
 delete mode 100644 meta/docs/meta_mechanical.svg
 delete mode 100644 parallella/parallella_bom.xls
 create mode 100644 parallella/src/parallella_bom.xls
 rename parallella/{ => src}/parallella_layout.brd (100%)
 rename parallella/{ => src}/parallella_schematic.dsn (100%)

diff --git a/meta/docs/meta_pinout.xlsx b/meta-module/docs/meta_pinout.xlsx
similarity index 100%
rename from meta/docs/meta_pinout.xlsx
rename to meta-module/docs/meta_pinout.xlsx
diff --git a/meta/docs/meta_planning.xlsx b/meta-module/docs/meta_planning.xlsx
similarity index 100%
rename from meta/docs/meta_planning.xlsx
rename to meta-module/docs/meta_planning.xlsx
diff --git a/meta/docs/parallella_meta_spec.odt b/meta-module/docs/parallella_meta_spec.odt
similarity index 100%
rename from meta/docs/parallella_meta_spec.odt
rename to meta-module/docs/parallella_meta_spec.odt
diff --git a/meta/docs/parallella_meta_spec.pdf b/meta-module/docs/parallella_meta_spec.pdf
similarity index 100%
rename from meta/docs/parallella_meta_spec.pdf
rename to meta-module/docs/parallella_meta_spec.pdf
diff --git a/meta/docs/pc104_spec.pdf b/meta-module/docs/pc104_spec.pdf
similarity index 100%
rename from meta/docs/pc104_spec.pdf
rename to meta-module/docs/pc104_spec.pdf
diff --git a/meta/docs/snow16.png b/meta-module/docs/snow16.png
similarity index 100%
rename from meta/docs/snow16.png
rename to meta-module/docs/snow16.png
diff --git a/meta/docs/snow16.svg b/meta-module/docs/snow16.svg
similarity index 100%
rename from meta/docs/snow16.svg
rename to meta-module/docs/snow16.svg
diff --git a/meta/docs/snow4.png b/meta-module/docs/snow4.png
similarity index 100%
rename from meta/docs/snow4.png
rename to meta-module/docs/snow4.png
diff --git a/meta/docs/snow4.svg b/meta-module/docs/snow4.svg
similarity index 100%
rename from meta/docs/snow4.svg
rename to meta-module/docs/snow4.svg
diff --git a/meta/docs/meta_arch.svg b/meta/docs/meta_arch.svg
deleted file mode 100644
index db64cec..0000000
--- a/meta/docs/meta_arch.svg
+++ /dev/null
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diff --git a/parallella/README.md b/parallella/README.md
index 5616320..7c1e98a 100644
--- a/parallella/README.md
+++ b/parallella/README.md
@@ -3,11 +3,11 @@ Parallella
 
 ## Summary
 
-* Credit card sized SBC
+* Credit card sized Single Board Computer
 * Adapteva 16-core Epiphany RISC 
-* Xilinx Zynq (FPGA+ARM)
-* 1GB SDRAM
-* Gigabit Ethernet, HDMI, USB 2.0, uSD card 
+* Xilinx Zynq FPGA 
+* 1GB DDR3 RAM
+* Gigabit Ethernet, HDMI, USB 2.0, micro-SD
 * 48 GPIO pins
 * 96 elink pins
 * <5W peak power
@@ -32,12 +32,12 @@ Licensed under Creative Commons Attribution-Share Alike 3.0 Unprotected License
 
 ## Status
 
-In production. 20,000 units built
+In production. >20,000 built
 
 ## Authors
 
 * [Andreas Olofsson](https://github.com/aolofsson)
-* [Boston Design Solutions](http://www.bostondesignsolutions.com) (layout)
+* [Boston Design Solutions](http://www.bostondesignsolutions.com)
 
 
 ## Images
diff --git a/parallella/parallella_bom.xls b/parallella/parallella_bom.xls
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diff --git a/parallella/parallella_layout.brd b/parallella/src/parallella_layout.brd
similarity index 100%
rename from parallella/parallella_layout.brd
rename to parallella/src/parallella_layout.brd
diff --git a/parallella/parallella_schematic.dsn b/parallella/src/parallella_schematic.dsn
similarity index 100%
rename from parallella/parallella_schematic.dsn
rename to parallella/src/parallella_schematic.dsn