Initial commit

.gitignore

@@ -0,0 +1,32 @@
+# For PCBs designed using KiCad: https://www.kicad.org/
+# Format documentation: https://kicad.org/help/file-formats/
+
+# Temporary files
+*.000
+*.bak
+*.bck
+*.kicad_pcb-bak
+*.kicad_sch-bak
+*-backups
+*.kicad_prl
+*.sch-bak
+*~
+_autosave-*
+*.tmp
+*-save.pro
+*-save.kicad_pcb
+fp-info-cache
+
+# Netlist files (exported from Eeschema)
+*.net
+
+# Autorouter files (exported from Pcbnew)
+*.dsn
+*.ses
+
+# Exported BOM files
+*.xml
+*.csv
+
+# Generated files
+production/

LICENSE

@@ -0,0 +1,98 @@
+Solderpad Hardware License v2.1 
+
+This license operates as a wraparound license to the Apache License
+Version 2.0 (the “Apache License”) and incorporates the terms and
+conditions of the Apache License(which can be found here:
+http://apache.org/licenses/LICENSE-2.0), with the following additions
+and modifications. It must be read in conjunction with the Apache
+License. Section 1 below modifies definitions and terminology in the
+Apache License and Section 2 below replaces Section 2 of the Apache
+License. The Appendix replaces the Appendix in the Apache License. You
+may, at your option, choose to treat any Work released under this
+license as released under the Apache License (thus ignoring all
+sections written below entirely).
+
+1. Terminology in the Apache License is supplemented or modified as
+follows:
+
+“Authorship”: any reference to ‘authorship’ shall be taken to
+ read “authorship or design”.
+
+“Copyright owner”: any reference to ‘copyright owner’ shall be taken
+ to read “Rights owner”.
+
+“Copyright statement”: the reference to ‘copyright statement’ shall be
+ taken to read ‘copyright or other statement pertaining to Rights’.
+
+The following new definition shall be added to the Definitions section
+of the Apache License:
+
+“Rights” means copyright and any similar right including design right
+ (whether registered or unregistered), rights in semiconductor
+ topographies (mask works) and database rights (but excluding Patents
+ and Trademarks).
+
+The following definitions shall replace the corresponding definitions
+in the Apache License:
+
+“License” shall mean this Solderpad Hardware License version 2.1,
+ being the terms and conditions for use, manufacture, instantiation,
+ adaptation, reproduction, and distribution as defined by Sections 1
+ through 9 of this document.
+
+“Licensor” shall mean the owner of the Rights or entity authorized by
+ the owner of the Rights that is granting the License.
+
+“Derivative Works” shall mean any work, whether in Source or Object
+ form, that is based on (or derived from) the Work and for which the
+ editorial revisions, annotations, elaborations, or other
+ modifications represent, as a whole, an original work of authorship
+ or design. For the purposes of this License, Derivative Works shall
+ not include works that remain reversibly separable from, or merely
+ link (or bind by name) or physically connect to or interoperate with
+ the Work and Derivative Works thereof.
+
+“Object” form shall mean any form resulting from mechanical
+ transformation or translation of a Source form or the application of
+ a Source form to physical material, including but not limited to
+ compiled object code, generated documentation, the instantiation of
+ a hardware design or physical object or material and conversions to
+ other media types, including intermediate forms such as bytecodes,
+ FPGA bitstreams, moulds, artwork and semiconductor topographies
+ (mask works).
+
+“Source” form shall mean the preferred form for making modifications,
+ including but not limited to source code, net lists, board layouts,
+ CAD files, documentation source, and configuration files.
+
+“Work” shall mean the work of authorship or design, whether in Source
+ or Object form, made available under the License, as indicated by a
+ notice relating to Rights that is included in or attached to the
+ work (an example is provided in the Appendix below).
+
+2. Grant of License. Subject to the terms and conditions of this
+License, each Contributor hereby grants to You a perpetual,
+worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+license under the Rights to reproduce, prepare Derivative Works of,
+make, adapt, repair, publicly display, publicly perform, sublicense,
+and distribute the Work and such Derivative Works in Source or Object
+form and do anything in relation to the Work as if the Rights did not
+exist.
+
+APPENDIX
+
+Copyright 2024 James Smith SPDX-License-Identifier: Apache-2.0
+WITH SHL-2.1
+
+Licensed under the Solderpad Hardware License v 2.1
+(the “License”); you may not use this file except in compliance with
+the License, or, at your option, the Apache License version 2.0. You
+may obtain a copy of the License at
+
+https://solderpad.org/licenses/SHL-2.1/
+
+Unless required by applicable law or agreed to in writing, any work
+distributed under the License is distributed on an “AS IS” BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+implied. See the License for the specific language governing
+permissions and limitations under the License.

README.md

@@ -0,0 +1,154 @@
+
+<div align="center">
+  <h1>
+    <img src="images/logo-black.svg#gh-light-mode-only" alt="Short Stack" />
+    <img src="images/logo-white.svg#gh-dark-mode-only" alt="Short Stack" />
+  </h1>
+
+  <h4>World's Smallest Nintendo Wii, using a trimmed motherboard and custom stacked PCBs</h4>
+
+  <p>
+    <a href="#features">Features</a> &middot;
+    <a href="#size--scale">Size & Scale</a> &middot;
+    <a href="#components">Components</a> &middot;
+    <a href="#build-guide">Build Guide</a>
+  </p>
+</div>
+
+![Short Stack Render](images/render-blue.jpg)
+
+## Features
+
+- World's smallest "to scale" Wii console
+- Powered by USB-C
+- HDMI for lossless digital audio and video (powered by [GCVideo](https://github.com/ikorb/gcvideo))
+- Bluetooth for Wii remotes and accessories
+- MicroSD card stores games and saves, instead of disc drive & memory cards
+- 4 GameCube controller ports
+- Power, reset, and sync buttons
+- Power indicator LED and iconic blue glowing disc slot
+- Soft shutdown, power on/off via Wiimote
+
+## Size & Scale
+
+This is a **1:2.38 scale** model of an original Nintendo Wii console, but since that is hard to visualize here are some other stats:
+
+- Same size as a typical deck of playing cards
+- **7.4% the volume** of an original Wii console
+- You could fit **13.5** of these inside an original Wii
+
+![Size comparison](images/deck-of-cards.jpg)
+
+I'm pretty sure this sets the record for the smallest functional scale-model Wii console, but let me know if I'm wrong!
+
+### Could we go smaller?
+
+Yes! It is definitely possible to go smaller than this. My [version of the Omega trim](images/trim.png) keeps all four main mounting holes, which makes it around 7mm wider than a classic Omega trim. Additionally [Wesk](https://twitter.com/Weskmods) has managed to get a Wii motherboard down to 52x52mm on his final destination trim, which is a a full 10mm narrower than my trim. I estimate you could reduce the volume by a further 25-30% without losing any functionality, but it would be an incredibly tight fit and tricky to assemble.
+
+## Components
+
+As the name implies, *Short Stack* is built from a stack of custom PCBs, and a custom heatsink, that are all designed to fit together in a compact and modular way.
+
+### A modular motherboard
+
+Making a tiny build like this is made possible by trimming the Wii motherboard down to the bare essentials. The result is a board which is just *62x62mm*, but still contains the CPU, GPU, RAM and flash memory.
+
+<img src="images/motherboard-front.jpg" width="45%" /> <img src="images/motherboard-back.jpg" width="45%" />
+
+Since we removed the original power circuitry and trimmed off the USB, Bluetooth, and GameCube connectors, we need to provide power and data to the board another way. I designed a couple of boards which solder directly to the front of a trimmed Wii motherboard to provide power and data, which help avoid a tangled mess of wires.
+
+The [Wii Power Strip](https://github.com/loopj/wii-power-strip) supplies power to the Wii motherboards using a Molex Pico-Lock connector, and additionally has footprints to help relocate of a couple of capacitors which are typically removed when trimming a Wii.
+
+[Periphlex](https://github.com/loopj/periphlex) is a flex PCB which breaks out the Bluetooth, USB and GameCube controller data lines, as well as the power, shutdown, and reset GPIOs. These are then made available via a 14-pin FFC connector. This approach replaces 11 magnet wires with a single, removable ribbon cable.
+
+![Periphlex](images/periphlex-render.png)
+
+On the back of the motherboard, I'm using two open-source boards designed by the very talented [YveltalGriffin](https://github.com/mackieks). [fujiflex](https://github.com/mackieks/fujiflex) provides digital A/V output using GCVideo, and [nandFlex](https://github.com/mackieks/nandFlex) relocates the Wii's NAND memory chip, to enable the tight trim.
+
+### Custom PCBs
+
+In addition to the modular boards on the motherboard, I designed two PCBs specific to Short Stack which provide the rest of the functionality for the console.
+
+The *main board* PCB hosts the power regulators, USB to microSD logic, HDMI connector, GameCube ports, and a microcontroller for power management. A 14-pin ribbon cable connects this board to the Wii motherboard via *Periphlex*, and a power cable delivers power to the *Power Strip*.
+
+![Main Board](images/main-board.jpg)
+
+The *front panel* PCB hosts the power, reset, and sync buttons, as well as the power LED and disc slot LEDs. This board connects to the main board via a short 8-pin ribbon cable.
+
+![Front Panel Board](images/front-panel.jpg)
+
+### Cooling
+
+The final part of the "stack" is a custom heatsink which is designed to be as low profile as possible, while still providing adequate cooling for the Wii's CPU and GPU. The heatsink is designed to be machined from aluminum or copper, and incorporates mounting holes which align with those on the Wii motherboard.
+
+![Heatsink](images/heatsink.jpg)
+
+I managed to find a tiny 5V blower fan ([Pelonis AGB208N](https://catalog.pelonistechnologies.com/item/air-g-series-micro-fans-and-micro-blowers/micro-fans-and-micro-blowers/agb208n)) which measures just 20x20x8mm and somehow puts out 0.84 CFM of air. This blows air through the heasink fins, out the side of the case.
+
+### Case
+
+The stack is housed in a custom 3D printed case, secured with four M2.5 screws and spacers. The rest of case is assembled using self-tapping M1.2 screws. The screw locations and fan vents are positioned to match the original Wii case as closely as possible, to minimize visible screws.
+
+You can access files on the SD card by connecting the console to a computer via USB, but I also included an access panel on the front of the case where the original Wii SD card slot is found. This panel is held in place by magnets and can be removed to access the SD card without opening the case. Shout out to Wesk for the magnet idea!
+
+To keep the clean aesthetic of the original Wii I wanted to hide the GameCube controller ports behind a panel. I always hated the hinged design of the original, and it is quite difficult to replicate at this scale, so I redesigned this panel to be a sliding panel.
+
+![GameCube Ports](images/gamecube-ports.png)
+
+The Wii's iconic disc slot lights are recreated using a 1.5mm thick custom cut acrylic light diffuser, which is illuminated by two side-mounted addressable LEDs on the front panel board. The power, reset, and sync buttons are all also 3D printed, and the power button hosts a tiny light pipe to allow the power LED to shine through.
+
+![Front assembly](images/front-assembly.png)
+
+I FDM printed the case on a Voron 2.4 in ABS using a 0.4mm nozzle at 0.1mm layer height, but it should print fine in PLA or PETG on a well-tuned printer. At this scale, dimensional accuracy is important. In theory it should be possible to print this on an SLA printer, but I haven't tried it.
+
+## Build Guide
+
+> [!CAUTION]
+> This is not a beginner project! This build requires performing a challenging motherboard trim, fine pitch soldering, and PCB assembly. If you are not comfortable with these tasks, I would recommend starting with a simpler project and working your way up - check out the [BitBuilt forums](https://bitbuilt.net) for some awesome project worklogs.
+
+### What you'll need
+
+- 4-layer Wii motherboard
+- [nandFlex](https://github.com/mackieks/nandFlex) board (or [4Layer Technologies RVL-NAND](https://4layertech.com/products/rvl-nand-flex-board-pack-of-2))
+- Assembled [fujiflex](https://github.com/mackieks/fujiflex) (or [ElectronAVE](https://electron-shepherd.com/products/electronave-kit))
+- Assembled [Wii Power Strip](https://github.com/loopj/wii-power-strip/tree/r1) - **must be revision 1!**
+- Assembled [Periphlex](https://github.com/loopj/periphlex)
+- [Short Stack main board](main-board/KiCad) - 1.2mm thickness, stencil recommended
+- [Short Stack front panel](front-panel/KiCad) - 0.8mm thickness, black soldermask, stencil recommended
+- [Heatsink](case/heatsink.step) - machined from aluminum or copper
+- [Light diffuser](case/disc-light-diffuser.dxf) - cut from 1.5mm thick acrylic
+- The components and hardware from the [bill of materials](full-bom.xlsx)
+
+### Assembly
+
+![Case Exploded](images/case-assembly.gif)
+
+- Assemble main board and front panel PCBs
+  - I recommend using a solder stencil and a hot plate or reflow oven
+  - If using a hot plate, hand solder the headphone connectors after reflowing the rest of the components
+  - Secure two 3 x 1mm magnets inside the holes on the front panel board using a dab of CA glue
+- Flash the [main board firmware](main-board/firmware)
+- Prepare and trim the Wii motherboard
+  - Relocate the NAND, test it still boots
+  - Perform a wireless U10 relocation, test it still boots - you may wish to wire a magnet wire to the [`SHUTDOWN` via](https://bitbuilt.net/forums/index.php?threads/soft-shutdown-power-on-via-bluetooth.6239/) first
+  - Install fujiflex, and test digital A/V output works
+  - Trim the motherboard (see [trim dimensions](images/trim.png))
+- Assemble and install *Power Strip* ([see instructions](https://github.com/loopj/wii-power-strip/tree/r1#installation))
+- Assemble and install *Periphlex* ([see instructions](https://github.com/loopj/periphlex#installation))
+- Connect the boards
+  - Connect the main board to the motherboard via a 14-pin FFC cable to *Periphlex*
+  - Connect the main board to the motherboard via a 5-pin Molex Pico-Lock cable to *Power Strip*
+  - Connect the front panel board to the main board via an 8-pin FFC cable
+  - Connect the fan to the main board
+  - Apply thermal paste to the CPU and GPU
+  - Stack the components: heatsink, motherboard, M2.5 x 3mm spacers, main board
+  - Install the stack to the case bottom using M2.5 x 12mm wafer head screws
+- Secure the top of the case to the bottom using four M1.2 x 4mm screws
+- Secure the front panel PCB to the front of the case using two M1.2 x 3mm screws
+- Secure the front of the case to the bottom of the case using two M1.2 x 4mm screws
+- Press-fit two 3 x 1mm magnets into the holes on the sd card cover, make sure they match polarity with the magnets on the front panel PCB
+- Slide the side panel into the case
+
+## License
+
+Permissively released under the Solderpad Hardware License v2.1

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front-panel/KiCad/fp-lib-table

@@ -0,0 +1,4 @@
+(fp_lib_table
+  (version 7)
+  (lib (name "project-footprints")(type "KiCad")(uri "${KIPRJMOD}/project-footprints")(options "")(descr ""))
+)

front-panel/KiCad/project-footprints/19-C47RSGHBHC-5V012T_EVE.step

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front-panel/KiCad/project-footprints/5034800800.kicad_mod

@@ -0,0 +1,51 @@
+(module "5034800800" (layer F.Cu)
+  (descr "5034800800-2")
+  (tags "Connector")
+  (attr smd)
+  (fp_text reference J** (at 0.000 -0) (layer F.SilkS)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text user %R (at 0.000 -0) (layer F.Fab)
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_text value "5034800800" (at 0.000 -0) (layer F.SilkS) hide
+    (effects (font (size 1.27 1.27) (thickness 0.254)))
+  )
+  (fp_line (start -2.85 -1.05) (end 2.85 -1.05) (layer F.Fab) (width 0.2))
+  (fp_line (start 2.85 -1.05) (end 2.85 2.05) (layer F.Fab) (width 0.2))
+  (fp_line (start 2.85 2.05) (end -2.85 2.05) (layer F.Fab) (width 0.2))
+  (fp_line (start -2.85 2.05) (end -2.85 -1.05) (layer F.Fab) (width 0.2))
+  (fp_line (start -3.85 -3.05) (end 3.85 -3.05) (layer F.CrtYd) (width 0.1))
+  (fp_line (start 3.85 -3.05) (end 3.85 3.05) (layer F.CrtYd) (width 0.1))
+  (fp_line (start 3.85 3.05) (end -3.85 3.05) (layer F.CrtYd) (width 0.1))
+  (fp_line (start -3.85 3.05) (end -3.85 -3.05) (layer F.CrtYd) (width 0.1))
+  (fp_line (start -2.85 -1.05) (end -2.85 -1.55) (layer F.Fab) (width 0.2))
+  (fp_line (start -2.85 -1.55) (end -2.35 -1.55) (layer F.Fab) (width 0.2))
+  (fp_line (start -2.35 -1.55) (end -2.35 -0.95) (layer F.Fab) (width 0.2))
+  (fp_line (start 2.85 -0.95) (end 2.85 -1.55) (layer F.Fab) (width 0.2))
+  (fp_line (start 2.85 -1.55) (end 2.54 -1.55) (layer F.Fab) (width 0.2))
+  (fp_line (start 2.65 -1.55) (end 2.35 -1.55) (layer F.Fab) (width 0.2))
+  (fp_line (start 2.35 -1.55) (end 2.35 -1.05) (layer F.Fab) (width 0.2))
+  (fp_line (start -2.85 2.05) (end 2.85 2.05) (layer F.SilkS) (width 0.1))
+  (fp_line (start 2.85 2.05) (end 2.85 -0.95) (layer F.SilkS) (width 0.1))
+  (fp_line (start -2.85 -1.05) (end -2.85 2.05) (layer F.SilkS) (width 0.1))
+  (fp_line (start -1.75 -1.85) (end -1.75 -1.85) (layer F.SilkS) (width 0.2))
+  (fp_line (start -1.75 -2.05) (end -1.75 -2.05) (layer F.SilkS) (width 0.2))
+  (fp_arc (start -1.75 -1.95) (end -1.750 -1.85) (angle -180) (layer F.SilkS) (width 0.2))
+  (fp_arc (start -1.75 -1.95) (end -1.750 -2.05) (angle -180) (layer F.SilkS) (width 0.2))
+  (pad 1 smd rect (at -1.750 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at -1.250 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at -0.750 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at -0.250 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at 0.250 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at 0.750 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at 1.250 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad 8 smd rect (at 1.750 -1.25 0) (size 0.300 0.700) (layers F.Cu F.Paste F.Mask))
+  (pad MP1 smd rect (at -2.540 1.4 0) (size 0.300 1.000) (layers F.Cu F.Paste F.Mask))
+  (pad MP2 smd rect (at 2.540 1.4 0) (size 0.300 1.000) (layers F.Cu F.Paste F.Mask))
+  (model 5034800800.stp
+    (at (xyz 0 -0.078740157480315 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz -90 0 0))
+  )
+)

front-panel/KiCad/project-footprints/LED_12-23C_RSGHBHW-5V01_2C.kicad_mod

@@ -0,0 +1,61 @@
+(footprint "LED_12-23C_RSGHBHW-5V01_2C" (version 20221018) (generator pcbnew)
+  (layer "F.Cu")
+  (attr smd)
+  (fp_text reference "REF**" (at 1.225 -2.725) (layer "F.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 4c684991-b4d5-4a19-bd0f-4544983e7eb4)
+  )
+  (fp_text value "LED_12-23C_RSGHBHW-5V01_2C" (at 14.36 1.565) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp cd4976fd-48a8-41ba-86bb-e3bc69cd8450)
+  )
+  (fp_line (start -0.75 -0.3) (end 0.75 -0.3)
+    (stroke (width 0.127) (type solid)) (layer "F.SilkS") (tstamp 528c8611-8065-4ddb-8042-f7b3babefe39))
+  (fp_line (start 1.9 -0.4) (end 1.9 0.45)
+    (stroke (width 0.1) (type default)) (layer "F.SilkS") (tstamp 67801e61-3e5e-44d3-ae28-ed79ae1d2cf3))
+  (fp_arc (start -0.89 -0.749999) (mid 0 -1.300748) (end 0.89 -0.75)
+    (stroke (width 0.127) (type solid)) (layer "F.SilkS") (tstamp e940b54d-464b-4559-88d5-a205db0a5e06))
+  (fp_line (start -1.95 -0.65) (end -1.95 0.65)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 89250987-b544-47e3-9dfb-20f4a38f1bcb))
+  (fp_line (start -1.95 0.65) (end 1.95 0.65)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp dff4e115-2ca9-40cd-a30d-65369b1d915d))
+  (fp_line (start -1.2 -0.65) (end -1.95 -0.65)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp afb752dc-0317-4a0f-b19a-555ce873f6da))
+  (fp_line (start 1.95 -0.65) (end 1.2 -0.65)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 650da138-4d6c-432d-b6e8-3695c45dc5e4))
+  (fp_line (start 1.95 0.65) (end 1.95 -0.65)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 7d153a6a-8764-4de0-82c3-74e67acb80b0))
+  (fp_arc (start -1.2 -0.65) (mid -0.763787 -1.318382) (end 0 -1.55)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 02a09443-0481-4e96-9b6a-43b80975eeb4))
+  (fp_arc (start 0 -1.55) (mid 0.763787 -1.318382) (end 1.2 -0.65)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp f0b5efb3-df6e-458f-aa17-adfc95f79d71))
+  (fp_line (start -1.5 -0.3) (end -1.5 0.2)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp 908bf492-cf18-4e12-b57d-414d4d56fe84))
+  (fp_line (start -1.5 0.2) (end 1.5 0.2)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp c079846e-5bb1-45b1-b9cb-1e00be110b03))
+  (fp_line (start -1 -0.3) (end -1.5 -0.3)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp a45b698c-0973-4837-a176-09e838bf1bc0))
+  (fp_line (start 1 -0.3) (end -1 -0.3)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp aa260b2a-68ab-4c1e-acac-d4847b362b02))
+  (fp_line (start 1.5 -0.3) (end 1 -0.3)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp d963377b-0f45-4c69-a358-e8a9f96f8b36))
+  (fp_line (start 1.5 0.2) (end 1.5 -0.3)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp 02bfe54d-c417-452a-ae86-c64ed9898d6d))
+  (fp_arc (start -1 -0.3) (mid -0.707107 -1.007107) (end 0 -1.3)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp b0714570-784f-4dc1-a6c6-1f7e81c12df8))
+  (fp_arc (start 0 -1.3) (mid 0.707107 -1.007107) (end 1 -0.3)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp d7aa7e3b-3912-4b1e-8991-e35b38dd9fe3))
+  (pad "1" smd rect (at 1.425 0) (size 0.55 0.78) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp 305be55c-b0c4-42d6-b696-0636655ca1b1))
+  (pad "2" smd rect (at 0.425 0.22) (size 0.55 0.34) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp 54ac4a17-d025-46b4-b404-cc1888f9b27c))
+  (pad "3" smd rect (at -0.425 0.22) (size 0.55 0.34) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp 1d9d3c82-90ba-47a5-ae04-5fd4a2361f8d))
+  (pad "4" smd rect (at -1.425 0) (size 0.55 0.78) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp 3d5afe27-e443-4ca3-a73e-b1a7396b3dd5))
+  (model "12-23C_RSGHBHW-5V01_2C.step"
+    (offset (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz -90 0 0))
+  )
+)

front-panel/KiCad/project-footprints/LED_19-C47_RSGHBHC-5V01_2T.kicad_mod

@@ -0,0 +1,43 @@
+(footprint "LED_19-C47_RSGHBHC-5V01_2T" (version 20221018) (generator pcbnew)
+  (layer "F.Cu")
+  (attr smd)
+  (fp_text reference "REF**" (at 1.905 -1.905) (layer "F.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 2fef390c-4edf-40cf-a594-2ef2fe50e53f)
+  )
+  (fp_text value "LED_19-C47_RSGHBHC-5V01_2T" (at 15.24 1.905) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp f86d6bf1-8b54-4599-b00b-a2d1769a5666)
+  )
+  (fp_circle (center -1.55 -0.55) (end -1.45 -0.55)
+    (stroke (width 0.1) (type solid)) (fill solid) (layer "F.SilkS") (tstamp 05a7a42f-520d-4b15-9df0-8410f6c28979))
+  (fp_line (start -1.15 -1.15) (end 1.15 -1.15)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 8a94e4a5-0b21-46ee-ad51-dcff1fc951d3))
+  (fp_line (start -1.15 1.15) (end -1.15 -1.15)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 61b48953-c8ac-469f-8615-ddde03397ffd))
+  (fp_line (start 1.15 -1.15) (end 1.15 1.15)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 37f14f67-7bfa-467e-8833-e8fa1af14d71))
+  (fp_line (start 1.15 1.15) (end -1.15 1.15)
+    (stroke (width 0.05) (type solid)) (layer "F.CrtYd") (tstamp 9fdff0c5-0384-4d16-b336-bb334dcdf0c8))
+  (fp_line (start -0.9 -0.9) (end 0.9 -0.9)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp d48586a8-8c64-485e-b73c-5c4cea073e0a))
+  (fp_line (start -0.9 0.9) (end -0.9 -0.9)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp 73f72361-c14c-4ff2-a7e0-b6ffc183ec6a))
+  (fp_line (start 0.9 -0.9) (end 0.9 0.9)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp 6b4185a7-180b-4d3c-8e78-85f2f27d77cb))
+  (fp_line (start 0.9 0.9) (end -0.9 0.9)
+    (stroke (width 0.127) (type solid)) (layer "F.Fab") (tstamp d18d6b5b-3054-4a3c-bbe4-632307eb5d66))
+  (pad "1" smd rect (at -0.55 -0.55) (size 0.7 0.7) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp 60a8b5b1-f812-4b02-9af9-42add6ff7044))
+  (pad "2" smd rect (at 0.55 -0.55) (size 0.7 0.7) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp b8579d3b-ccf4-40c2-9e68-be5575ce69d4))
+  (pad "3" smd rect (at 0.55 0.55) (size 0.7 0.7) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp 9eadd95b-d7a0-4a0d-8fe1-c2e48ffece26))
+  (pad "4" smd rect (at -0.55 0.55) (size 0.7 0.7) (layers "F.Cu" "F.Paste" "F.Mask")
+    (solder_mask_margin 0.102) (tstamp 9c3bbeb7-25f5-4853-8ccb-c64e9c760d3a))
+  (model "19-C47RSGHBHC-5V012T_EVE.step"
+    (offset (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)

front-panel/KiCad/project-footprints/R668048.kicad_mod

@@ -0,0 +1,55 @@
+(footprint "R668048" (version 20221018) (generator pcbnew)
+  (layer "F.Cu")
+  (descr "R-668048-3")
+  (tags "Switch")
+  (attr smd)
+  (fp_text reference "S**" (at 0 0) (layer "F.SilkS")
+      (effects (font (size 1.27 1.27) (thickness 0.254)))
+    (tstamp 4f36e350-7cec-4aba-9cd7-b288f3912a0c)
+  )
+  (fp_text value "R668048" (at 0 0) (layer "F.SilkS") hide
+      (effects (font (size 1.27 1.27) (thickness 0.254)))
+    (tstamp 5a142173-b3ce-47de-adb2-93e38a884b90)
+  )
+  (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
+      (effects (font (size 1.27 1.27) (thickness 0.254)))
+    (tstamp 15e3c2a4-bc8c-44a7-8692-3a754a68d5ea)
+  )
+  (fp_line (start -2.2 -0.375) (end -2.2 -0.375)
+    (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 2e1ba625-50eb-4b7b-af88-3e41a445ae2c))
+  (fp_line (start -2.1 -0.375) (end -2.1 -0.375)
+    (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp 05a1688d-4e35-4088-b32d-69c16fc36778))
+  (fp_line (start -0.8 -0.8) (end 0.8 -0.8)
+    (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp b61aa1f1-ff8c-49f0-b6e5-8cd06a992132))
+  (fp_line (start -0.8 0.8) (end 0.8 0.8)
+    (stroke (width 0.2) (type solid)) (layer "F.SilkS") (tstamp 616ca5cd-f17d-48b6-981a-27542209b971))
+  (fp_arc (start -2.2 -0.375) (mid -2.15 -0.425) (end -2.1 -0.375)
+    (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp a7bf46bc-6741-4b60-be90-987df8ea3e0a))
+  (fp_arc (start -2.1 -0.375) (mid -2.15 -0.325) (end -2.2 -0.375)
+    (stroke (width 0.1) (type solid)) (layer "F.SilkS") (tstamp c597e66a-703e-45c0-889b-aca767bf630c))
+  (fp_line (start -2.6 -1.8) (end 2.6 -1.8)
+    (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp d6d5cebc-9a63-4a35-98d9-d290ee013d37))
+  (fp_line (start -2.6 1.8) (end -2.6 -1.8)
+    (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 88175d2b-de73-42b8-aa33-5bc302b6403b))
+  (fp_line (start 2.6 -1.8) (end 2.6 1.8)
+    (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp a16a28a7-0d50-46c1-b726-ccffc3239a96))
+  (fp_line (start 2.6 1.8) (end -2.6 1.8)
+    (stroke (width 0.1) (type solid)) (layer "F.CrtYd") (tstamp 5fdeec59-ef32-4246-9d2e-f1ee76433e5c))
+  (fp_line (start -1.25 -0.8) (end 1.25 -0.8)
+    (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 61144b20-8024-4dde-a1e9-e929671106e2))
+  (fp_line (start -1.25 0.8) (end -1.25 -0.8)
+    (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 5eb81541-74d1-40f5-a9f6-02faa7bdaed7))
+  (fp_line (start 1.25 -0.8) (end 1.25 0.8)
+    (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 0b7a36a7-aaa7-43a2-bea3-41583e38e978))
+  (fp_line (start 1.25 0.8) (end -1.25 0.8)
+    (stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 02548150-3baa-40ec-b505-ccb872ce8a05))
+  (pad "1" smd rect (at -1.325 -0.375 90) (size 0.55 0.55) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 3449a471-7ade-4c7e-9a0d-eb01b9e2eef0))
+  (pad "2" smd rect (at 1.325 -0.375 90) (size 0.55 0.55) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 98706d99-cd1c-4104-96fd-7c89d3adb15c))
+  (pad "3" smd rect (at -1.325 0.375 90) (size 0.55 0.55) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp 1fcfabc0-e3d9-4a87-8798-f87b51a72661))
+  (pad "4" smd rect (at 1.325 0.375 90) (size 0.55 0.55) (layers "F.Cu" "F.Paste" "F.Mask") (tstamp dc7a9b22-121e-46d4-903d-4b73a3504e57))
+  (model "R-668048.stp"
+    (offset (xyz 0 0 0))
+    (scale (xyz 1 1 1))
+    (rotate (xyz 0 0 0))
+  )
+)

front-panel/KiCad/ss-front-panel.kicad_dru

@@ -0,0 +1,133 @@
+(version 1)
+# Custom Design Rules (DRC) for KiCAD 7.0 (Stored in '<project>.kicad_dru' file).
+#
+# Matching JLCPCB capabilities: https://jlcpcb.com/capabilities/pcb-capabilities
+#
+# KiCad documentation: https://docs.kicad.org/master/id/pcbnew/pcbnew_advanced.html#custom_design_rules
+#
+# Inspiration
+# - https://gist.github.com/darkxst/f713268e5469645425eed40115fb8b49 (with comments)
+# - https://gist.github.com/denniskupec/e163d13b0a64c2044bd259f64659485e (with comments)
+
+# TODO new rule: NPTH pads.
+# Inner diameter of pad should be 0.4-0.5 mm larger than NPTH drill diameter.
+# JLCPCB: "We make NPTH via dry sealing film process, if customer would like a NPTH but around with pad/copper, our engineer will dig out around pad/copper about 0.2mm-0.25mm, otherwise the metal potion will be flowed into the hole and it becomes a PTH. (there will be no copper dig out optimization for single board)."
+
+# TODO: new rule for plated slots: min diameter/width 0.5mm
+# JLCPCB: "The minimum plated slot width is 0.5mm, which is drawn with a pad."
+
+# TODO new rule: non-plated slots: min diameter/width 1.0mm
+# JLCPCB: "The minimum Non-Plated Slot Width is 1.0mm, please draw the slot outline in the mechanical layer(GML or GKO)""
+
+(rule "Track width, outer layer (1oz copper)"
+	(layer outer)
+	(condition "A.Type == 'track'")
+	(constraint track_width (min 0.127mm))
+)
+
+(rule "Track spacing, outer layer (1oz copper)"
+	(layer outer)
+	(condition "A.Type == 'track' && B.Type == A.Type")
+	(constraint clearance (min 0.127mm))
+)
+
+(rule "Track width, inner layer"
+	(layer inner)
+	(condition "A.Type == 'track'")
+	(constraint track_width (min 0.09mm))
+)
+
+(rule "Track spacing, inner layer"
+	(layer inner)
+	(condition "A.Type == 'track' && B.Type == A.Type")
+	(constraint clearance (min 0.09mm))
+)
+
+(rule "Silkscreen text"
+	(layer "?.Silkscreen")
+	(condition "A.Type == 'Text' || A.Type == 'Text Box'")
+	(constraint text_thickness (min 0.15mm))
+	(constraint text_height (min 1mm))
+)
+
+(rule "Pad to Silkscreen"
+	(layer outer)
+	(condition "A.Type == 'pad' && B.Layer == '?.Silkscreen'")
+	(constraint silk_clearance (min 0.15mm))
+)
+
+(rule "Edge (routed) to track clearance"
+	(condition "A.Type == 'track'")
+	(constraint edge_clearance (min 0.3mm))
+)
+
+#(rule "Edge (v-cut) to track clearance"
+#	(condition "A.Type == 'track'")
+#	(constraint edge_clearance (min 0.4mm))
+#)
+
+# JLCPCB restrictions ambiguous:
+# Illustration: 0.2 mm, 1&2 layer: 0.3 mm, multilayer: "(0.15mm more costly)"
+# This rule handles diameter minimum and maximum for ALL holes.
+# Other specialized rules handle restrictions (e.g. Via, PTH, NPTH) 
+(rule "Hole diameter"
+	(constraint hole_size (min 0.2mm) (max 6.3mm))
+)
+
+(rule "Hole (NPTH) diameter"
+	(layer outer)
+	(condition "!A.isPlated()")
+	(constraint hole_size (min 0.5mm))
+)
+
+# TODO: Hole to board edge ≥ 1 mm. Min. board size 10 × 10 mm
+(rule "Hole (castellated) diameter"
+	(layer outer)
+	(condition "A.Type == 'pad' && A.Fabrication_Property == 'Castellated pad'")
+	(constraint hole_size (min 0.6mm))
+)
+
+# JLCPCB: "Via diameter should be 0.1mm(0.15mm preferred) larger than Via hole size" (illustration shows diameters for both dimensions)
+# JLCPCB: PTH: "The annular ring size will be enlarged to 0.15mm in production."
+(rule "Annular ring width (via and PTH)"
+	(layer outer)
+	(condition "A.isPlated()")
+	(constraint annular_width (min 0.075mm))
+)
+
+(rule "Clearance: hole to hole (perimeter), different nets"
+	(layer outer)
+	(condition "A.Net != B.Net")
+	(constraint hole_to_hole (min 0.5mm))
+)
+
+(rule "Clearance: hole to hole (perimeter), same net"
+	(layer outer)
+	(condition "A.Net == B.Net")
+	(constraint hole_to_hole (min 0.254mm))
+)
+
+(rule "Clearance: track to NPTH hole (perimeter)"
+#	(condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track' && A.Net != B.Net")
+	(condition "!A.isPlated() && B.Type == 'track' && A.Net != B.Net")
+	(constraint hole_clearance (min 0.254mm))
+)
+
+(rule "Clearance: track to PTH hole perimeter"
+	(condition "A.isPlated() && B.Type == 'track' && A.Net != B.Net")
+	(constraint hole_clearance (min 0.33mm))
+)
+
+# TODO: try combining with rule "Clearance: PTH to track, different nets"
+(rule "Clearance: track to pad"
+	(condition "A.Type == 'pad' && B.Type == 'track' &&  A.Net != B.Net")
+	(constraint clearance (min 0.2mm))
+)
+
+(rule "Clearance: pad/via to pad/via"
+	(layer outer)
+#	(condition "(A.Type == 'Pad' || A.Type == 'Via') && (B.Type == 'Pad' || B.Type == 'Via') && A.Net != B.Net")	
+	(condition "A.isPlated() && B.isPlated() && A.Net != B.Net")
+	(constraint clearance (min 0.127mm))
+)
+

front-panel/KiCad/ss-front-panel.kicad_pro

@@ -0,0 +1,627 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {
+        "apply_defaults_to_fp_fields": false,
+        "apply_defaults_to_fp_shapes": false,
+        "apply_defaults_to_fp_text": false,
+        "board_outline_line_width": 0.1,
+        "copper_line_width": 0.2,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.05,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": false,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.1,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.15,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.762,
+          "height": 1.524,
+          "width": 1.524
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "min_clearance": 0.2
+        }
+      },
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        }
+      ],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "connection_width": "warning",
+        "copper_edge_clearance": "error",
+        "copper_sliver": "warning",
+        "courtyards_overlap": "ignore",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint": "error",
+        "footprint_symbol_mismatch": "warning",
+        "footprint_type_mismatch": "ignore",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "isolated_copper": "warning",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "lib_footprint_issues": "warning",
+        "lib_footprint_mismatch": "warning",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "warning",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_edge_clearance": "warning",
+        "silk_over_copper": "warning",
+        "silk_overlap": "ignore",
+        "skew_out_of_range": "error",
+        "solder_mask_bridge": "error",
+        "starved_thermal": "error",
+        "text_height": "warning",
+        "text_thickness": "warning",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "max_error": 0.005,
+        "min_clearance": 0.0,
+        "min_connection": 0.0,
+        "min_copper_edge_clearance": 0.0,
+        "min_hole_clearance": 0.25,
+        "min_hole_to_hole": 0.25,
+        "min_microvia_diameter": 0.2,
+        "min_microvia_drill": 0.1,
+        "min_resolved_spokes": 2,
+        "min_silk_clearance": 0.0,
+        "min_text_height": 0.8,
+        "min_text_thickness": 0.08,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.0,
+        "min_via_annular_width": 0.1,
+        "min_via_diameter": 0.5,
+        "solder_mask_clearance": 0.0,
+        "solder_mask_min_width": 0.0,
+        "solder_mask_to_copper_clearance": 0.005,
+        "use_height_for_length_calcs": true
+      },
+      "teardrop_options": [
+        {
+          "td_onpadsmd": true,
+          "td_onroundshapesonly": false,
+          "td_ontrackend": false,
+          "td_onviapad": true
+        }
+      ],
+      "teardrop_parameters": [
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_round_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_rect_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
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+}