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ELEC-304: Lights Schematic ()

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* ELEC-304 Lights Board Rev 1.0
- First revision of schematic

Schematic Library:
- Added MOSFET P-CH 20V 5A 6-TSOP
- Modified MOSFET N-CH 30V 8.7A 2.1W 6-PQDN(2x2). Put all the drains one
wire.

Footprint Library:
- Added MOSFET P-CH 20V 5A 6-TSOP

* Elec 304 - Revision  for lights board. Changed
to high side driver for the headlights
and using n mosfet now instead
of p mosfet and n mosfet for the rest
of the lights.

* elec 304- revision 1.1
Changed to high side drivers for headlights.
For the other lights changed to n mosfe.

* elec 304 Revision 1.2

Schematic Library: Added 1K resistor array
PCB footprint: Added 1K resistor array (note: pcb looks strange/is it
ok)

- Fixed high side driver schematic symbol (note: can't

* elec 304 - Revision 1.2

Schematic library: added 1K resistor array
PCB footprint: added 1K resistor array (Note: footprint for resistor
array looks strange/is it correct?)

- Fixed schematic for high side driver
- Fixed LEDs (not sure how to add jumpers to disable LEDs)
- Changed everything so GND on bottom and 12V on top
- Made names more descriptive

* elec 304 - Revision 1.3

Made changes:
- so connector pin 1 is on top
- added jumpers to LED
- HSD and resistor array should be updated on schematic library
- changed harness names to more descriptive

* elec 304 - Revision 1.4
- leds are now connected to one jumper wire
- components are on grid

* elec 304 - Revision 1.0 for PCB
- started PCB design

* elec 304- Revision 1.1 of PCB Design
- new layout
- larger board size

* elec 304 revision 1.5
Changes made:
- made schematic neater (font size/alignment)
- fixed dual package
- fixed pcb footprints
- added 12v connector
- added GPIO input to determine front or back
- changed from HSD to load switch
- added schematic and footprint for load switch being used
- capacitor still has to be addded to output of load switch
- NO CHANGES to PCB

* elec 304 - Revision 1.6
- Added capacitors after load switch
- remoived resistor array; load switch has internal one
- made schematic more organized

* elec 304 - revision 1.7

* elec 304 - revision 1.8

* elec 304 - revision 1.9
- finished first draft of PCB design
- 4 layour board
- load switches switched to active high
- added capacitors to schematics
- no changes made to library/footprint
- seperated headlight sheets into two seperate sheets

* elec 304 - revision 1.10

- added 200 ohm resistor between VOUT and Bleed
- added 200 ohm resistor to schematic and PCB library
- added polygon pours for all connectors/ used thicker traces
- added more silkscreen
- fixed schematic (added titles/resistors)

- having trouble connecting pin 7 and 8, the copper bridge between the
two of them is causing trouble? except for the 4 HSD for high/low beam

* Library Update
- Updated IC LOAD SWITCH... with 3D model and pin 1 dot
- Updated MOSFET 2NFET... with 3D model
- Updated CAP 56uF... with cylinder extrude
- Updated IC LOAD SWITCH... to not have polygon but have another pad
instead

* elec 304 - revision 1.11
- changed connector pins to make it more organized
- changed GND polygon pours to traces
- added silkscreen for LED
- made the board 1cm smaller on the right side
- fixed traces (straight traces)
- fixed HSD error by fixing the pcb footprint

- instead of putting the two connectors (P5 and P3) together because
that would fix the left and right side together i could use a 4 pin
connector??

* elec 304 - revision 1.12
-fixed 90 degrees traces
-fixed traces and polygon pours to make it more organized
- added diode to the horn/strobe

* elec 304 - revision 1.13
- combined rear brake/turn lights with the connectors being used for
headlights at the front
- replaced horn/strobe with HSD
- made board smaller so now 70mm by 70mm
- added GPIO pin for determining front/back of the board
- changed wiring around/added GPIO pins so wiring could be less
cluttered around the controller board region

* elec 304 - revision 1.14
- made silkscreen neater
- fixed bad connection from previous version
- moved components further away from connector
- added bulk capacitor to horn/strobe

- to do: fix JP2

* elec 304 - revision 1.15
- added more silkscreen to the back
- made silkscreen clearer at front
- made schematic more clear

* elec 304 - reivision 1.16
- fixed JP2

* elec 304 - revision 1.17
- fixed unrouted nets

* elec 304 - revision 1.18
- made traces by controller board neater/less 45 degree angle traces

* elec 304 - revision 1.19
- changed connectors so all is white except for power
-added schottky diode to PCB library, schematic library

* - Minor change to layout and silkscreen
- Generated output files.

* elec 304
- started block diagram

* elec 304
- added MOSFET N-CH 30V 8.7A 2.1W 6-PQFN (2x2)
- added IC LOAD SWITCH ACT-HI
- added DIODE SCHOTTKY 60V 7A POWERDIS
- added CAP ALUM 56 UF 20% 35V Radial
- added RES SMD 200 OHM

* Merging library, renumbered sheets
This commit is contained in:
veroniclee 2018-03-04 14:50:51 -05:00 committed by Taiping Li
parent 2f38619a53
commit 0f58f98c8a
28 changed files with 328741 additions and 0 deletions
Variant: [No Variations]

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<a href="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General" class="customize"><acronym title="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General">Reporting Options</acronym></a>
<h1>File in Previous Format</h1>
<table class="front_matter">
<tr class="front_matter">
<td class="front_matter_column1">Date</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3">2018-02-24</td>
</tr>
<tr class="front_matter">
<td class="front_matter_column1">Time</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3">3:19:04 PM</td>
</tr>
<tr class="front_matter">
<td class="front_matter_column1">Filename</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3"><a href="file://C:\Users\PC-7\Documents\Midnight Sun\hardware\MSXII_ControllerBreakout\MSXII_Controller_Breakout.PcbDoc" class="file"><acronym title="C:\Users\PC-7\Documents\Midnight Sun\hardware\MSXII_ControllerBreakout\MSXII_Controller_Breakout.PcbDoc">C:\Users\PC-7\Documents\Midnight Sun\hardware\MSXII_ControllerBreakout\MSXII_Controller_Breakout.PcbDoc</acronym></a></td>
</tr>
</table>
<br>
<table>
<tr>
<th style="text-align : left" colspan="1" class="">Version</th>
<th style="text-align : left" colspan="1" class="">Warning</th>
</tr>
</table>
<br><hr>
<p>This file was generated by <b>an earlier</b> version of the software</p>
</body>
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MSXII_Lights/Block_Diagram.SchDoc
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LOADING design file

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<a href="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General" class="customize"><acronym title="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General">Reporting Options</acronym></a>
<h1>File in Previous Format</h1>
<table class="front_matter">
<tr class="front_matter">
<td class="front_matter_column1">Date</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3">2018-01-13</td>
</tr>
<tr class="front_matter">
<td class="front_matter_column1">Time</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3">3:56:33 PM</td>
</tr>
<tr class="front_matter">
<td class="front_matter_column1">Filename</td>
<td class="front_matter_column2">:</td>
<td class="front_matter_column3"><a href="file://C:\Users\PC-7\Documents\Midnight Sun\hardware\MSXII_Lights\Carrier_Board_Template.PcbDoc" class="file"><acronym title="C:\Users\PC-7\Documents\Midnight Sun\hardware\MSXII_Lights\Carrier_Board_Template.PcbDoc">C:\Users\PC-7\Documents\Midnight Sun\hardware\MSXII_Lights\Carrier_Board_Template.PcbDoc</acronym></a></td>
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<br><hr>
<p>This file was generated by <b>an earlier</b> version of the software</p>
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SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=ComponentClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=ComponentClearance|ENABLED=TRUE|PRIORITY=3|COMMENT= |UNIQUEID=TDTELNDQ|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=10mil|COLLISIONCHECKMODE=3|VERTICALGAP=10mil|SHOWDISTANCES=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=HoleSize|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=HoleSize|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=AJGNYTBT|DEFINEDBYLOGICALDOCUMENT=FALSE|ABSOLUTEVALUES=TRUE|MAXLIMIT=248.0315mil|MINLIMIT=11.811mil|MAXPERCENT=80.000|MINPERCENT=20.000¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FabricationTestpoint|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=FabricationTestpoint|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=AWHBMDGP|DEFINEDBYLOGICALDOCUMENT=FALSE|SIDE=3|TESTPOINTUNDERCOMPONENT=TRUE|MINSIZE=40mil|MAXSIZE=100mil|PREFEREDSIZE=60mil|MINHOLESIZE=0mil|MAXHOLESIZE=40mil|PREFEREDHOLESIZE=32mil|TESTPOINTGRID=1mil|ALLOWSIDETOP=TRUE|ALLOWSIDEBOTTOM=TRUE|USEGRID=TRUE|GRIDTOLERANCE=0.01mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FabricationTestPointUsage|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=FabricationTestPointUsage|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=HJDPIUHK|DEFINEDBYLOGICALDOCUMENT=FALSE|VALID=0|ALLOWMULTIPLE=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=LayerPairs|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=LayerPairs|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=GIEKEPIV|DEFINEDBYLOGICALDOCUMENT=FALSE|ENFORCE=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsBGA|SCOPE2EXPRESSION=All|NAME=Fanout_BGA|ENABLED=TRUE|PRIORITY=1|COMMENT=Fanout_BGA (Default Rule)|UNIQUEID=YLGGJQSL|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsLCC|SCOPE2EXPRESSION=All|NAME=Fanout_LCC|ENABLED=TRUE|PRIORITY=2|COMMENT=Fanout_LCC (Default Rule)|UNIQUEID=LWGVNWEE|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsSOIC|SCOPE2EXPRESSION=All|NAME=Fanout_SOIC|ENABLED=TRUE|PRIORITY=3|COMMENT=Fanout_SOIC (Default Rule)|UNIQUEID=DIDMOQVO|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=(CompPinCount < 5)|SCOPE2EXPRESSION=All|NAME=Fanout_Small|ENABLED=TRUE|PRIORITY=4|COMMENT=Fanout_Small (Default Rule)|UNIQUEID=LIUDJOVE|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=OutThenIn|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=FanoutControl|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Fanout_Default|ENABLED=TRUE|PRIORITY=5|COMMENT=Fanout_Default (Default Rule)|UNIQUEID=MEVSFELT|DEFINEDBYLOGICALDOCUMENT=FALSE|BGADIR=Out|BGAVIAMODE=Centered|FANOUTSTYLE=Auto|FANOUTDIRECTION=Alternating|VIAGRID=1mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=Height|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=Height|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=AWMYQSWH|DEFINEDBYLOGICALDOCUMENT=FALSE|MINHEIGHT=0mil|MAXHEIGHT=1000mil|PREFHEIGHT=500mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=DiffPairsRouting|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=DiffPairsRouting|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=OTWUGAXU|DEFINEDBYLOGICALDOCUMENT=FALSE|MAXLIMIT=10mil|MINLIMIT=10mil|MOSTFREQGAP=10mil|TOPLAYER_MINWIDTH=15mil|TOPLAYER_MAXWIDTH=15mil|TOPLAYER_PREFWIDTH=15mil|MIDLAYER1_MINWIDTH=15mil|MIDLAYER1_MAXWIDTH=15mil|MIDLAYER1_PREFWIDTH=15mil|MIDLAYER2_MINWIDTH=15mil|MIDLAYER2_MAXWIDTH=15mil|MIDLAYER2_PREFWIDTH=15mil|MIDLAYER3_MINWIDTH=15mil|MIDLAYER3_MAXWIDTH=15mil|MIDLAYER3_PREFWIDTH=15mil|MIDLAYER4_MINWIDTH=15mil|MIDLAYER4_MAXWIDTH=15mil|MIDLAYER4_PREFWIDTH=15mil|MIDLAYER5_MINWIDTH=15mil|MIDLAYER5_MAXWIDTH=15mil|MIDLAYER5_PREFWIDTH=15mil|MIDLAYER6_MINWIDTH=15mil|MIDLAYER6_MAXWIDTH=15mil|MIDLAYER6_PREFWIDTH=15mil|MIDLAYER7_MINWIDTH=15mil|MIDLAYER7_MAXWIDTH=15mil|MIDLAYER7_PREFWIDTH=15mil|MIDLAYER8_MINWIDTH=15mil|MIDLAYER8_MAXWIDTH=15mil|MIDLAYER8_PREFWIDTH=15mil|MIDLAYER9_MINWIDTH=15mil|MIDLAYER9_MAXWIDTH=15mil|MIDLAYER9_PREFWIDTH=15mil|MIDLAYER10_MINWIDTH=15mil|MIDLAYER10_MAXWIDTH=15mil|MIDLAYER10_PREFWIDTH=15mil|MIDLAYER11_MINWIDTH=15mil|MIDLAYER11_MAXWIDTH=15mil|MIDLAYER11_PREFWIDTH=15mil|MIDLAYER12_MINWIDTH=15mil|MIDLAYER12_MAXWIDTH=15mil|MIDLAYER12_PREFWIDTH=15mil|MIDLAYER13_MINWIDTH=15mil|MIDLAYER13_MAXWIDTH=15mil|MIDLAYER13_PREFWIDTH=15mil|MIDLAYER14_MINWIDTH=15mil|MIDLAYER14_MAXWIDTH=15mil|MIDLAYER14_PREFWIDTH=15mil|MIDLAYER15_MINWIDTH=15mil|MIDLAYER15_MAXWIDTH=15mil|MIDLAYER15_PREFWIDTH=15mil|MIDLAYER16_MINWIDTH=15mil|MIDLAYER16_MAXWIDTH=15mil|MIDLAYER16_PREFWIDTH=15mil|MIDLAYER17_MINWIDTH=15mil|MIDLAYER17_MAXWIDTH=15mil|MIDLAYER17_PREFWIDTH=15mil|MIDLAYER18_MINWIDTH=15mil|MIDLAYER18_MAXWIDTH=15mil|MIDLAYER18_PREFWIDTH=15mil|MIDLAYER19_MINWIDTH=15mil|MIDLAYER19_MAXWIDTH=15mil|MIDLAYER19_PREFWIDTH=15mil|MIDLAYER20_MINWIDTH=15mil|MIDLAYER20_MAXWIDTH=15mil|MIDLAYER20_PREFWIDTH=15mil|MIDLAYER21_MINWIDTH=15mil|MIDLAYER21_MAXWIDTH=15mil|MIDLAYER21_PREFWIDTH=15mil|MIDLAYER22_MINWIDTH=15mil|MIDLAYER22_MAXWIDTH=15mil|MIDLAYER22_PREFWIDTH=15mil|MIDLAYER23_MINWIDTH=15mil|MIDLAYER23_MAXWIDTH=15mil|MIDLAYER23_PREFWIDTH=15mil|MIDLAYER24_MINWIDTH=15mil|MIDLAYER24_MAXWIDTH=15mil|MIDLAYER24_PREFWIDTH=15mil|MIDLAYER25_MINWIDTH=15mil|MIDLAYER25_MAXWIDTH=15mil|MIDLAYER25_PREFWIDTH=15mil|MIDLAYER26_MINWIDTH=15mil|MIDLAYER26_MAXWIDTH=15mil|MIDLAYER26_PREFWIDTH=15mil|MIDLAYER27_MINWIDTH=15mil|MIDLAYER27_MAXWIDTH=15mil|MIDLAYER27_PREFWIDTH=15mil|MIDLAYER28_MINWIDTH=15mil|MIDLAYER28_MAXWIDTH=15mil|MIDLAYER28_PREFWIDTH=15mil|MIDLAYER29_MINWIDTH=15mil|MIDLAYER29_MAXWIDTH=15mil|MIDLAYER29_PREFWIDTH=15mil|MIDLAYER30_MINWIDTH=15mil|MIDLAYER30_MAXWIDTH=15mil|MIDLAYER30_PREFWIDTH=15mil|BOTTOMLAYER_MINWIDTH=15mil|BOTTOMLAYER_MAXWIDTH=15mil|BOTTOMLAYER_PREFWIDTH=15mil|MAXUNCOUPLEDLENGTH=500mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=HoleToHoleClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=HoleToHoleClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=UNJMTINI|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=10mil|ALLOWSTACKEDMICROVIAS=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=MinimumSolderMaskSliver|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=MinimumSolderMaskSliver|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=NWUDDYJL|DEFINEDBYLOGICALDOCUMENT=FALSE|MINSOLDERMASKWIDTH=11.811mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=SilkToSolderMaskClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=IsPad|SCOPE2EXPRESSION=All|NAME=SilkToSolderMaskClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=VJWOLYBX|DEFINEDBYLOGICALDOCUMENT=FALSE|MINSILKSCREENTOMASKGAP=7mil|CLEARANCETOEXPOSEDCOPPER=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=SilkToSilkClearance|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=SilkToSilkClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=CQTRFCEQ|DEFINEDBYLOGICALDOCUMENT=FALSE|SILKTOSILKCLEARANCE=10mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=NetAntennae|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=NetAntennae|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=OMNIROPH|DEFINEDBYLOGICALDOCUMENT=FALSE|NETANTENNAETOLERANCE=0mil¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=AssemblyTestpoint|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=AssemblyTestpoint|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=JCSLAPJL|DEFINEDBYLOGICALDOCUMENT=FALSE|TESTPOINTUNDERCOMPONENT=TRUE|MINSIZE=40mil|MAXSIZE=100mil|PREFEREDSIZE=60mil|MINHOLESIZE=0mil|MAXHOLESIZE=40mil|PREFEREDHOLESIZE=32mil|TESTPOINTGRID=1mil|USEGRID=TRUE|GRIDTOLERANCE=0.01mil|ALLOWSIDETOP=TRUE|ALLOWSIDEBOTTOM=TRUE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=AssemblyTestPointUsage|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=AssemblyTestPointUsage|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=WMWPRJKW|DEFINEDBYLOGICALDOCUMENT=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=UnpouredPolygon|NETSCOPE=AnyNet|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=UnpouredPolygon|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=TTNBTKJV|DEFINEDBYLOGICALDOCUMENT=FALSE¶
SELECTION=FALSE|LAYER=TOP|LOCKED=FALSE|POLYGONOUTLINE=FALSE|USERROUTED=TRUE|UNIONINDEX=0|RULEKIND=BoardOutlineClearance|NETSCOPE=DifferentNets|LAYERKIND=SameLayer|SCOPE1EXPRESSION=All|SCOPE2EXPRESSION=All|NAME=BoardOutlineClearance|ENABLED=TRUE|PRIORITY=1|COMMENT= |UNIQUEID=HWFFVYTL|DEFINEDBYLOGICALDOCUMENT=FALSE|GAP=16mil|GENERICCLEARANCE=16mil|OBJECTCLEARANCES= ¶

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MSXII_Lights/Controller_Board_Interface.Harness Normal file
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MSXII_Headlights_Left=PA8/LOW_BEAM/LR_OUTER_BRAKE,PB15/HI_BEAM/RE_BRAKE,PA10/L_DRL/LR_OUTER_TURN,PA9//L_TURN
MSXII_Headlights_Right=PB0/R_DRL/RR_OUTER_TURN,PB10/R_TURN,PB2/LOW_BEAM/RR_OUTER_BRAKE,PB1/HI_BEAM/RR_BRAKE
MSXII_Tail_Lights=PB12/R_IND,PB11/HORN/STROBE,PB14/L_IND/CEN_BRAKE,PB13/F\R\O\N\T\_BACK

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MSXII_Headlights=PA10/R_DRL,PA9/R_TURN,PA8/LOW_BEAM,PB15/HI_BEAM/RE_BRAKE,PB14/L_DRL,PB13/L_TURN,PB12/HORN/STROBE,PB11/R_IND,PB10/L_IND/CEN_BRAKE

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MSXII_Headlights_Left=PA8/LOW_BEAM/LR_OUTER_BRAKE,PB15/HI_BEAM/RE_BRAKE,PA10/L_DRL/LR_OUTER_TURN,PA9//L_TURN

MSXII_Lights/Headlight_Left_Board.SchDoc
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MSXII_Headlights_Right=PB0/R_DRL/RR_OUTER_TURN,PB10/R_TURN,PB2/LOW_BEAM/RR_OUTER_BRAKE,PB1/HI_BEAM/RR_BRAKE

MSXII_Lights/Headlight_Right_Board.SchDoc
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MSXII_Tail_Lights=PB12/R_IND,PB11/HORN/STROBE,PB14/L_IND/CEN_BRAKE,PB13/F\R\O\N\T\_BACK

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Record=TopLevelDocument|FileName=Controller_Board_Interface.SchDoc

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Lights_Board_2=PA10,PA9,PA8,PB15/SPI2_MOSI,PB13/SP12_SCK,PB12/SPI2_NSS,PB11/USART3_RX/I2C2_SDA,PB14/SP12_MISO,PB10/USART3_TX/I2C2_SCL

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MSXII_Lights/MSXII_Lights.PcbDoc
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MSXII_Lights/Project Outputs for Lights_Board/Fabrication Files/Lights_Board_1.18.zip Normal file
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MSXII_Lights/Project Outputs for Lights_Board/Status Report.Txt Normal file
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Output: Copy of Bill of Materials
Type : BOM
From : Variant [[No Variations]] of Project [Lights_Board.PrjPcb]
Generated File[Lights_Board_1.18.xlsx]
Files Generated : 1
Documents Printed : 0
Finished Output Generation At 11:00:09 PM On 2018-02-27

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