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Feat[power]: v2.1 schematic complete

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This commit is contained in:
xamuil2 2023-11-30 18:35:41 +08:00
parent fcb4fad59a
commit 7383c6c775
14 changed files with 19869 additions and 7552 deletions

38
library/TPS568215RNNR/Power.pretty/IND_XAL7070_COC-L.kicad_mod Normal file
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@ -0,0 +1,38 @@
(footprint "IND_XAL7070_COC" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tags "XAL7070-182MEC ")
(attr smd)
(fp_text reference "REF**" (at 0 0 unlocked) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value IND_XAL7070_COC (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.9497 3.0734) (end -3.9497 -3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -3.9497 -3.0734) (end -3.9497 -3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 3.9497 -3.0734) (end 3.9497 -3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 3.9497 -3.0734) (end 3.9497 3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 3.9497 3.0734) (end 3.9497 3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -3.9497 3.0734) (end -3.9497 3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -3.9497 4.1021) (end -3.9497 3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -3.9497 -3.0734) (end -3.9497 -4.1021) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -3.9497 -4.1021) (end 3.9497 -4.1021) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 3.9497 -4.1021) (end 3.9497 -3.0734) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 3.9497 3.0734) (end 3.9497 4.1021) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 3.9497 4.1021) (end -3.9497 4.1021) (layer "F.CrtYd") (width 0.1524))
(fp_circle (center 0 0) (end 0.0762 0) (layer "F.Fab") (width 0.0254) (fill none))
(fp_circle (center -4.3688 0) (end -4.2926 0) (layer "F.SilkS") (width 0.1524) (fill none))
(fp_line (start -3.9751 4.1275) (end 3.9751 4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start 3.9751 4.1275) (end 3.9751 -4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start 3.9751 -4.1275) (end -3.9751 -4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start -3.9751 -4.1275) (end -3.9751 4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start -3.8481 4.0005) (end 3.8481 4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start 3.8481 4.0005) (end 3.8481 -4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start 3.8481 -4.0005) (end -3.8481 -4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start -3.8481 -4.0005) (end -3.8481 4.0005) (layer "F.Fab") (width 0.0254))
(pad "1" smd rect (at -2.4892 0) (size 1.4478 5.9436) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "2" smd rect (at 2.4892 0) (size 1.4478 5.9436) (layers "F.Cu" "F.Paste" "F.Mask"))
)

38
library/TPS568215RNNR/Power.pretty/IND_XAL7070_COC-M.kicad_mod Normal file
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@ -0,0 +1,38 @@
(footprint "IND_XAL7070_COC" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tags "XAL7070-182MEC ")
(attr smd)
(fp_text reference "REF**" (at 0 0 unlocked) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value IND_XAL7070_COC (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.3561 3.5306) (end -4.3561 -3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.3561 -3.5306) (end -4.3561 -3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.3561 -3.5306) (end 4.3561 -3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.3561 -3.5306) (end 4.3561 3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.3561 3.5306) (end 4.3561 3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.3561 3.5306) (end -4.3561 3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.3561 4.5085) (end -4.3561 3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.3561 -3.5306) (end -4.3561 -4.5085) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.3561 -4.5085) (end 4.3561 -4.5085) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.3561 -4.5085) (end 4.3561 -3.5306) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.3561 3.5306) (end 4.3561 4.5085) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.3561 4.5085) (end -4.3561 4.5085) (layer "F.CrtYd") (width 0.1524))
(fp_circle (center 0 0) (end 0.0762 0) (layer "F.Fab") (width 0.0254) (fill none))
(fp_circle (center -4.4704 0) (end -4.3942 0) (layer "F.SilkS") (width 0.1524) (fill none))
(fp_line (start -3.9751 4.1275) (end 3.9751 4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start 3.9751 4.1275) (end 3.9751 -4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start 3.9751 -4.1275) (end -3.9751 -4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start -3.9751 -4.1275) (end -3.9751 4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start -3.8481 4.0005) (end 3.8481 4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start 3.8481 4.0005) (end 3.8481 -4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start 3.8481 -4.0005) (end -3.8481 -4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start -3.8481 -4.0005) (end -3.8481 4.0005) (layer "F.Fab") (width 0.0254))
(pad "1" smd rect (at -2.4892 0) (size 1.651 6.0452) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "2" smd rect (at 2.4892 0) (size 1.651 6.0452) (layers "F.Cu" "F.Paste" "F.Mask"))
)

37
library/TPS568215RNNR/Power.pretty/IND_XAL7070_COC.kicad_mod Normal file
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@ -0,0 +1,37 @@
(footprint "IND_XAL7070_COC" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tags "XAL7070-182MEC ")
(attr smd)
(fp_text reference "REF**" (at 0 0 unlocked) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value IND_XAL7070_COC (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.1021 3.2512) (end -4.1021 -3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.1021 -3.2512) (end -4.1021 -3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.1021 -3.2512) (end 4.1021 -3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.1021 -3.2512) (end 4.1021 3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.1021 3.2512) (end 4.1021 3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.1021 3.2512) (end -4.1021 3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.1021 4.2545) (end -4.1021 3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.1021 -3.2512) (end -4.1021 -4.2545) (layer "F.CrtYd") (width 0.1524))
(fp_line (start -4.1021 -4.2545) (end 4.1021 -4.2545) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.1021 -4.2545) (end 4.1021 -3.2512) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.1021 3.2512) (end 4.1021 4.2545) (layer "F.CrtYd") (width 0.1524))
(fp_line (start 4.1021 4.2545) (end -4.1021 4.2545) (layer "F.CrtYd") (width 0.1524))
(fp_circle (center 0 0) (end 0 0) (layer "F.Fab") (width 0.0254) (fill none))
(fp_line (start -3.9751 4.1275) (end 3.9751 4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start 3.9751 4.1275) (end 3.9751 -4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start 3.9751 -4.1275) (end -3.9751 -4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start -3.9751 -4.1275) (end -3.9751 4.1275) (layer "F.SilkS") (width 0.1524))
(fp_line (start -3.8481 4.0005) (end 3.8481 4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start 3.8481 4.0005) (end 3.8481 -4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start 3.8481 -4.0005) (end -3.8481 -4.0005) (layer "F.Fab") (width 0.0254))
(fp_line (start -3.8481 -4.0005) (end -3.8481 4.0005) (layer "F.Fab") (width 0.0254))
(pad "1" smd rect (at -2.4892 0) (size 1.5494 5.9944) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "2" smd rect (at 2.4892 0) (size 1.5494 5.9944) (layers "F.Cu" "F.Paste" "F.Mask"))
)

86
library/TPS568215RNNR/Power.pretty/RJE0020A.kicad_mod Normal file
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@ -0,0 +1,86 @@
(footprint "RJE0020A" (version 20211014) (generator pcbnew)
(layer "F.Cu")
(tags "TPS568230RJER ")
(attr smd)
(fp_text reference "REF**" (at 0 0 unlocked) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value RJE0020A (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user "${REFERENCE}" (at 0 0 unlocked) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.649999 -1.649999) (end -1.45 -1.649999) (layer "F.SilkS") (width 0.2))
(fp_line (start -1.649999 -1.25) (end -1.649999 -1.649999) (layer "F.SilkS") (width 0.2))
(fp_line (start 1.45 -1.649999) (end 1.649999 -1.649999) (layer "F.SilkS") (width 0.2))
(fp_line (start 1.649999 -1.45) (end 1.649999 -1.649999) (layer "F.SilkS") (width 0.2))
(fp_line (start 1.649999 1.649999) (end 1.649999 1.45) (layer "F.SilkS") (width 0.2))
(fp_line (start 1.45 1.649999) (end 1.649999 1.649999) (layer "F.SilkS") (width 0.2))
(fp_line (start -1.649999 1.649999) (end -1.649999 1.45) (layer "F.SilkS") (width 0.2))
(fp_line (start -1.649999 1.649999) (end -1.45 1.649999) (layer "F.SilkS") (width 0.2))
(fp_line (start -1.549999 1.549999) (end 1.549999 1.549999) (layer "F.Fab") (width 0.1))
(fp_line (start -1.549999 -1.549999) (end 1.549999 -1.549999) (layer "F.Fab") (width 0.1))
(fp_line (start 1.549999 1.549999) (end 1.549999 -1.549999) (layer "F.Fab") (width 0.1))
(fp_line (start -1.549999 1.549999) (end -1.549999 -1.549999) (layer "F.Fab") (width 0.1))
(fp_poly (pts
(xy -0.380002 0.326801)
(xy -0.380002 -0.2908)
(xy -0.379016 -0.300789)
(xy -0.376103 -0.310393)
(xy -0.371371 -0.319245)
(xy -0.365003 -0.327002)
(xy -0.357246 -0.33337)
(xy -0.348394 -0.338102)
(xy -0.33879 -0.341015)
(xy -0.3288 -0.341998)
(xy 0.208801 -0.341998)
(xy 0.218791 -0.341015)
(xy 0.228394 -0.338102)
(xy 0.237246 -0.33337)
(xy 0.245003 -0.327002)
(xy 0.251371 -0.319245)
(xy 0.256103 -0.310393)
(xy 0.259016 -0.300789)
(xy 0.259999 -0.2908)
(xy 0.259999 0.326801)
(xy 0.259016 0.336791)
(xy 0.256103 0.346395)
(xy 0.251371 0.355247)
(xy 0.245003 0.363004)
(xy 0.237246 0.369372)
(xy 0.228394 0.374104)
(xy 0.218791 0.377017)
(xy 0.208801 0.378003)
(xy -0.3288 0.378003)
(xy -0.33879 0.377017)
(xy -0.348394 0.374104)
(xy -0.357246 0.369372)
(xy -0.365003 0.363004)
(xy -0.371371 0.355247)
(xy -0.376103 0.346395)
(xy -0.379016 0.336791)
) (layer "F.Paste") (width 0) (fill solid))
(fp_circle (center -1.024999 -0.924999) (end -0.775 -0.924999) (layer "F.Fab") (width 0.1) (fill none))
(pad "1" smd rect (at -1.4 -0.900001) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "2" smd rect (at -1.4 -0.449999) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "3" smd rect (at -1.4 0) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "4" smd rect (at -1.4 0.449999) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "5" smd rect (at -1.4 0.900001) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "6" smd rect (at -0.900001 1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "7" smd rect (at -0.449999 1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "8" smd rect (at 0 1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "9" smd rect (at 0.449999 1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "10" smd rect (at 0.900001 1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "11" smd rect (at 1.4 0.900001) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "12" smd rect (at 1.4 0.449999) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "13" smd rect (at 1.4 0) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "14" smd rect (at 1.4 -0.449999) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "15" smd rect (at 1.4 -0.900001) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "16" smd rect (at 0.900001 -1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "17" smd rect (at 0.449999 -1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "18" smd rect (at 0 -1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "19" smd rect (at -0.449999 -1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "20" smd rect (at -0.900001 -1.4 90) (size 0.599999 0.2) (layers "F.Cu" "F.Paste" "F.Mask"))
(pad "21" smd rect (at -0.06 0.018001) (size 0.775 0.860001) (layers "F.Cu" "F.Mask"))
)

8353
library/TPS568215RNNR/Power.pretty/RJE0020A.stp Normal file
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library/TPS568215RNNR/tps568230.kicad_sym
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power/INA226.kicad_sch
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power/LTC4352.kicad_sch
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power/TPS568230.kicad_sch
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1 2 3 4 5 6 1 2 3 4 5 6 D C B A D C B A Date: 2023-11-27 Size: A4 Id: / File: blob_c689804b3555bb9fd1ffebad7dcfbd9e8a0c7059_2910118613.kicad_sch Sheet: / KiCad E.D.A. eeschema 7.0.0 // INNOVATION IS OUR OBSESSION. // THINK DIFFERENT, THINK MUREX. module designed for ROV applications and other 12V/5V/3.3V DC systems. The MUREX Power Board is the world's smallest open-source dual output, high power Title: Power Board Rev: V2.0 MUREX Robotics [Max Liu] C8 22uF C9 22uF L1 1.8uH C3 1uF C6 47pF C4 0.1uF C11 22uF R6 51k C12 0.1uF R8 26.6k R5 30k R4 226k C7 1uF C1 22uF TP1 5V C14 22nF R7 51k C5 0.1uF C13 0.1uF NC 10 BST 1 VCC 17 NC 16 PGND 7 PGND 21 VIN 5 EN 12 VIN 2 PGOOD 9 PGND 18 SW 20 SW 19 AGND 13 SW 6 FB 14 MODE 15 VIN 4 PGND 8 SS 11 VIN 3 U1 TPS568230RJER R3 100k C2 22uF R9 5.1k C10 22uF GND GND GND GNDA GNDA GNDA GNDA GND GND GNDA GNDA VCC EN VCC VIN FB PGOOD SS VCC SW EN BST MODE SS MODE VOUT VIN VIN Buck Converter SS = ~2.5ms Tie with short 20mil trace L_{out} = 1.8uH Cin_{min} = 44uF Cout_{min} = 66uF F_{sw} = 1mHz FCCM 5V (5.12V raw), 8A Configs L1: Coilcraft XAL7070-182MEC

power/TPS568230B.kicad_sch
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power/power.kicad_pcb
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8
power/power.kicad_pro
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@ -554,8 +554,12 @@
""
],
[
"e9cffae5-225f-4451-ab4a-9aa44e3a4ef6",
"Dual-Output Buck Converter"
"e479a492-f085-4afe-886c-479f29421304",
"Stage 1 Step Down"
],
[
"fcfdf5f3-99a1-43fa-8eea-009e7e49ea9a",
"Stage 2 Step Down"
],
[
"d3c479b7-f7bf-4296-8fee-4e35418d9676",

power/power.kicad_sch
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power/untitled.kicad_sch
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