58 lines
1.5 KiB
Plaintext
58 lines
1.5 KiB
Plaintext
{ Machine generated file created by SPI }
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{ Last modified was 15:51:44 Monday, January 25, 2016 }
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{ NOTE: Do not modify the contents of this file. If this is regenerated by }
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{ SPI, your modifications will be overwritten. }
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START_PROJECTMGR
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LastFlow 'Board Design'
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END_PROJECTMGR
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START_GLOBAL
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text_editor 'C:\Program Files\Notepad++\notepad++.exe'
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view_pcb './worklib/sch/physical'
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design_name 'sch'
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design_library 'usb2iterface_lib'
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library 'usb2iterface_lib' 'standard' 'connector' 'crystal_osc' 'diode' 'discrete' 'disp' 'itead_standard_lib' 'logic' 'mcu' 'misc_ic' 'module' 'motor' 'mtg' 'opamp' 'others' 'ram_flash' 'regulator' 'relay' 'sensor' 'socket' 'sonic_socket' 'std' 'switch' 'transformer' 'transistor'
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temp_dir 'temp'
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cpm_version '16.5'
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session_name 'ProjectMgr10409'
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cdsprop_file ''
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physical_path './worklib/sch/physical'
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END_GLOBAL
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START_CONCEPTHDL
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LOGIC_GRID_TOGGLE 'ON'
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LOGIC_GRID_SIZE '0.050'
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LOGIC_GRID_MULTIPLE '10'
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SYMBOL_GRID_TOGGLE 'ON'
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DOC_GRID_TOGGLE 'ON'
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WARNING_MESSAGES 'COMMANDPANE'
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PATHPROP_INVISIBLE 'ON'
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PRESELECT_FLAG 'ON'
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DEFAULT_PAGE_BORDER_NAME 'B SIZE PAGE'
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DEFAULT_PAGE_BORDER_VERSION '1'
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END_CONCEPTHDL
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START_PKGRXL
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regenerate_physical_net_name 'OFF'
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electrical_constraints 'ON'
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f2b_overwrite_constraints 'OFF'
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END_PKGRXL
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START_DESIGNSYNC
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replace_symbol '0'
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etch_removal 'NO'
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ignore_fixed 'NO'
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create_user_prop 'NO'
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run_packager 'YES'
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run_netrev 'YES'
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backannotate_forward 'YES'
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last_board_file 'usb2interface.brd'
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END_DESIGNSYNC
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START_CONSTRAINT_MGR
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EDIT_PHYSICAL_SPACING_CONSTRAINTS 'ON'
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END_CONSTRAINT_MGR
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