USB2SPDIF/board/hdl/worklib/sch/physical/netrev.lst
2016-01-26 19:49:42 +08:00

112 lines
4.3 KiB
Plaintext

(---------------------------------------------------------------------)
( )
( Allegro Netrev Import Logic )
( )
( Drawing : usb2interface.brd )
( Software Version : 16.5S056 )
( Date/Time : Mon Jan 25 15:51:39 2016 )
( )
(---------------------------------------------------------------------)
------ Directives ------
RIPUP_ETCH FALSE;
RIPUP_DELETE_FIRST_SEGMENT FALSE;
RIPUP_RETAIN_BONDWIRE FALSE;
RIPUP_SYMBOLS ALWAYS;
Missing symbol has error FALSE;
SCHEMATIC_DIRECTORY 'C:\Users\jyzhiyu\Dropbox\work\USB2SPDIF\board\hdl\worklib\sch\packaged';
BOARD_DIRECTORY '';
OLD_BOARD_NAME 'C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/physical/usb2interface.brd';
NEW_BOARD_NAME 'C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/physical/usb2interface.brd';
CmdLine: netrev -proj C:\Users\jyzhiyu\Dropbox\work\USB2SPDIF\board\hdl\usb2iterface.cpm -5 -y 1 -O C:\Users\jyzhiyu\Dropbox\work\USB2SPDIF\board\hdl\worklib\sch\physical\usb2interface.brd C:\Users\jyzhiyu\Dropbox\work\USB2SPDIF\board\hdl\worklib\sch\physical\usb2interface.brd -$
------ Preparing to read pst files ------
Starting to read C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/packaged/pstchip.dat
Finished reading C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/packaged/pstchip.dat (00:00:00.24)
Starting to read C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/packaged/pstxprt.dat
Finished reading C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/packaged/pstxprt.dat (00:00:00.00)
Starting to read C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/packaged/pstxnet.dat
Finished reading C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/packaged/pstxnet.dat (00:00:00.00)
------ Oversights/Warnings/Errors ------
===========================================================
Start Constraint Diff3 Import
Constraint File: C:/Users/jyzhiyu/Dropbox/work/USB2SPDIF/board/hdl/worklib/sch/packaged/pstcmdb.dat
Allegro Baseline: C:/Users/jyzhiyu/AppData/Local/Temp/#Taaaaad06708.tmp
Start time: Mon Jan 25 15:51:39 2016
===========================================================
===========================================================
Finished Constraint Update Time: Mon Jan 25 15:51:39 2016
===========================================================
------ Library Paths ------
MODULEPATH = .
C:/Cadence/SPB_16.5/share/local/pcb/modules
Z:/PCBSymbol/
PSMPATH = .
symbols
..
../symbols
C:/Cadence/SPB_16.5/share/local/pcb/symbols
C:/Cadence/SPB_16.5/share/pcb/pcb_lib/symbols
C:/Cadence/SPB_16.5/share/pcb/allegrolib/symbols
Z:/PCBSymbol/
PADPATH = .
symbols
..
../symbols
C:/Cadence/SPB_16.5/share/local/pcb/padstacks
C:/Cadence/SPB_16.5/share/pcb/pcb_lib/symbols
C:/Cadence/SPB_16.5/share/pcb/allegrolib/symbols
Z:/PCBSymbol/
------ Summary Statistics ------
netrev run on Jan 25 15:51:39 2016
DESIGN NAME : 'SCH'
PACKAGING ON 25-Jan-2016 AT 15:51:37
COMPILE 'logic'
CHECK_PIN_NAMES OFF
CROSS_REFERENCE OFF
DIRECTORIES <none>
FEEDBACK OFF
INCREMENTAL OFF
INTERFACE_TYPE PHYSICAL
LIBRARIES 'usb2iterface_lib' 'standard' 'connector' 'crystal_osc' 'diode'
'discrete' 'disp' 'itead_standard_lib' 'logic' 'mcu' 'misc_ic'
'module' 'motor' 'mtg' 'opamp' 'others' 'ram_flash' 'regulator'
'relay' 'sensor' 'socket' 'sonic_socket' 'std' 'switch'
'transformer' 'transistor'
MASTER_LIBRARIES <none>
MAX_ERRORS 500
MERGE_MINIMUM 5
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
NET_NAME_LENGTH 24
OVERSIGHTS ON
REPLACE_CHECK OFF
SINGLE_NODE_NETS ON
SPLIT_MINIMUM 0
SUPPRESS 20
WARNINGS ON
No error detected
No oversight detected
No warning detected
cpu time 0:01:53
elapsed time 0:00:01