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CLBv2_Design
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History
peterj.nikhef.nl
96408c7ad8
Added a small guide into the instructions of the VLIW packet filter
2014-07-02 09:11:42 +00:00
..
ep_packte_filter
Added a small guide into the instructions of the VLIW packet filter
2014-07-02 09:11:42 +00:00
Debug_mdio_cr_asr.pdf
solved f_x_to_zero for "or" that is an overloaded function, defined in package “ep_wbgen2_pkg” (file ep_registers_pkg.vhd).
2013-11-08 08:41:21 +00:00
ep_registers.xlsx
solved f_x_to_zero for "or" that is an overloaded function, defined in package “ep_wbgen2_pkg” (file ep_registers_pkg.vhd).
2013-11-08 08:41:21 +00:00
UART_Output.docx
modified modelsim scripts
2013-08-15 15:35:01 +00:00
WhiteRabbit_I2C_Busses.pdf
added a level of hierarchy for clb_wrpc. The pll that creates clk_sys_i is put one level up since the output of this pll is needed in the rest of the CLB.
2013-09-06 14:13:07 +00:00
wr_gtp_phy_hierarchy.pptx
this set is based on the new wrpc files. the timing servo still sticks at SYNC_NSEC (but this can be due to old, non matching software).
2013-08-30 13:27:12 +00:00