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167 lines
8.5 KiB
Plaintext
167 lines
8.5 KiB
Plaintext
Release 14.2 - Bitgen P.28xd (nt)
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Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved.
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Loading device for application Rf_Device from file '7k325t.nph' in environment
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C:\Xilinx\14.2\ISE_DS\ISE\.
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"fpga" is an NCD, version 3.2, device xc7k325t, package ffg900, speed -2
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Opened constraints file fpga.pcf.
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Fri Jul 19 19:17:20 2013
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C:\Xilinx\14.2\ISE_DS\ISE\bin\nt\unwrapped\bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:3 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g InitPin:Pullup -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g Disable_JTAG:No -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g ExtMasterCclk_en:Disable -g ConfigFallback:Disable -g BPI_page_size:1 -g BPI_sync_mode:Disable -g SPI_32bit_addr:No -g SPI_buswidth:1 -g SPI_Fall_Edge:No -g OverTempPowerDown:Disable -g USR_ACCESS:None -g JTAG_XADC:Enable -g DCIUpdateMode:AsRequired -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g Match_cycle:Auto -g Security:None -g ICAP_select:Auto -g DonePipe:Yes -g Encrypt:No fpga.ncd
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INFO:Bitgen:40 - Replacing "Auto" with "NoWait" for option "Match_cycle". Most
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commonly, bitgen has determined and will use a specific value instead of the
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generic command-line value of "Auto". Alternately, this message appears if
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the same option is specified multiple times on the command-line. In this
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case, the option listed last will be used.
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Summary of Bitgen Options:
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+----------------------+----------------------+
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| Option Name | Current Setting |
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+----------------------+----------------------+
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| Compress | (Not Specified)* |
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+----------------------+----------------------+
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| Readback | (Not Specified)* |
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+----------------------+----------------------+
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| CRC | Enable** |
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+----------------------+----------------------+
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| DebugBitstream | No** |
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+----------------------+----------------------+
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| ConfigRate | 3** |
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+----------------------+----------------------+
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| StartupClk | Cclk** |
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+----------------------+----------------------+
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| CclkPin | Pullup** |
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+----------------------+----------------------+
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| DonePin | Pullup* |
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+----------------------+----------------------+
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| M0Pin | Pullup** |
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+----------------------+----------------------+
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| M1Pin | Pullup** |
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+----------------------+----------------------+
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| M2Pin | Pullup** |
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+----------------------+----------------------+
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| ProgPin | Pullup** |
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+----------------------+----------------------+
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| InitPin | Pullup** |
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+----------------------+----------------------+
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| TckPin | Pullup** |
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+----------------------+----------------------+
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| TdiPin | Pullup** |
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+----------------------+----------------------+
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| TdoPin | Pullup** |
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+----------------------+----------------------+
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| TmsPin | Pullup** |
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+----------------------+----------------------+
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| UnusedPin | Pulldown** |
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+----------------------+----------------------+
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| GWE_cycle | 6** |
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+----------------------+----------------------+
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| GTS_cycle | 5** |
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+----------------------+----------------------+
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| OverTempPowerDown | Disable** |
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+----------------------+----------------------+
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| LCK_cycle | NoWait* |
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+----------------------+----------------------+
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| Match_cycle | NoWait |
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+----------------------+----------------------+
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| DONE_cycle | 4** |
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+----------------------+----------------------+
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| Persist | No* |
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+----------------------+----------------------+
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| DonePipe | Yes** |
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+----------------------+----------------------+
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| Security | None** |
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+----------------------+----------------------+
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| UserID | 0xFFFFFFFF** |
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+----------------------+----------------------+
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| ActiveReconfig | No* |
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+----------------------+----------------------+
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| Encrypt | No** |
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+----------------------+----------------------+
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| EncryptKeySelect | bbram* |
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+----------------------+----------------------+
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| Key0 | pick* |
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+----------------------+----------------------+
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| StartCBC | pick* |
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+----------------------+----------------------+
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| HKey | pick* |
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+----------------------+----------------------+
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| KeyFile | (Not Specified)* |
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+----------------------+----------------------+
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| DCIUpdateMode | AsRequired** |
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+----------------------+----------------------+
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| ICAP_Select | Auto** |
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+----------------------+----------------------+
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| ConfigFallback | Disable** |
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+----------------------+----------------------+
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| SelectMAPAbort | Enable* |
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+----------------------+----------------------+
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| BPI_page_size | 1** |
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+----------------------+----------------------+
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| BPI_1st_read_cycle | 1* |
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+----------------------+----------------------+
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| next_config_addr | None* |
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+----------------------+----------------------+
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| next_config_reboot | Enable* |
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+----------------------+----------------------+
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| InitSignalsError | Enable* |
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+----------------------+----------------------+
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| XADCPartialReconfig | Disable* |
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+----------------------+----------------------+
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| XADCEnhancedLinearity | Off* |
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+----------------------+----------------------+
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| JTAG_XADC | Enable** |
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+----------------------+----------------------+
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| Disable_JTAG | No** |
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+----------------------+----------------------+
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| XADCPowerDown | Disable* |
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+----------------------+----------------------+
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| Partial | (Not Specified)* |
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+----------------------+----------------------+
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| ExtMasterCclk_en | Disable** |
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+----------------------+----------------------+
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| BPI_sync_mode | Disable** |
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+----------------------+----------------------+
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| SPI_32bit_addr | No** |
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+----------------------+----------------------+
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| SPI_buswidth | 1** |
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+----------------------+----------------------+
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| SPI_Fall_Edge | No** |
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+----------------------+----------------------+
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| RevisionSelect | 00* |
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+----------------------+----------------------+
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| RevisionSelect_tristate | Disable* |
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+----------------------+----------------------+
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| TIMER_CFG | None* |
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+----------------------+----------------------+
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| TIMER_USR | None* |
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+----------------------+----------------------+
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| USR_ACCESS | None** |
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+----------------------+----------------------+
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| IEEE1532 | No* |
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+----------------------+----------------------+
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| Binary | No** |
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+----------------------+----------------------+
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* Default setting.
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** The specified setting matches the default setting.
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There were 0 CONFIG constraint(s) processed from fpga.pcf.
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Running DRC.
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WARNING:PhysDesignRules:1329 - Issue with pin connections and/or configuration
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on
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block:<u0/u11/U_Wrapped_tdc/Wrapped_tdc/U_Mux_tdc/all_channels[0].channel_tdc
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/iserdes_master>:<ISERDESE2_ISERDESE2>. The O output pin is required for
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IOBDELAY set BOTH or IBUF.
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WARNING:PhysDesignRules:1329 - Issue with pin connections and/or configuration
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on
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block:<u0/u11/U_Wrapped_tdc/Wrapped_tdc/U_Mux_tdc/all_channels[1].channel_tdc
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/iserdes_master>:<ISERDESE2_ISERDESE2>. The O output pin is required for
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IOBDELAY set BOTH or IBUF.
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DRC detected 0 errors and 2 warnings. Please see the previously displayed
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individual error or warning messages for more details.
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Creating bit map...
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Saving bit stream in "fpga.bit".
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Bitstream generation is complete.
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