Files
peterj.nikhef.nl 42d101f97e Minor changes made to the top level design (due to small changes in the aes interface)
Implemented a separate ICAPE2_wrapper to satisfy Mentor Graphics Precision (SR 2619066081).
2014-04-17 13:23:46 +00:00
..
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00
2013-07-31 17:32:33 +00:00

Synthesis and Place&Route README.TXT 		November 16, 2012
-----------------------------------------------------------

Scripts:
1)	do_synt.cmd			      does Precision Shynthesis
                           uses "fpga-synt.tcl"
2)	do_input_file_list.cmd	Contains all input VHDL and Verilog sources to be synthesized and produces
                           the file "%DesName%.prj" that (together with "%DesName%.xst" will be input to Xilinx XST
3)	do_xilinx.cmd		      When "set UseXST=true" calls "do_input_file_list.cmd" and does Syntesis via Xilinx XST.
                           Places & routes the design using Xilinx ISE in batch mode
                           uses "%DesName%.ucf", "%DesName%.bmm" and "%DesName%.ut".
                           It produces "%DesName%.bit" and "%DesName%_bd.bmm" (i.e.= bmm file with placed locations)
4) do_elf.cmd              combines the software and the empty "%DesName%.bit" file. Uses "software.elf", "%DesName%.bit"
                           and "%DesName%_bd.bmm" and merges them into "%DesName%_elf.bit"
5) do_elf_netgen.cmd       produces an "%DesName%_timesim_elf.vhd" (which includes "software.elf") for back annotated
                           simulation.
6)	do_impact.cmd		      download the configuration ("%DesName%_elf.bit") into the Evaluation board via the USB
                           download cable. It used the file "_.imp"

Either run (Precision flow):
      do_synt.cmd
      do_xilinx.cmd (with "set UseXST=false")
      do_elf.cmd
      do_impact.cmd
Or run (Xilinx XST flow):
      do_xilinx.cmd (with "set UseXST=true")
      do_elf.cmd
      do_impact.cmd
      
Things to be aware of:
1) Precision and XST have small differences. Watch out for the use of "_" and "/"; for example the "bmm" file
   for Presision reads "u1_u0/U0/xst_blk_mem_generator" and XST reads "u1/u0/U0/xst_blk_mem_generator".
2) The command line for ngdbuild in "do_xilinx.cmd" should either read the %DesName%.edf (Precision) or
   %DesName%.ngc (XST)

   
   
********************* XST TWEAKS ***********************
XST synthesis needs a tweak! Lines
   use UNISIM.IBUFDS_GTE2;
   use UNISIM.BUFG;
should be commented out and replaced by:
   --use UNISIM.IBUFDS_GTE2;
   --use UNISIM.BUFG;
   use UNISIM.ALL;