You've already forked gitified_old_clb_svn
147 lines
3.4 KiB
Plaintext
147 lines
3.4 KiB
Plaintext
.FILETYPE ODBSETUP
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.VERSION "2.0"
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.SCHEMA_VERSION 1
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.DATE "25-2-2013 15:22:48"
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.USERLAYERS
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..ANYINCLUDES NO
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..NAME "Default User Layer"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_Default User Layer"
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..NAME "Gerber_Drawing"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_Gerber_Drawing"
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..NAME "Silkscreen Dummy TOP"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_Silkscreen Dummy TOP"
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..NAME "Silkscreen Dummy BTM"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_Silkscreen Dummy BTM"
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..NAME "Border"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_Border"
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..NAME "PCA-001"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCA-001"
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..NAME "PCA-002"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCA-002"
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..NAME "PCA-003"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCA-003"
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..NAME "PCA-004"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCA-004"
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..NAME "PCB-001"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCB-001"
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..NAME "PCB-002"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCB-002"
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..NAME "PCB-003"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCB-003"
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..NAME "PCA-000"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCA-000"
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..NAME "PCB-000"
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...INCLUDE NO
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...MAPPEDTO USE_USER_LAYER
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....USER_LAYER_NAME "USR_PCB-000"
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.LAYERS_TO_EXPORT
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..NAME "d_1_6"
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...INCLUDE YES
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..NAME "smt"
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...INCLUDE YES
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..NAME "smb"
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...INCLUDE YES
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..NAME "sst"
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...INCLUDE YES
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..NAME "ssb"
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...INCLUDE YES
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..NAME "signal_1"
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...MAPPEDTO LAYER1
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...INCLUDE YES
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..NAME "signal_2"
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...MAPPEDTO LAYER2
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...INCLUDE YES
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..NAME "signal_3"
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...MAPPEDTO LAYER3
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...INCLUDE YES
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..NAME "signal_4"
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...MAPPEDTO LAYER4
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...INCLUDE YES
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..NAME "plane_5"
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...MAPPEDTO LAYER5
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...INCLUDE YES
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..NAME "signal_6"
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...MAPPEDTO LAYER6
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...INCLUDE YES
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..NAME "ddt"
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...INCLUDE YES
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..NAME "assemt"
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...INCLUDE YES
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..NAME "assemb"
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...INCLUDE YES
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..NAME "spt"
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...INCLUDE YES
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..NAME "spb"
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...INCLUDE YES
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.EPLAYERS
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.APLAYERS
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..EXPORT_AP NO
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.PACKAGE_OUTLINE "Assembly Outline"
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.PINS_NFP_REMOVAL "None"
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.VIAS_NFP_REMOVAL "None"
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.REMOVE_EDA_NETS NO
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.REMOVE_CADNET_NETLIST NO
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.NEUTRALIZE_NETS NO
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.UNITS METRIC
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.READ_DRC_FEATURES YES
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..DRCFEATURE ".drc_comp_keepout_lyr"
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...DRCFEATURELAYER "drc_comp"
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...PROCESSFEATURE NO
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..DRCFEATURE ".drc_plane_keepout_lyr"
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...DRCFEATURELAYER "drc_route"
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...PROCESSFEATURE NO
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..DRCFEATURE ".drc_route_keepin_lyr"
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...DRCFEATURELAYER "drc_route"
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...PROCESSFEATURE NO
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..DRCFEATURE ".drc_tp_keepout_lyr"
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...DRCFEATURELAYER "drc_tp"
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...PROCESSFEATURE NO
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..DRCFEATURE ".drc_trace_keepout_lyr"
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...DRCFEATURELAYER "drc_route"
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...PROCESSFEATURE NO
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..DRCFEATURE ".drc_via_keepout_lyr"
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...DRCFEATURELAYER "drc_route"
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...PROCESSFEATURE NO
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.ROUND_CORNERS YES
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.IGNORE_COMPONENT_LAYOUT NO
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.COMPRESS YES
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.ODBPP_INSIDE NO
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.GEN_SILK_DATA YES
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.PART_NUMBER NO
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.BOARD_OUTLINE YES
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.APPEND NO
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.GEN_SEP_VAR_DATA NO
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.GEN_ACT_VAR_DATA YES
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.OutputDirectory ".\\Output\\"
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.OutputJobName "ET-Number.odb"
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.LogFilePath ".\\LogFiles"
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.SchemeChanged No
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.Scheme "ODB_06L"
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.SchemeLocation "System"
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