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(ExpressProject "empty_design"
(ProjectVersion "19981106")
(SoftwareVersion "24.1 S004 (4290201) [4/17/2025]-[07/30/25]")
(ProjectType "PCB")
(Folder "Design Resources"
(Folder "Library")
("Allegro Netlist Directory" "allegro")
(DOCKED "TRUE")
(DOCKING_POSITION "59420")
(NoModify)
(File ".\empty_design.dsn"
(Type "Schematic Design"))
(BuildFileAddedOrDeleted "x")
(CompileFileAddedOrDeleted "x")
("Allegro Netlist Output Board File" ".\empty_design.brd"))
(Folder "Layout"
(File ".\empty_design.brd"
(Type "Board File")
(OutputBoard ".\empty_design.brd")
(NetListPath ".\allegro")
(ActiveBoard "1")))
(Folder "Outputs")
(Folder "Referenced Projects")
(Folder "PSpice Resources"
(Folder "Simulation Profiles")
(Folder "Model Libraries"
(Sort User))
(Folder "Stimulus Files"
(Sort User))
(Folder "Include Files"
(Sort User)))
(Folder "Logs")
(MPSSessionName "gman")
(PartMRUSelector)
(GlobalState
(FileView
(Path "Design Resources")
(Path "Layout"))
(HierarchyView)
(Doc
(Type "COrCapturePMDoc")
(Frame
(Placement "44 0 1 -1 -1 -1 -1 0 200 0 684"))
(Tab 0))))