David Cussans d661b0a44f Fixed some typos in the schematic comments. Got rid of two only-one-pin-on-the net instances (on PLL output power pin and PGOOD from P5V5 regulator. Printed schematics. Produced a down-reved board for Pete

2024-10-31 11:43:39 +00:00

6.3 MiB

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